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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: David Picard <david.picard@clermont.in2p3.fr>,
	MList-Barebox <barebox@lists.infradead.org>
Subject: Re: boards/enclustra-sa2: add new board (HELP NEEDED)
Date: Thu, 10 Jul 2025 20:30:48 +0200	[thread overview]
Message-ID: <0f14a473-e238-4e7f-9c4b-5b59c4f6bc0e@pengutronix.de> (raw)
In-Reply-To: <3c3f1ff0-c43e-448e-9706-72bf160a6ab4@clermont.in2p3.fr>

Hi,

On 7/10/25 15:54, David Picard wrote:
>>> - The addresses and sizes in the log output below don't seem to
>>> exceed SDRAM
>>> boundaries, do they?
>>> - Any hint on anything to check?

FTR, here is the last boot log: https://paste.debian.net/1385224/

I thought asking about CONFIG_DEBUG_INITCALLS was the first thing I did,
but I might misremember. Anyways, you are clearly reaching barebox
proper now, so just forget about all the putc_ll() stuff, you only need
that for the early hangs, which isn't the case for you.

As for why it hangs, I suspect you have CONFIG_ARCH_SOCFPGA_ARRIA10
enabled, despite that SA2 using a Cyclone V.

Can you check if CONFIG_ARCH_SOCFPGA_ARRIA10 is enabled and try again
after disabling it if it is?

Cheers,
Ahmad

>>>
>>> David
>>>
>>> =============================
>>> barebox 2025.06.1 #1 Thu Jul 3 10:53:43 CEST 2025
>>>
>>>
>>> Board: SoCFPGA
>>> No consoles were activated. Activating all consoles as fallback!
>>> dw_mmc dw_mmc0: registered as mci0
>>> mci0: detected SD card version 2.0
>>> mci0: registered disk0
>>> starting bootloader...
>>> arch/arm/boards/enclustra-sa2/lowlevel.c: __start_socfpga_sa2() >>>
>>> start
>>> include/mach/socfpga/lowlevel.h: start_socfpga_c5_common() >>> start
>>> include/mach/socfpga/lowlevel.h: start_socfpga_c5_common() >>>
>>> arm_cpu_lowlevel_init() OK
>>> include/mach/socfpga/lowlevel.h: start_socfpga_c5_common() >>>
>>> fdt_blob=0x00002320 fdt=0x1ff87ae8 size=0x40000000
>> This looks strange. Your fdt blob is at offset 0x2320 in the binary, but
>> the final pointer is at 0x1ff87ae8 meaning that your binary is only 8
>> byte aligned in memory. I would expect a bigger alignment here. The
>> buffer should be allocated by read_file_2(). Could you replace the
>> call to calloc there with a memalign() call aligning to something like
>> 64 bytes?
>>
>> Could be a red herring though.
>>
>>> include/mach/socfpga/lowlevel.h: start_socfpga_c5_common() >>> calling
>>> barebox_arm_entry()...
>>> uncompress.c: memory at 0x00000000, size 0x40000000
>>> mmu: enabling MMU, ttb @ 0x3ffe0000
>>> endmem                = 0x40000000
>>> arm_mem_scratch       = 0x3fff8000+0x00008000
>>> arm_mem_stack         = 0x3fff0000+0x00008000
>>> arm_mem_ttb           = 0x3ffe0000+0x00010000
>>> arm_mem_barebox_image = 0x3fe00000+0x00200000
>>> arm_mem_early_malloc  = 0x3fde0000+0x00020000
>>> membase               = 0x00000000+0x40000000
>>> uncompress.c: uncompressing barebox binary at 0x1ff8c800 (size
>>> 0x00056b67)
>>> to 0x3fe00000 (uncompressed size: 0x000778b0)
>>> uncompress.c: jumping to uncompressed image at 0x3fe00001
>>> uncompress.c: calling armv7_switch_to_hyp()...
>>> uncompress.c: armv7_switch_to_hyp() OK. Now jumping...
>> Have you tried adding some debug output to barebox_non_pbl_start()?
>>
>> pr_debug and friends will only work after setup_c() is called, but you
>> can either use putc_ll() before that or directly write to the UART TX
>> register.
>>
>> Sascha
>>
> 
> 
> 

-- 
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  reply	other threads:[~2025-07-10 19:57 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-03 14:21 David Picard
2025-07-03 20:35 ` Sascha Hauer
2025-07-10 13:54   ` David Picard
2025-07-10 18:30     ` Ahmad Fatoum [this message]
2025-07-11  8:04       ` David Picard
2025-07-11  9:20         ` Ahmad Fatoum
2025-07-04 15:09 ` Ahmad Fatoum
2025-07-08 14:57   ` David Picard
2025-07-10 15:47   ` David Picard

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