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From: Giorgio Dal Molin <giorgio.nicole@arcor.de>
To: Ahmad Fatoum <a.fatoum@pengutronix.de>, barebox@lists.infradead.org
Subject: Re: barebox image for an spi flash (like m25p0) on an imx7 soc
Date: Fri, 6 Mar 2020 11:11:16 +0100 (CET)	[thread overview]
Message-ID: <1104087736.13112.1583489476516@mail.vodafone.de> (raw)
In-Reply-To: <1062353935.2358.1583401816499@mail.vodafone.de>

Hi,

I think I've found an error in the imx7 ref. manual: the table at 6.6.6.3 'QuadSPI
configuration parameters' should be placed at offset 0x00 (the very beginning of the
spi flash) and not at offset 0x400 as it is written on the ref. manual !!!

This means, if I look at the hex dump of the working u-boot image:

0000: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
0010: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 
0020: 0x03 0x00 0x00 0x00 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x00 0x00 0x00 0x00 
0030: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
0040: 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
0050: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
0060: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x3b 0x04 0x18 0x08 0x08 0x0d 0x04 0x1d 
0070: 0x00 0x24 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
0080: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
... < zeros > ...
0150: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
0160: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x01 0x00 0x00 0x00 0x00 
0170: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
0180: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
0190: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
01a0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
01b0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
01c0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
01d0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
01e0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
01f0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0xee 0xff 0xc0 
0200: 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 
...

what I see is that qspi parameters table (512 bytes long as described in the manual).

I think barebox does not support such an image layout.

giorgio

> barebox image.
> On March 5, 2020 at 10:50 AM Giorgio Dal Molin <giorgio.nicole@arcor.de> wrote:
> 
> 
> Hi,
> 
> thank you for the quick reply.
> 
> here is how I register the bbu for the spi flash:
> 
> imx7_bbu_internal_spi_i2c_register_handler("SPI", "/dev/m25p0", BBU_HANDLER_FLAG_DEFAULT);
> 
> and here is a hex dump of the spi flash after bb-updating (I hacked the 'cat' command a bit):
> 
> imx7d: / cat -h -b 0x450 /dev/m25p0
> 0000: 0xfe 0x03 0x00 0xea 0xfe 0xff 0xff 0xea 0xfe 0xff 0xff 0xea 0xfe 0xff 0xff 0xea 
> 0010: 0xfe 0xff 0xff 0xea 0xfe 0xff 0xff 0xea 0xfe 0xff 0xff 0xea 0xfe 0xff 0xff 0xea 
> 0020: 0x62 0x61 0x72 0x65 0x62 0x6f 0x78 0x00 0x00 0x00 0x00 0x00 0x00 0xf0 0x06 0x00 
> 0030: 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 
> 0040: 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55 
> 0050: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> ... < zeros > ...
> 03f0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0400: 0xd1 0x00 0x20 0x40 0x00 0x10 0x00 0x80 0x00 0x00 0x00 0x00 0x2c 0x04 0x00 0x80 
> 0410: 0x20 0x04 0x00 0x80 0x00 0x04 0x00 0x80 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0420: 0x00 0x00 0x00 0x80 0x00 0xf0 0x06 0x00 0x00 0x00 0x00 0x00 0xd2 0x01 0xbc 0x40 
> 0430: 0xcc 0x01 0x6c 0x04 0x30 0x34 0x00 0x04 0x0f 0x40 0x00 0x05 0x30 0x39 0x10 0x00 
> 0440: 0x00 0x00 0x00 0x02 0x30 0x7a 0x00 0x00 0x01 0x04 0x00 0x01 0x30 0x7a 0x01 0xa0 
> 
> It seems 'reasonable': there's a 0x400 bytes flash header and then the actual image
> starts, but it does not boot.
> 
> The following dump is a booting u-boot image, flashed from barebox with the commands:
> 
> imx7d: tftp ub.bin
> imx7d: erase /dev/m25p0
> imx7d: cp ub.bin /dev/m25p0
> imx7d: / cat -h -b 0x450 /dev/m25p0
> 0000: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0010: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 
> 0020: 0x03 0x00 0x00 0x00 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x00 0x00 0x00 0x00 
> 0030: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0040: 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0050: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0060: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x3b 0x04 0x18 0x08 0x08 0x0d 0x04 0x1d 
> 0070: 0x00 0x24 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0080: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> ... < zeros > ...
> 0150: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0160: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x01 0x00 0x00 0x00 0x00 
> 0170: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0180: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0190: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 01a0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 01b0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 01c0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 01d0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 01e0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 01f0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0xee 0xff 0xc0 
> 0200: 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 
> ... < ffs > ...
> 03f0: 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 
> 0400: 0xd1 0x00 0x20 0x40 0x00 0x10 0x91 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0410: 0x20 0x04 0x91 0x00 0x00 0x04 0x91 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0420: 0x00 0x00 0x91 0x00 0x00 0xa0 0x00 0x00 0x00 0x00 0x00 0x00 0xd2 0x00 0x04 0x40 
> 0430: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0440: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 
> 
> The first 4 bites at offset 0x400 are the same but then the u-boot working image is
> different.
> 
> ub: 0400: 0xd1 0x00 0x20 0x40 0x00 0x10 0x91 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> bb: 0400: 0xd1 0x00 0x20 0x40 0x00 0x10 0x00 0x80 0x00 0x00 0x00 0x00 0x2c 0x04 0x00 0x80 
> 
> Digging a bit in the IMX7DRM.pdf I found the table at 6.6.6.3 'QuadSPI configuration parameters':
> the table seems SPI-specific so it should be generated only in the special case of an SPI
> barebox image.
> 
> giorgio
> 
> > On March 5, 2020 at 10:05 AM Ahmad Fatoum <a.fatoum@pengutronix.de> wrote:
> > 
> > 
> > On 3/5/20 9:26 AM, Giorgio Dal Molin wrote:
> > > Hi,
> > > 
> > > does barebox support generating a bootloader image that's able to boot
> > > from an spi nor flash (m25p0) on an imx7 soc ?
> > > 
> > > I'm currently able to read/write/erase the flash and I can also 'barebox_update'
> > > the image on the flash but the imx7 does not want to boot from it.
> > > 
> > > After comparing a working u-boot image with what 'barebox_update' flashes I think
> > > the problem is the barebox image does not have the proper binary layout.
> > > 
> > > Is this use case already implemented or is it still a TODO ?
> > 
> > At what offset is the barebox partition you apply the barebox update to?
> > If the barebox partition offset is not at the very start, try setting offset
> > to zero.
> > 
> > Not sure about the i.MX7 specifically, but for other i.MX*, the image already
> > contains padding at the start, so it can directly be written to the medium, unlike
> > U-Boot, which needs to be written at an offset.
> > 
> > Cheers
> > Ahmad
> > 
> > > 
> > > thank you,
> > > giorgio
> > > 
> > > _______________________________________________
> > > barebox mailing list
> > > barebox@lists.infradead.org
> > > http://lists.infradead.org/mailman/listinfo/barebox
> > > 
> > 
> > 
> > -- 
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> > Steuerwalder Str. 21                       | https://www.pengutronix.de/ |
> > 31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
> > Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
> > 
> > _______________________________________________
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> 
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  parent reply	other threads:[~2020-03-06 10:11 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-05  8:26 Giorgio Dal Molin
2020-03-05  9:05 ` Ahmad Fatoum
2020-03-05  9:50   ` Giorgio Dal Molin
2020-03-05 13:24     ` Sascha Hauer
2020-03-05 13:54       ` Giorgio Dal Molin
2020-03-05 14:20         ` Rouven Czerwinski
2020-03-05 17:11           ` Giorgio
2020-03-06  8:41             ` Giorgio Dal Molin
2020-03-06 13:01               ` Sascha Hauer
2020-03-06 13:46                 ` Giorgio Dal Molin
2020-03-06 17:22                 ` Giorgio Dal Molin
2020-03-06 10:11     ` Giorgio Dal Molin [this message]
2020-03-06 12:59       ` Sascha Hauer
2020-03-06 14:08         ` Giorgio Dal Molin

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