* Add SD3 & I2C2 pin definitions for MX51
@ 2011-09-07 6:59 Alexander Shiyan
2011-09-19 10:05 ` Sascha Hauer
0 siblings, 1 reply; 3+ messages in thread
From: Alexander Shiyan @ 2011-09-07 6:59 UTC (permalink / raw)
To: barebox
[-- Attachment #1: Type: text/plain, Size: 3584 bytes --]
--- barebox-v2011.09.0.orig/arch/arm/mach-imx/include/mach/iomux-mx51.h 2011-08-26 18:23:46.000000000 +0400
+++ barebox-v2011.09.0/arch/arm/mach-imx/include/mach/iomux-mx51.h 2011-09-05 15:42:19.000000000 +0400
@@ -146,24 +146,37 @@
#define MX51_PAD_NANDF_CS7__NANDF_CS7 IOMUX_PAD(0x534, 0x14C, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_NANDF_CS7__FEC_TX_EN IOMUX_PAD(0x534, 0x14C, 1, 0x0, 0, MX51_FEC_PAD_CTRL)
+#define MX51_PAD_NANDF_CS7__SD3_CLK IOMUX_PAD(0x534, 0x14C, 5, 0x0, 0, MX51_FEC_PAD_CTRL)
#define MX51_PAD_NANDF_RDY_INT__NANDF_RDY_INT IOMUX_PAD(0x538, 0x150, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK IOMUX_PAD(0x538, 0x150, 1, 0x974, 0, MX51_FEC_PAD_CTRL)
+#define MX51_PAD_NANDF_RDY_INT__SD3_CMD IOMUX_PAD(0x538, 0x150, 5 | IOMUX_CONFIG_SION, 0, 0, MX51_FEC_PAD_CTRL)
#define MX51_PAD_NANDF_D15__NANDF_D15 IOMUX_PAD(0x53C, 0x154, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_NANDF_D15__SD3_DATA7 IOMUX_PAD(0x53C, 0x154, 5, 0x0, 0, NO_PAD_CTRL)
+
#define MX51_PAD_NANDF_D14__NANDF_D14 IOMUX_PAD(0x540, 0x158, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_NANDF_D14__SD3_DATA6 IOMUX_PAD(0x540, 0x158, 5, 0x0, 0, NO_PAD_CTRL)
+
#define MX51_PAD_NANDF_D13__NANDF_D13 IOMUX_PAD(0x544, 0x15C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_NANDF_D13__SD3_DATA5 IOMUX_PAD(0x544, 0x15C, 5, 0x0, 0, NO_PAD_CTRL)
+
#define MX51_PAD_NANDF_D12__NANDF_D12 IOMUX_PAD(0x548, 0x160, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_NANDF_D12__SD3_DATA4 IOMUX_PAD(0x548, 0x160, 5, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_NANDF_D11__NANDF_D11 IOMUX_PAD(0x54C, 0x164, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_NANDF_D11__FEC_RX_DV IOMUX_PAD(0x54C, 0x164, 2, 0x96c, 0, MX51_FEC_PAD_CTRL)
+#define MX51_PAD_NANDF_D11__SD3_DATA3 IOMUX_PAD(0x54C, 0x164, 5, 0x948, 1, MX51_FEC_PAD_CTRL)
#define MX51_PAD_NANDF_D10__NANDF_D10 IOMUX_PAD(0x550, 0x168, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_NANDF_D10__SD3_DATA2 IOMUX_PAD(0x550, 0x168, 5, 0x944, 1, NO_PAD_CTRL)
#define MX51_PAD_NANDF_D9__NANDF_D9 IOMUX_PAD(0x554, 0x16C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_NANDF_D9__SD3_DATA1 IOMUX_PAD(0x554, 0x16C, 5, 0x940, 1, NO_PAD_CTRL)
#define MX51_PAD_NANDF_D8__NANDF_D8 IOMUX_PAD(0x558, 0x170, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_NANDF_D8__FEC_TDATA0 IOMUX_PAD(0x558, 0x170, 2, 0x0, 0, MX51_FEC_PAD_CTRL)
+#define MX51_PAD_NANDF_D8__SD3_DATA0 IOMUX_PAD(0x558, 0x170, 5, 0x93c, 1, MX51_FEC_PAD_CTRL)
#define MX51_PAD_NANDF_D7__NANDF_D7 IOMUX_PAD(0x55C, 0x174, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_NANDF_D6__NANDF_D6 IOMUX_PAD(0x560, 0x178, 0, 0x0, 0, NO_PAD_CTRL)
@@ -337,8 +350,13 @@
#define MX51_PAD_SD2_DATA1__SD2_DATA1 IOMUX_PAD(0x7C8, 0x3C0, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_SD2_DATA2__SD2_DATA2 IOMUX_PAD(0x7CC, 0x3C4, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_SD2_DATA3__SD2_DATA3 IOMUX_PAD(0x7D0, 0x3C8, 0, 0x0, 0, NO_PAD_CTRL)
+
#define MX51_PAD_GPIO1_2__GPIO1_2 IOMUX_PAD(0x7D4, 0x3CC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO1_2__I2C2_SCL IOMUX_PAD(0x7D4, 0x3CC, 2 | IOMUX_CONFIG_SION, 0x9b8, 3, NO_PAD_CTRL)
+
#define MX51_PAD_GPIO1_3__GPIO1_3 IOMUX_PAD(0x7D8, 0x3D0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO1_3__I2C2_SDA IOMUX_PAD(0x7D8, 0x3D0, 2 | IOMUX_CONFIG_SION, 0x9bc, 3, NO_PAD_CTRL)
+
#define MX51_PAD_PMIC_INT_REQ__PMIC_INT_REQ IOMUX_PAD(0x7FC, 0x3D4, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_GPIO1_4__GPIO1_4 IOMUX_PAD(0x804, 0x3D8, 0, 0x0, 0, NO_PAD_CTRL)
#define MX51_PAD_GPIO1_5__GPIO1_5 IOMUX_PAD(0x808, 0x3DC, 0, 0x0, 0, NO_PAD_CTRL)
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: Add SD3 & I2C2 pin definitions for MX51
2011-09-07 6:59 Add SD3 & I2C2 pin definitions for MX51 Alexander Shiyan
@ 2011-09-19 10:05 ` Sascha Hauer
2011-09-20 10:10 ` Alexander Shiyan
0 siblings, 1 reply; 3+ messages in thread
From: Sascha Hauer @ 2011-09-19 10:05 UTC (permalink / raw)
To: Alexander Shiyan; +Cc: barebox
On Wed, Sep 07, 2011 at 10:59:07AM +0400, Alexander Shiyan wrote:
> --- barebox-v2011.09.0.orig/arch/arm/mach-imx/include/mach/iomux-mx51.h 2011-08-26 18:23:46.000000000 +0400
> +++ barebox-v2011.09.0/arch/arm/mach-imx/include/mach/iomux-mx51.h 2011-09-05 15:42:19.000000000 +0400
> @@ -146,24 +146,37 @@
>
> #define MX51_PAD_NANDF_CS7__NANDF_CS7 IOMUX_PAD(0x534, 0x14C, 0, 0x0, 0, NO_PAD_CTRL)
> #define MX51_PAD_NANDF_CS7__FEC_TX_EN IOMUX_PAD(0x534, 0x14C, 1, 0x0, 0, MX51_FEC_PAD_CTRL)
> +#define MX51_PAD_NANDF_CS7__SD3_CLK IOMUX_PAD(0x534, 0x14C, 5, 0x0, 0, MX51_FEC_PAD_CTRL)
>
> #define MX51_PAD_NANDF_RDY_INT__NANDF_RDY_INT IOMUX_PAD(0x538, 0x150, 0, 0x0, 0, NO_PAD_CTRL)
> #define MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK IOMUX_PAD(0x538, 0x150, 1, 0x974, 0, MX51_FEC_PAD_CTRL)
> +#define MX51_PAD_NANDF_RDY_INT__SD3_CMD IOMUX_PAD(0x538, 0x150, 5 | IOMUX_CONFIG_SION, 0, 0, MX51_FEC_PAD_CTRL)
>
> #define MX51_PAD_NANDF_D15__NANDF_D15 IOMUX_PAD(0x53C, 0x154, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_NANDF_D15__SD3_DATA7 IOMUX_PAD(0x53C, 0x154, 5, 0x0, 0, NO_PAD_CTRL)
> +
> #define MX51_PAD_NANDF_D14__NANDF_D14 IOMUX_PAD(0x540, 0x158, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_NANDF_D14__SD3_DATA6 IOMUX_PAD(0x540, 0x158, 5, 0x0, 0, NO_PAD_CTRL)
> +
> #define MX51_PAD_NANDF_D13__NANDF_D13 IOMUX_PAD(0x544, 0x15C, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_NANDF_D13__SD3_DATA5 IOMUX_PAD(0x544, 0x15C, 5, 0x0, 0, NO_PAD_CTRL)
> +
> #define MX51_PAD_NANDF_D12__NANDF_D12 IOMUX_PAD(0x548, 0x160, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_NANDF_D12__SD3_DATA4 IOMUX_PAD(0x548, 0x160, 5, 0x0, 0, NO_PAD_CTRL)
>
> #define MX51_PAD_NANDF_D11__NANDF_D11 IOMUX_PAD(0x54C, 0x164, 0, 0x0, 0, NO_PAD_CTRL)
> #define MX51_PAD_NANDF_D11__FEC_RX_DV IOMUX_PAD(0x54C, 0x164, 2, 0x96c, 0, MX51_FEC_PAD_CTRL)
> +#define MX51_PAD_NANDF_D11__SD3_DATA3 IOMUX_PAD(0x54C, 0x164, 5, 0x948, 1, MX51_FEC_PAD_CTRL)
>
> #define MX51_PAD_NANDF_D10__NANDF_D10 IOMUX_PAD(0x550, 0x168, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_NANDF_D10__SD3_DATA2 IOMUX_PAD(0x550, 0x168, 5, 0x944, 1, NO_PAD_CTRL)
>
> #define MX51_PAD_NANDF_D9__NANDF_D9 IOMUX_PAD(0x554, 0x16C, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_NANDF_D9__SD3_DATA1 IOMUX_PAD(0x554, 0x16C, 5, 0x940, 1, NO_PAD_CTRL)
>
> #define MX51_PAD_NANDF_D8__NANDF_D8 IOMUX_PAD(0x558, 0x170, 0, 0x0, 0, NO_PAD_CTRL)
> #define MX51_PAD_NANDF_D8__FEC_TDATA0 IOMUX_PAD(0x558, 0x170, 2, 0x0, 0, MX51_FEC_PAD_CTRL)
> +#define MX51_PAD_NANDF_D8__SD3_DATA0 IOMUX_PAD(0x558, 0x170, 5, 0x93c, 1, MX51_FEC_PAD_CTRL)
>
> #define MX51_PAD_NANDF_D7__NANDF_D7 IOMUX_PAD(0x55C, 0x174, 0, 0x0, 0, NO_PAD_CTRL)
> #define MX51_PAD_NANDF_D6__NANDF_D6 IOMUX_PAD(0x560, 0x178, 0, 0x0, 0, NO_PAD_CTRL)
> @@ -337,8 +350,13 @@
> #define MX51_PAD_SD2_DATA1__SD2_DATA1 IOMUX_PAD(0x7C8, 0x3C0, 0, 0x0, 0, NO_PAD_CTRL)
> #define MX51_PAD_SD2_DATA2__SD2_DATA2 IOMUX_PAD(0x7CC, 0x3C4, 0, 0x0, 0, NO_PAD_CTRL)
> #define MX51_PAD_SD2_DATA3__SD2_DATA3 IOMUX_PAD(0x7D0, 0x3C8, 0, 0x0, 0, NO_PAD_CTRL)
> +
> #define MX51_PAD_GPIO1_2__GPIO1_2 IOMUX_PAD(0x7D4, 0x3CC, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_GPIO1_2__I2C2_SCL IOMUX_PAD(0x7D4, 0x3CC, 2 | IOMUX_CONFIG_SION, 0x9b8, 3, NO_PAD_CTRL)
> +
I think the i2c pads need a pullup, right?
Sascha
> #define MX51_PAD_GPIO1_3__GPIO1_3 IOMUX_PAD(0x7D8, 0x3D0, 0, 0x0, 0, NO_PAD_CTRL)
> +#define MX51_PAD_GPIO1_3__I2C2_SDA IOMUX_PAD(0x7D8, 0x3D0, 2 | IOMUX_CONFIG_SION, 0x9bc, 3, NO_PAD_CTRL)
> +
> #define MX51_PAD_PMIC_INT_REQ__PMIC_INT_REQ IOMUX_PAD(0x7FC, 0x3D4, 0, 0x0, 0, NO_PAD_CTRL)
> #define MX51_PAD_GPIO1_4__GPIO1_4 IOMUX_PAD(0x804, 0x3D8, 0, 0x0, 0, NO_PAD_CTRL)
> #define MX51_PAD_GPIO1_5__GPIO1_5 IOMUX_PAD(0x808, 0x3DC, 0, 0x0, 0, NO_PAD_CTRL)
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: Add SD3 & I2C2 pin definitions for MX51
2011-09-19 10:05 ` Sascha Hauer
@ 2011-09-20 10:10 ` Alexander Shiyan
0 siblings, 0 replies; 3+ messages in thread
From: Alexander Shiyan @ 2011-09-20 10:10 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
[-- Attachment #1: Type: text/plain, Size: 721 bytes --]
Sascha Hauer <s.hauer@pengutronix.de> wrote ..
> On Wed, Sep 07, 2011 at 10:59:07AM +0400, Alexander Shiyan wrote:
> > --- barebox-v2011.09.0.orig/arch/arm/mach-imx/include/mach/iomux-mx51.h 2011-08-26
> 18:23:46.000000000 +0400
> > +++ barebox-v2011.09.0/arch/arm/mach-imx/include/mach/iomux-mx51.h 2011-09-05
> 15:42:19.000000000 +0400
> > @@ -146,24 +146,37 @@
> >
...
> > #define MX51_PAD_GPIO1_2__GPIO1_2 IOMUX_PAD(0x7D4, 0x3CC, 0, 0x0, 0, NO_PAD_CTRL)
> > +#define MX51_PAD_GPIO1_2__I2C2_SCL IOMUX_PAD(0x7D4, 0x3CC, 2 | IOMUX_CONFIG_SION,
> 0x9b8, 3, NO_PAD_CTRL)
> > +
>
> I think the i2c pads need a pullup, right?
Maybe, but it worked without pull-up because pull-up resistors are provided on the module.
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2011-09-19 10:05 ` Sascha Hauer
2011-09-20 10:10 ` Alexander Shiyan
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