From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 07/14] ppc mpc5200b: cleanup lowlevel startup
Date: Tue, 27 Sep 2011 10:28:22 +0200 [thread overview]
Message-ID: <1317112109-23311-8-git-send-email-s.hauer@pengutronix.de> (raw)
In-Reply-To: <1317112109-23311-1-git-send-email-s.hauer@pengutronix.de>
The old startup process consisted of several CFG_LOWBOOT,
CFG_RAMBOOT ifdeffery which I do not understand. So remove
all this and replace it with:
- put the entry point for second stage loaders to offset 0x0
so that we can do a go /dev/ram0 to start a second barebox
- When we come from the reset vector assume MBAR is at 0x80000000
- When we come from the second stage entry assume that
SPR 311 is in sync with the current MBAR address.
- Switch MBAR to 0xf0000000 and we are done.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/ppc/mach-mpc5xxx/start.S | 75 ++++++++++------------------------------
1 files changed, 19 insertions(+), 56 deletions(-)
diff --git a/arch/ppc/mach-mpc5xxx/start.S b/arch/ppc/mach-mpc5xxx/start.S
index 2627e5d..d619460 100644
--- a/arch/ppc/mach-mpc5xxx/start.S
+++ b/arch/ppc/mach-mpc5xxx/start.S
@@ -66,69 +66,32 @@
* Exception vectors
*/
.text
+ /*
+ * Second stage loader entry. When entered here we assume that spr 311
+ * is set to the current MBAR address.
+ */
+ mfspr r4, MBAR
+ b setup_mbar
. = EXC_OFF_SYS_RESET
.globl _start
_start:
- li r21, BOOTFLAG_COLD /* Normal Power-On */
- nop
- b boot_cold
-
- . = EXC_OFF_SYS_RESET + 0x10
-
- .globl _start_warm
-_start_warm:
- li r21, BOOTFLAG_WARM /* Software reboot */
- b boot_warm
+ /*
+ * Reset entry. When entered here we assume that MBAR is at reset default
+ * 0x80000000.
+ */
+ lis r4, 0x80000000@h
+ ori r4, r4, 0x80000000@l
-boot_cold:
-boot_warm:
+setup_mbar:
+ /* r4 == current MBAR */
mfmsr r5 /* save msr contents */
- /* Move CSBoot and adjust instruction pointer */
- /*--------------------------------------------------------------*/
-
-#if defined(CFG_LOWBOOT)
-# if defined(CFG_RAMBOOT)
-# error CFG_LOWBOOT is incompatible with CFG_RAMBOOT
-# endif /* CFG_RAMBOOT */
- lis r4, CFG_DEFAULT_MBAR@h
- lis r3, START_REG(CFG_BOOTCS_START)@h
- ori r3, r3, START_REG(CFG_BOOTCS_START)@l
- stw r3, 0x4(r4) /* CS0 start */
- lis r3, STOP_REG(CFG_BOOTCS_START, CFG_BOOTCS_SIZE)@h
- ori r3, r3, STOP_REG(CFG_BOOTCS_START, CFG_BOOTCS_SIZE)@l
- stw r3, 0x8(r4) /* CS0 stop */
- lis r3, 0x02010000@h
- ori r3, r3, 0x02010000@l
- stw r3, 0x54(r4) /* CS0 and Boot enable */
-
- lis r3, lowboot_reentry@h /* jump from bootlow address space (0x0000xxxx) */
- ori r3, r3, lowboot_reentry@l /* to the address space the linker used */
- mtlr r3
- blr
-
-lowboot_reentry:
- lis r3, START_REG(CFG_BOOTCS_START)@h
- ori r3, r3, START_REG(CFG_BOOTCS_START)@l
- stw r3, 0x4c(r4) /* Boot start */
- lis r3, STOP_REG(CFG_BOOTCS_START, CFG_BOOTCS_SIZE)@h
- ori r3, r3, STOP_REG(CFG_BOOTCS_START, CFG_BOOTCS_SIZE)@l
- stw r3, 0x50(r4) /* Boot stop */
- lis r3, 0x02000001@h
- ori r3, r3, 0x02000001@l
- stw r3, 0x54(r4) /* Boot enable, CS0 disable */
-#endif /* CFG_LOWBOOT */
-
-#if defined(CFG_DEFAULT_MBAR) && !defined(CFG_RAMBOOT)
- lis r3, CFG_MBAR@h
- ori r3, r3, CFG_MBAR@l
- /* MBAR is mirrored into the MBAR SPR */
- mtspr MBAR,r3
+ /* Switch MBAR to 0xf0000000 */
+ lis r3, 0xf0000000@h
+ ori r3, r3, 0xf0000000@l
+ mtspr MBAR, r3
rlwinm r3, r3, 16, 16, 31
-
- lis r4, CFG_DEFAULT_MBAR@h
stw r3, 0(r4)
-#endif /* CFG_DEFAULT_MBAR */
/* Initialise the MPC5xxx processor core */
/*--------------------------------------------------------------*/
--
1.7.6.3
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next prev parent reply other threads:[~2011-09-27 8:28 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-27 8:28 more ppc and pcm030 cleanup Sascha Hauer
2011-09-27 8:28 ` [PATCH 01/14] ppc: remove mgt5100 support from code Sascha Hauer
2011-09-27 8:28 ` [PATCH 02/14] ppc: add a get_pc() function Sascha Hauer
2011-09-27 8:28 ` [PATCH 03/14] remove EARLY_INIT and EARLY_CONSOLE support Sascha Hauer
2011-09-27 8:28 ` [PATCH 04/14] ppc mpc5200: add function to determine configured sdram size Sascha Hauer
2011-09-27 8:28 ` [PATCH 05/14] ppc mpc5200: add function to configure a chipselect Sascha Hauer
2011-09-27 8:28 ` [PATCH 06/14] ppc mpc5200: add function to setup bus clocks Sascha Hauer
2011-09-27 8:28 ` Sascha Hauer [this message]
2011-09-27 8:28 ` [PATCH 08/14] pcm030: use new functionality Sascha Hauer
2011-09-27 8:28 ` [PATCH 09/14] ppc: hardcode sdram base to 0x0 Sascha Hauer
2011-09-27 8:28 ` [PATCH 10/14] mpc5200: hardcode MBAR to 0xf0000000 Sascha Hauer
2011-09-27 8:28 ` [PATCH 11/14] mpc5200: hardcode internal sram for initram Sascha Hauer
2011-09-27 8:28 ` [PATCH 12/14] pcm030: fix /dev/self0 and /dev/env0 Sascha Hauer
2011-09-27 8:28 ` [PATCH 13/14] ppc mpc5200: remove bus clock switching from generic code Sascha Hauer
2011-09-27 8:28 ` [PATCH 14/14] pcm030: cleanup config.h Sascha Hauer
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