* [RFC PATCH V2 0/6] ARM: initial Tegra support
@ 2011-10-28 13:24 Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 1/6] " Antony Pavlov
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: Antony Pavlov @ 2011-10-28 13:24 UTC (permalink / raw)
To: barebox
This series make possible to run barebox on the Toshiba AC100 smartbook.
The smartbook is based on Tegra2 chipset.
This patches are very preliminary and lack many important things
such mmu&cache support and clocksource programming;
so to start barebox you need u-boot for hardware initialisation.
U-Boot for Toshiba AC100:
https://github.com/chpec/uboot-ac100.git
Linux for Toshiba AC100:
git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFC PATCH V2 1/6] ARM: initial Tegra support
2011-10-28 13:24 [RFC PATCH V2 0/6] ARM: initial Tegra support Antony Pavlov
@ 2011-10-28 13:24 ` Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 2/6] dirty hack, fixme: disable mmu_cache_flush in arch/arm/cpu/start.c for Tegra Antony Pavlov
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Antony Pavlov @ 2011-10-28 13:24 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/arm/Kconfig | 6 +
arch/arm/Makefile | 1 +
arch/arm/mach-tegra/Kconfig | 7 +
arch/arm/mach-tegra/Makefile | 2 +
arch/arm/mach-tegra/clock.c | 59 ++++++
arch/arm/mach-tegra/include/mach/debug_ll.h | 44 ++++
arch/arm/mach-tegra/include/mach/iomap.h | 292 +++++++++++++++++++++++++++
arch/arm/mach-tegra/reset.c | 43 ++++
8 files changed, 454 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-tegra/Kconfig
create mode 100644 arch/arm/mach-tegra/Makefile
create mode 100644 arch/arm/mach-tegra/clock.c
create mode 100644 arch/arm/mach-tegra/include/mach/debug_ll.h
create mode 100644 arch/arm/mach-tegra/include/mach/iomap.h
create mode 100644 arch/arm/mach-tegra/reset.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b15728e..3eda360 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -71,6 +71,11 @@ config ARCH_VERSATILE
bool "ARM Versatile boards (ARM926EJ-S)"
select CPU_ARM926T
+config ARCH_TEGRA
+ bool "Nvidia Tegra-based boards"
+ select CPU_ARM926T
+ select HAS_DEBUG_LL
+
endchoice
source arch/arm/cpu/Kconfig
@@ -83,6 +88,7 @@ source arch/arm/mach-nomadik/Kconfig
source arch/arm/mach-omap/Kconfig
source arch/arm/mach-s3c24xx/Kconfig
source arch/arm/mach-versatile/Kconfig
+source arch/arm/mach-tegra/Kconfig
config ARM_ASM_UNIFIED
bool
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 0c42f3d..78a8a44 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -52,6 +52,7 @@ machine-$(CONFIG_ARCH_NETX) := netx
machine-$(CONFIG_ARCH_OMAP) := omap
machine-$(CONFIG_ARCH_S3C24xx) := s3c24xx
machine-$(CONFIG_ARCH_VERSATILE) := versatile
+machine-$(CONFIG_ARCH_TEGRA) := tegra
# Board directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
new file mode 100644
index 0000000..b0cc3cd
--- /dev/null
+++ b/arch/arm/mach-tegra/Kconfig
@@ -0,0 +1,7 @@
+if ARCH_TEGRA
+
+config ARCH_TEXT_BASE
+ hex
+ default 0x31fc0000
+
+endif
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
new file mode 100644
index 0000000..11915e5
--- /dev/null
+++ b/arch/arm/mach-tegra/Makefile
@@ -0,0 +1,2 @@
+obj-y += clock.o
+obj-y += reset.o
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
new file mode 100644
index 0000000..9c8b29c
--- /dev/null
+++ b/arch/arm/mach-tegra/clock.c
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2011 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+/**
+ * @file
+ * @brief Clocksource based on Tegra internal timer
+ */
+
+#include <common.h>
+#include <clock.h>
+#include <linux/list.h>
+#include <linux/clk.h>
+#include <init.h>
+#include <asm/io.h>
+#include <mach/iomap.h>
+
+static void __iomem *timer_reg_base = (void __iomem *) (TEGRA_TMR1_BASE);
+
+#define timer_writel(value, reg) \
+ __raw_writel(value, (u32)timer_reg_base + (reg))
+#define timer_readl(reg) \
+ __raw_readl((u32)timer_reg_base + (reg))
+
+static uint64_t tegra_clocksource_read(void)
+{
+ return timer_readl(0x10);
+}
+
+static struct clocksource cs = {
+ .read = tegra_clocksource_read,
+ .mask = 0xffffffff,
+};
+
+/* FIXME: here we have no initialization. All initialization made by U-Boot */
+static int clocksource_init(void)
+{
+ cs.mult = clocksource_hz2mult(1000000, cs.shift);
+ init_clock(&cs);
+
+ return 0;
+}
+core_initcall(clocksource_init);
diff --git a/arch/arm/mach-tegra/include/mach/debug_ll.h b/arch/arm/mach-tegra/include/mach/debug_ll.h
new file mode 100644
index 0000000..37602da
--- /dev/null
+++ b/arch/arm/mach-tegra/include/mach/debug_ll.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2011 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+/** @file
+ * This File contains declaration for early output support
+ */
+#ifndef __INCLUDE_ARCH_DEBUG_LL_H__
+#define __INCLUDE_ARCH_DEBUG_LL_H__
+
+#include <asm/io.h>
+#include <mach/iomap.h>
+
+#define DEBUG_LL_UART_ADDR TEGRA_UARTA_BASE
+#define DEBUG_LL_UART_RSHFT 2
+
+#define rbr (0 << DEBUG_LL_UART_RSHFT)
+#define lsr (5 << DEBUG_LL_UART_RSHFT)
+#define LSR_THRE 0x20 /* Xmit holding register empty */
+
+static __inline__ void putc(char ch)
+{
+ __raw_writeb(ch, DEBUG_LL_UART_ADDR + rbr);
+
+ while (!(__raw_readb(DEBUG_LL_UART_ADDR + lsr) & LSR_THRE));
+}
+
+#endif /* __INCLUDE_ARCH_DEBUG_LL_H__ */
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h
new file mode 100644
index 0000000..ba478e7
--- /dev/null
+++ b/arch/arm/mach-tegra/include/mach/iomap.h
@@ -0,0 +1,292 @@
+/*
+ * arch/arm/mach-tegra/include/mach/iomap.h
+ *
+ * Copyright (C) 2010 Google, Inc.
+ *
+ * Author:
+ * Colin Cross <ccross@google.com>
+ * Erik Gilling <konkers@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MACH_TEGRA_IOMAP_H
+#define __MACH_TEGRA_IOMAP_H
+
+#include <sizes.h>
+
+#define TEGRA_IRAM_BASE 0x40000000
+#define TEGRA_IRAM_SIZE SZ_256K
+
+#define TEGRA_HOST1X_BASE 0x50000000
+#define TEGRA_HOST1X_SIZE 0x24000
+
+#define TEGRA_ARM_PERIF_BASE 0x50040000
+#define TEGRA_ARM_PERIF_SIZE SZ_8K
+
+#define TEGRA_ARM_PL310_BASE 0x50043000
+#define TEGRA_ARM_PL310_SIZE SZ_4K
+
+#define TEGRA_ARM_INT_DIST_BASE 0x50041000
+#define TEGRA_ARM_INT_DIST_SIZE SZ_4K
+
+#define TEGRA_MPE_BASE 0x54040000
+#define TEGRA_MPE_SIZE SZ_256K
+
+#define TEGRA_VI_BASE 0x54080000
+#define TEGRA_VI_SIZE SZ_256K
+
+#define TEGRA_ISP_BASE 0x54100000
+#define TEGRA_ISP_SIZE SZ_256K
+
+#define TEGRA_DISPLAY_BASE 0x54200000
+#define TEGRA_DISPLAY_SIZE SZ_256K
+
+#define TEGRA_DISPLAY2_BASE 0x54240000
+#define TEGRA_DISPLAY2_SIZE SZ_256K
+
+#define TEGRA_HDMI_BASE 0x54280000
+#define TEGRA_HDMI_SIZE SZ_256K
+
+#define TEGRA_GART_BASE 0x58000000
+#define TEGRA_GART_SIZE SZ_32M
+
+#define TEGRA_RES_SEMA_BASE 0x60001000
+#define TEGRA_RES_SEMA_SIZE SZ_4K
+
+#define TEGRA_HDMI_BASE 0x54280000
+#define TEGRA_HDMI_SIZE SZ_256K
+
+#define TEGRA_GART_BASE 0x58000000
+#define TEGRA_GART_SIZE SZ_32M
+
+#define TEGRA_RES_SEMA_BASE 0x60001000
+#define TEGRA_RES_SEMA_SIZE SZ_4K
+
+#define TEGRA_ARB_SEMA_BASE 0x60002000
+#define TEGRA_ARB_SEMA_SIZE SZ_4K
+
+#define TEGRA_PRIMARY_ICTLR_BASE 0x60004000
+#define TEGRA_PRIMARY_ICTLR_SIZE 64
+
+#define TEGRA_ARBGNT_ICTLR_BASE 0x60004040
+#define TEGRA_ARBGNT_ICTLR_SIZE 192
+
+#define TEGRA_SECONDARY_ICTLR_BASE 0x60004100
+#define TEGRA_SECONDARY_ICTLR_SIZE 64
+
+#define TEGRA_TERTIARY_ICTLR_BASE 0x60004200
+#define TEGRA_TERTIARY_ICTLR_SIZE 64
+
+#define TEGRA_QUATERNARY_ICTLR_BASE 0x60004300
+#define TEGRA_QUATERNARY_ICTLR_SIZE 64
+
+#define TEGRA_TMR1_BASE 0x60005000
+#define TEGRA_TMR1_SIZE 8
+
+#define TEGRA_TMR2_BASE 0x60005008
+#define TEGRA_TMR2_SIZE 8
+
+#define TEGRA_TMRUS_BASE 0x60005010
+#define TEGRA_TMRUS_SIZE 64
+
+#define TEGRA_TMR3_BASE 0x60005050
+#define TEGRA_TMR3_SIZE 8
+
+#define TEGRA_TMR4_BASE 0x60005058
+#define TEGRA_TMR4_SIZE 8
+
+#define TEGRA_CLK_RESET_BASE 0x60006000
+#define TEGRA_CLK_RESET_SIZE SZ_4K
+
+#define TEGRA_FLOW_CTRL_BASE 0x60007000
+#define TEGRA_FLOW_CTRL_SIZE 20
+
+#define TEGRA_AHB_DMA_BASE 0x60008000
+#define TEGRA_AHB_DMA_SIZE SZ_4K
+
+#define TEGRA_AHB_DMA_CH0_BASE 0x60009000
+#define TEGRA_AHB_DMA_CH0_SIZE 32
+
+#define TEGRA_APB_DMA_BASE 0x6000A000
+#define TEGRA_APB_DMA_SIZE SZ_4K
+
+#define TEGRA_APB_DMA_CH0_BASE 0x6000B000
+#define TEGRA_APB_DMA_CH0_SIZE 32
+
+#define TEGRA_AHB_GIZMO_BASE 0x6000C004
+#define TEGRA_AHB_GIZMO_SIZE 0x10C
+
+#define TEGRA_STATMON_BASE 0x6000C400
+#define TEGRA_STATMON_SIZE SZ_1K
+
+#define TEGRA_GPIO_BASE 0x6000D000
+#define TEGRA_GPIO_SIZE SZ_4K
+
+#define TEGRA_EXCEPTION_VECTORS_BASE 0x6000F000
+#define TEGRA_EXCEPTION_VECTORS_SIZE SZ_4K
+
+#define TEGRA_VDE_BASE 0x6001A000
+#define TEGRA_VDE_SIZE (SZ_8K + SZ_4K - SZ_256)
+
+#define TEGRA_APB_MISC_BASE 0x70000000
+#define TEGRA_APB_MISC_SIZE SZ_4K
+
+#define TEGRA_APB_MISC_DAS_BASE 0x70000c00
+#define TEGRA_APB_MISC_DAS_SIZE SZ_128
+
+#define TEGRA_AC97_BASE 0x70002000
+#define TEGRA_AC97_SIZE SZ_512
+
+#define TEGRA_SPDIF_BASE 0x70002400
+#define TEGRA_SPDIF_SIZE SZ_512
+
+#define TEGRA_I2S1_BASE 0x70002800
+#define TEGRA_I2S1_SIZE SZ_256
+
+#define TEGRA_I2S2_BASE 0x70002A00
+#define TEGRA_I2S2_SIZE SZ_256
+
+#define TEGRA_UARTA_BASE 0x70006000
+#define TEGRA_UARTA_SIZE 64
+
+#define TEGRA_UARTB_BASE 0x70006040
+#define TEGRA_UARTB_SIZE 64
+
+#define TEGRA_UARTC_BASE 0x70006200
+#define TEGRA_UARTC_SIZE SZ_256
+
+#define TEGRA_UARTD_BASE 0x70006300
+#define TEGRA_UARTD_SIZE SZ_256
+
+#define TEGRA_UARTE_BASE 0x70006400
+#define TEGRA_UARTE_SIZE SZ_256
+
+#define TEGRA_NAND_BASE 0x70008000
+#define TEGRA_NAND_SIZE SZ_256
+
+#define TEGRA_HSMMC_BASE 0x70008500
+#define TEGRA_HSMMC_SIZE SZ_256
+
+#define TEGRA_SNOR_BASE 0x70009000
+#define TEGRA_SNOR_SIZE SZ_4K
+
+#define TEGRA_PWFM_BASE 0x7000A000
+#define TEGRA_PWFM_SIZE SZ_256
+
+#define TEGRA_PWFM0_BASE 0x7000A000
+#define TEGRA_PWFM0_SIZE 4
+
+#define TEGRA_PWFM1_BASE 0x7000A010
+#define TEGRA_PWFM1_SIZE 4
+
+#define TEGRA_PWFM2_BASE 0x7000A020
+#define TEGRA_PWFM2_SIZE 4
+
+#define TEGRA_PWFM3_BASE 0x7000A030
+#define TEGRA_PWFM3_SIZE 4
+
+#define TEGRA_MIPI_BASE 0x7000B000
+#define TEGRA_MIPI_SIZE SZ_256
+
+#define TEGRA_I2C_BASE 0x7000C000
+#define TEGRA_I2C_SIZE SZ_256
+
+#define TEGRA_TWC_BASE 0x7000C100
+#define TEGRA_TWC_SIZE SZ_256
+
+#define TEGRA_SPI_BASE 0x7000C380
+#define TEGRA_SPI_SIZE 48
+
+#define TEGRA_I2C2_BASE 0x7000C400
+#define TEGRA_I2C2_SIZE SZ_256
+
+#define TEGRA_I2C3_BASE 0x7000C500
+#define TEGRA_I2C3_SIZE SZ_256
+
+#define TEGRA_OWR_BASE 0x7000C600
+#define TEGRA_OWR_SIZE 80
+
+#define TEGRA_DVC_BASE 0x7000D000
+#define TEGRA_DVC_SIZE SZ_512
+
+#define TEGRA_SPI1_BASE 0x7000D400
+#define TEGRA_SPI1_SIZE SZ_512
+
+#define TEGRA_SPI2_BASE 0x7000D600
+#define TEGRA_SPI2_SIZE SZ_512
+
+#define TEGRA_SPI3_BASE 0x7000D800
+#define TEGRA_SPI3_SIZE SZ_512
+
+#define TEGRA_SPI4_BASE 0x7000DA00
+#define TEGRA_SPI4_SIZE SZ_512
+
+#define TEGRA_RTC_BASE 0x7000E000
+#define TEGRA_RTC_SIZE SZ_256
+
+#define TEGRA_KBC_BASE 0x7000E200
+#define TEGRA_KBC_SIZE SZ_256
+
+#define TEGRA_PMC_BASE 0x7000E400
+#define TEGRA_PMC_SIZE SZ_256
+
+#define TEGRA_MC_BASE 0x7000F000
+#define TEGRA_MC_SIZE SZ_1K
+
+#define TEGRA_EMC_BASE 0x7000F400
+#define TEGRA_EMC_SIZE SZ_1K
+
+#define TEGRA_FUSE_BASE 0x7000F800
+#define TEGRA_FUSE_SIZE SZ_1K
+
+#define TEGRA_KFUSE_BASE 0x7000FC00
+#define TEGRA_KFUSE_SIZE SZ_1K
+
+#define TEGRA_CSITE_BASE 0x70040000
+#define TEGRA_CSITE_SIZE SZ_256K
+
+#define TEGRA_USB_BASE 0xC5000000
+#define TEGRA_USB_SIZE SZ_16K
+
+#define TEGRA_USB2_BASE 0xC5004000
+#define TEGRA_USB2_SIZE SZ_16K
+
+#define TEGRA_USB3_BASE 0xC5008000
+#define TEGRA_USB3_SIZE SZ_16K
+
+#define TEGRA_SDMMC1_BASE 0xC8000000
+#define TEGRA_SDMMC1_SIZE SZ_512
+
+#define TEGRA_SDMMC2_BASE 0xC8000200
+#define TEGRA_SDMMC2_SIZE SZ_512
+
+#define TEGRA_SDMMC3_BASE 0xC8000400
+#define TEGRA_SDMMC3_SIZE SZ_512
+
+#define TEGRA_SDMMC4_BASE 0xC8000600
+#define TEGRA_SDMMC4_SIZE SZ_512
+
+#if defined(CONFIG_TEGRA_DEBUG_UART_NONE)
+# define TEGRA_DEBUG_UART_BASE 0
+#elif defined(CONFIG_TEGRA_DEBUG_UARTA)
+# define TEGRA_DEBUG_UART_BASE TEGRA_UARTA_BASE
+#elif defined(CONFIG_TEGRA_DEBUG_UARTB)
+# define TEGRA_DEBUG_UART_BASE TEGRA_UARTB_BASE
+#elif defined(CONFIG_TEGRA_DEBUG_UARTC)
+# define TEGRA_DEBUG_UART_BASE TEGRA_UARTC_BASE
+#elif defined(CONFIG_TEGRA_DEBUG_UARTD)
+# define TEGRA_DEBUG_UART_BASE TEGRA_UARTD_BASE
+#elif defined(CONFIG_TEGRA_DEBUG_UARTE)
+# define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE
+#endif
+
+#endif
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
new file mode 100644
index 0000000..acd5911
--- /dev/null
+++ b/arch/arm/mach-tegra/reset.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2011 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+/**
+ * @file
+ * @brief Resetting an malta board
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <mach/iomap.h>
+
+#define PRM_RSTCTRL TEGRA_PMC_BASE
+
+void __noreturn reset_cpu(ulong addr)
+{
+ int rstctrl;
+
+ rstctrl = __raw_readl((char *)PRM_RSTCTRL);
+ rstctrl |= 0x10;
+ __raw_writel(rstctrl, (char *)PRM_RSTCTRL);
+
+ while (1);
+ /*NOTREACHED*/
+}
+EXPORT_SYMBOL(reset_cpu);
--
1.7.7
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFC PATCH V2 2/6] dirty hack, fixme: disable mmu_cache_flush in arch/arm/cpu/start.c for Tegra
2011-10-28 13:24 [RFC PATCH V2 0/6] ARM: initial Tegra support Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 1/6] " Antony Pavlov
@ 2011-10-28 13:24 ` Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 3/6] ARM: Tegra: add Toshiba AC100 support Antony Pavlov
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Antony Pavlov @ 2011-10-28 13:24 UTC (permalink / raw)
To: barebox
Initial Tegra support has no initialisation routines, so
it can't initialise the caches in the right way.
MMU & cache code in arch/arm/cpu/start.c hangs up a Tegra-based system.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/arm/cpu/start.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index f8eb0a9..69fb5b0 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -74,6 +74,8 @@ void __naked __bare_init reset(void)
#ifdef CONFIG_ARCH_HAS_LOWLEVEL_INIT
arch_init_lowlevel();
#endif
+
+#ifndef CONFIG_ARCH_TEGRA
__asm__ __volatile__ (
"bl __mmu_cache_flush;"
:
@@ -89,6 +91,7 @@ void __naked __bare_init reset(void)
r |= CR_B;
#endif
set_cr(r);
+#endif
#ifdef CONFIG_MACH_DO_LOWLEVEL_INIT
board_init_lowlevel();
--
1.7.7
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFC PATCH V2 3/6] ARM: Tegra: add Toshiba AC100 support
2011-10-28 13:24 [RFC PATCH V2 0/6] ARM: initial Tegra support Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 1/6] " Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 2/6] dirty hack, fixme: disable mmu_cache_flush in arch/arm/cpu/start.c for Tegra Antony Pavlov
@ 2011-10-28 13:24 ` Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 4/6] toshiba-ac100: add USB host support Antony Pavlov
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Antony Pavlov @ 2011-10-28 13:24 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/arm/Makefile | 1 +
arch/arm/boards/toshiba-ac100/Kconfig | 9 ++++++
arch/arm/boards/toshiba-ac100/Makefile | 2 +
arch/arm/boards/toshiba-ac100/board.c | 34 +++++++++++++++++++++++++
arch/arm/boards/toshiba-ac100/config.h | 5 +++
arch/arm/boards/toshiba-ac100/serial.c | 43 ++++++++++++++++++++++++++++++++
arch/arm/mach-tegra/Kconfig | 12 +++++++++
7 files changed, 106 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boards/toshiba-ac100/Kconfig
create mode 100644 arch/arm/boards/toshiba-ac100/Makefile
create mode 100644 arch/arm/boards/toshiba-ac100/board.c
create mode 100644 arch/arm/boards/toshiba-ac100/config.h
create mode 100644 arch/arm/boards/toshiba-ac100/serial.c
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 78a8a44..54d6b04 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -111,6 +111,7 @@ board-$(CONFIG_MACH_USB_A9263) := usb-a926x
board-$(CONFIG_MACH_USB_A9G20) := usb-a926x
board-$(CONFIG_MACH_VERSATILEPB) := versatile
board-$(CONFIG_MACH_TX25) := karo-tx25
+board-$(CONFIG_MACH_TOSHIBA_AC100) := toshiba-ac100
machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
diff --git a/arch/arm/boards/toshiba-ac100/Kconfig b/arch/arm/boards/toshiba-ac100/Kconfig
new file mode 100644
index 0000000..abba2cc
--- /dev/null
+++ b/arch/arm/boards/toshiba-ac100/Kconfig
@@ -0,0 +1,9 @@
+if MACH_TOSHIBA_AC100
+
+config ARCH_TEXT_BASE
+ hex
+ default 0x01000000
+
+config BOARDINFO
+ default "Toshiba AC100 (Tegra2)"
+endif
diff --git a/arch/arm/boards/toshiba-ac100/Makefile b/arch/arm/boards/toshiba-ac100/Makefile
new file mode 100644
index 0000000..9e14763
--- /dev/null
+++ b/arch/arm/boards/toshiba-ac100/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o
+obj-$(CONFIG_DRIVER_SERIAL_NS16550) += serial.o
diff --git a/arch/arm/boards/toshiba-ac100/board.c b/arch/arm/boards/toshiba-ac100/board.c
new file mode 100644
index 0000000..e3a5eba
--- /dev/null
+++ b/arch/arm/boards/toshiba-ac100/board.c
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2011 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <types.h>
+#include <driver.h>
+#include <init.h>
+#include <asm/armlinux.h>
+#include <sizes.h>
+
+static int ac100_mem_init(void)
+{
+ arm_add_mem_device("ram0", 0x0, SZ_512M);
+
+ return 0;
+}
+mem_initcall(ac100_mem_init);
diff --git a/arch/arm/boards/toshiba-ac100/config.h b/arch/arm/boards/toshiba-ac100/config.h
new file mode 100644
index 0000000..25bb18f
--- /dev/null
+++ b/arch/arm/boards/toshiba-ac100/config.h
@@ -0,0 +1,5 @@
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#endif /* __CONFIG_H */
diff --git a/arch/arm/boards/toshiba-ac100/serial.c b/arch/arm/boards/toshiba-ac100/serial.c
new file mode 100644
index 0000000..2ed0e39
--- /dev/null
+++ b/arch/arm/boards/toshiba-ac100/serial.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2011 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <types.h>
+#include <driver.h>
+#include <init.h>
+#include <ns16550.h>
+#include <asm/io.h>
+#include <asm/common.h>
+#include <mach/iomap.h>
+
+static struct NS16550_plat serial_plat = {
+ .clock = 0x75 * 115200 * 16 /* MODE_X_DIV */,
+ .shift = 2,
+};
+
+static int ac100_serial_console_init(void)
+{
+ /* Register the serial port */
+ add_ns16550_device(-1, TEGRA_UARTA_BASE, 8 << serial_plat.shift,
+ IORESOURCE_MEM_8BIT, &serial_plat);
+
+ return 0;
+}
+console_initcall(ac100_serial_console_init);
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index b0cc3cd..eda786b 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -4,4 +4,16 @@ config ARCH_TEXT_BASE
hex
default 0x31fc0000
+choice
+ prompt "Tegra Board Type"
+
+config MACH_TOSHIBA_AC100
+ bool "Toshiba AC100"
+ help
+ Say Y here if you are using Toshiba AC100 smartbook.
+
+endchoice
+
+source arch/arm/boards/toshiba-ac100/Kconfig
+
endif
--
1.7.7
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFC PATCH V2 4/6] toshiba-ac100: add USB host support
2011-10-28 13:24 [RFC PATCH V2 0/6] ARM: initial Tegra support Antony Pavlov
` (2 preceding siblings ...)
2011-10-28 13:24 ` [RFC PATCH V2 3/6] ARM: Tegra: add Toshiba AC100 support Antony Pavlov
@ 2011-10-28 13:24 ` Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 5/6] USB: set MAXINTERFACES=16, so Toshiba AC100 works correctly Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 6/6] add toshiba_ac100_defconfig Antony Pavlov
5 siblings, 0 replies; 7+ messages in thread
From: Antony Pavlov @ 2011-10-28 13:24 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/arm/boards/toshiba-ac100/board.c | 18 ++++++++++++++++++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boards/toshiba-ac100/board.c b/arch/arm/boards/toshiba-ac100/board.c
index e3a5eba..3fd720d 100644
--- a/arch/arm/boards/toshiba-ac100/board.c
+++ b/arch/arm/boards/toshiba-ac100/board.c
@@ -24,6 +24,8 @@
#include <init.h>
#include <asm/armlinux.h>
#include <sizes.h>
+#include <usb/ehci.h>
+#include <mach/iomap.h>
static int ac100_mem_init(void)
{
@@ -32,3 +34,19 @@ static int ac100_mem_init(void)
return 0;
}
mem_initcall(ac100_mem_init);
+
+#ifdef CONFIG_USB_EHCI
+static struct ehci_platform_data ehci_pdata = {
+ .flags = EHCI_HAS_TT,
+};
+#endif
+
+static int ac100_devices_init(void)
+{
+#ifdef CONFIG_USB_EHCI
+ add_generic_usb_ehci_device(-1, TEGRA_USB3_BASE, &ehci_pdata);
+#endif
+
+ return 0;
+}
+device_initcall(ac100_devices_init);
--
1.7.7
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFC PATCH V2 5/6] USB: set MAXINTERFACES=16, so Toshiba AC100 works correctly
2011-10-28 13:24 [RFC PATCH V2 0/6] ARM: initial Tegra support Antony Pavlov
` (3 preceding siblings ...)
2011-10-28 13:24 ` [RFC PATCH V2 4/6] toshiba-ac100: add USB host support Antony Pavlov
@ 2011-10-28 13:24 ` Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 6/6] add toshiba_ac100_defconfig Antony Pavlov
5 siblings, 0 replies; 7+ messages in thread
From: Antony Pavlov @ 2011-10-28 13:24 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
include/usb/usb.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/usb/usb.h b/include/usb/usb.h
index 08fd1a1..f1aad21 100644
--- a/include/usb/usb.h
+++ b/include/usb/usb.h
@@ -38,7 +38,7 @@
#define USB_MAX_DEVICE 32
#define USB_MAXCONFIG 8
-#define USB_MAXINTERFACES 8
+#define USB_MAXINTERFACES 16
#define USB_MAXENDPOINTS 16
#define USB_MAXCHILDREN 8 /* This is arbitrary */
#define USB_MAX_HUB 16
--
1.7.7
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFC PATCH V2 6/6] add toshiba_ac100_defconfig
2011-10-28 13:24 [RFC PATCH V2 0/6] ARM: initial Tegra support Antony Pavlov
` (4 preceding siblings ...)
2011-10-28 13:24 ` [RFC PATCH V2 5/6] USB: set MAXINTERFACES=16, so Toshiba AC100 works correctly Antony Pavlov
@ 2011-10-28 13:24 ` Antony Pavlov
5 siblings, 0 replies; 7+ messages in thread
From: Antony Pavlov @ 2011-10-28 13:24 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/arm/configs/toshiba_ac100_defconfig | 49 ++++++++++++++++++++++++++++++
1 files changed, 49 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/configs/toshiba_ac100_defconfig
diff --git a/arch/arm/configs/toshiba_ac100_defconfig b/arch/arm/configs/toshiba_ac100_defconfig
new file mode 100644
index 0000000..1eb3211
--- /dev/null
+++ b/arch/arm/configs/toshiba_ac100_defconfig
@@ -0,0 +1,49 @@
+CONFIG_ARCH_TEGRA=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_TEXT_BASE=0x01000000
+CONFIG_BROKEN=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_PROMPT="toshiba ac100> "
+CONFIG_LONGHELP=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+# CONFIG_ERRNO_MESSAGES is not set
+# CONFIG_DEFAULT_ENVIRONMENT is not set
+CONFIG_POLLER=y
+CONFIG_ENABLE_DEVICE_NOISE=y
+CONFIG_CMD_SLEEP=y
+# CONFIG_CMD_TRUE is not set
+# CONFIG_CMD_FALSE is not set
+# CONFIG_CMD_CLEAR is not set
+# CONFIG_CMD_ECHO is not set
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_LOADY=y
+CONFIG_CMD_LOADS=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_BOOTM_ZLIB=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_I2C=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+CONFIG_NET_TFTP_PUSH=y
+CONFIG_NET_NETCONSOLE=y
+CONFIG_DRIVER_SERIAL_NS16550=y
+CONFIG_NET_USB=y
+CONFIG_NET_USB_ASIX=y
+# CONFIG_SPI is not set
+CONFIG_I2C=y
+CONFIG_I2C_TEGRA=y
+CONFIG_ATA=y
+CONFIG_ATA_DISK=y
+CONFIG_USB=y
+CONFIG_USB_EHCI=y
+CONFIG_USB_STORAGE=y
+CONFIG_VIDEO=y
+CONFIG_DRIVER_VIDEO_FB_TEGRA_DUMMY=y
+CONFIG_FS_FAT=y
--
1.7.7
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^ permalink raw reply [flat|nested] 7+ messages in thread
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Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-10-28 13:24 [RFC PATCH V2 0/6] ARM: initial Tegra support Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 1/6] " Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 2/6] dirty hack, fixme: disable mmu_cache_flush in arch/arm/cpu/start.c for Tegra Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 3/6] ARM: Tegra: add Toshiba AC100 support Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 4/6] toshiba-ac100: add USB host support Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 5/6] USB: set MAXINTERFACES=16, so Toshiba AC100 works correctly Antony Pavlov
2011-10-28 13:24 ` [RFC PATCH V2 6/6] add toshiba_ac100_defconfig Antony Pavlov
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