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From: "Eric Bénard" <eric@eukrea.com>
To: barebox@lists.infradead.org
Subject: [PATCH 3/6] CPUIMX51: add ARM errata and enable L2 cache
Date: Mon, 12 Dec 2011 22:19:36 +0100	[thread overview]
Message-ID: <1323724779-370-3-git-send-email-eric@eukrea.com> (raw)
In-Reply-To: <1323724779-370-1-git-send-email-eric@eukrea.com>

- add ARM errata ID #468414
- enable L2 cache to get better performances

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S b/arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S
index 0b3726f..ee3b0fc 100644
--- a/arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S
+++ b/arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S
@@ -57,6 +57,11 @@
 board_init_lowlevel:
 	mov     r10, lr
 
+	/* ARM errata ID #468414 */
+	mrc 15, 0, r1, c1, c0, 1
+	orr r1, r1, #(1 << 5)    /* enable L1NEON bit */
+	mcr 15, 0, r1, c1, c0, 1
+
 	/* explicitly disable L2 cache */
 	mrc 15, 0, r0, c1, c0, 1
 	bic r0, r0, #0x2
@@ -76,6 +81,11 @@ board_init_lowlevel:
 
 	mcr 15, 1, r0, c9, c0, 2
 
+	/* enable L2 cache */
+	mrc 15, 0, r0, c1, c0, 1
+	orr r0, r0, #2
+	mcr 15, 0, r0, c1, c0, 1
+
 	ldr r0, =MX51_CCM_BASE_ADDR
 
 	/* Gate of clocks to the peripherals first */
-- 
1.7.6.4


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  parent reply	other threads:[~2011-12-12 21:19 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-12-12 21:19 [PATCH 1/6] i.MX25: fix LD16 & LD17 iomux Eric Bénard
2011-12-12 21:19 ` [PATCH 2/6] CPUIMX35: enable the watchdog clock asap Eric Bénard
2011-12-12 21:19 ` Eric Bénard [this message]
2011-12-13  9:42   ` [PATCH 3/6] CPUIMX51: add ARM errata and enable L2 cache Sascha Hauer
2011-12-12 21:19 ` [PATCH 4/6] CPUIMX51: fix environement Eric Bénard
2011-12-12 21:19 ` [PATCH 5/6] CPUIMX51: configure SD1 iomux when ESDHC is enabled Eric Bénard
2011-12-12 21:19 ` [PATCH 6/6] CPUIMX51: update defconfig Eric Bénard
2011-12-13  9:44 ` [PATCH 1/6] i.MX25: fix LD16 & LD17 iomux Sascha Hauer

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