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From: Juergen Beisert <jbe@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 09/14] MACH SAMSUNG/S3C: Rename register macros to reflect the MACH they are valid for
Date: Sun, 25 Dec 2011 21:38:32 +0100	[thread overview]
Message-ID: <1324845517-4601-10-git-send-email-jbe@pengutronix.de> (raw)
In-Reply-To: <1324845517-4601-1-git-send-email-jbe@pengutronix.de>

Most members of the S3Cxxxx family share similar timer units. But they are
not really register compatible. To reflect this, use a separate name space for
the S3C family.

Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
---
 arch/arm/mach-samsung/include/mach/s3c-iomap.h |   20 +-------------
 arch/arm/mach-samsung/s3c-timer.c              |   33 ++++++++++++++++++------
 2 files changed, 26 insertions(+), 27 deletions(-)

diff --git a/arch/arm/mach-samsung/include/mach/s3c-iomap.h b/arch/arm/mach-samsung/include/mach/s3c-iomap.h
index 7cedf6a..807660a 100644
--- a/arch/arm/mach-samsung/include/mach/s3c-iomap.h
+++ b/arch/arm/mach-samsung/include/mach/s3c-iomap.h
@@ -29,7 +29,7 @@
 #define S3C2410_LCD_BASE		0x4D000000
 #define S3C24X0_NAND_BASE		0x4E000000
 #define S3C24X0_UART_BASE		0x50000000
-#define S3C24X0_TIMER_BASE		0x51000000
+#define S3C_TIMER_BASE			0x51000000
 #define S3C2410_USB_DEVICE_BASE		0x52000140
 #define S3C24X0_WATCHDOG_BASE		0x53000000
 #define S3C2410_I2C_BASE		0x54000000
@@ -40,24 +40,6 @@
 #define S3C2410_SPI_BASE		0x59000000
 #define S3C2410_SDI_BASE		0x5A000000
 
-/* Timer (direct access) */
-#define TCFG0 (S3C24X0_TIMER_BASE + 0x00)
-#define TCFG1 (S3C24X0_TIMER_BASE + 0x04)
-#define TCON (S3C24X0_TIMER_BASE + 0x08)
-#define TCNTB0 (S3C24X0_TIMER_BASE + 0x0c)
-#define TCMPB0 (S3C24X0_TIMER_BASE + 0x10)
-#define TCNTO0 (S3C24X0_TIMER_BASE + 0x14)
-#define TCNTB1 (S3C24X0_TIMER_BASE + 0x18)
-#define TCMPB1 (S3C24X0_TIMER_BASE + 0x1c)
-#define TCNTO1 (S3C24X0_TIMER_BASE + 0x20)
-#define TCNTB2 (S3C24X0_TIMER_BASE + 0x24)
-#define TCMPB2 (S3C24X0_TIMER_BASE + 0x28)
-#define TCNTO2 (S3C24X0_TIMER_BASE + 0x2c)
-#define TCNTB3 (S3C24X0_TIMER_BASE + 0x30)
-#define TCMPB3 (S3C24X0_TIMER_BASE + 0x34)
-#define TCNTO3 (S3C24X0_TIMER_BASE + 0x38)
-#define TCNTB4 (S3C24X0_TIMER_BASE + 0x3c)
-#define TCNTO4 (S3C24X0_TIMER_BASE + 0x40)
 
 /* Watchdog (direct access) */
 #define WTCON (S3C24X0_WATCHDOG_BASE)
diff --git a/arch/arm/mach-samsung/s3c-timer.c b/arch/arm/mach-samsung/s3c-timer.c
index 2b0b38a..d9dae55 100644
--- a/arch/arm/mach-samsung/s3c-timer.c
+++ b/arch/arm/mach-samsung/s3c-timer.c
@@ -21,10 +21,27 @@
 #include <mach/s3c-iomap.h>
 #include <mach/s3c-generic.h>
 
+#define S3C_TCFG0 (S3C_TIMER_BASE + 0x00)
+# define S3C_TCFG0_T4MASK 0xff00
+# define S3C_TCFG0_SET_PSCL234(x) ((x) << 8)
+# define S3C_TCFG0_GET_PSCL234(x) (((x) >> 8) & 0xff)
+#define S3C_TCFG1 (S3C_TIMER_BASE + 0x04)
+# define S3C_TCFG1_T4MASK 0xf0000
+# define S3C_TCFG1_SET_T4MUX(x) ((x) << 16)
+# define S3C_TCFG1_GET_T4MUX(x) (((x) >> 16) & 0xf)
+#define S3C_TCON (S3C_TIMER_BASE + 0x08)
+# define S3C_TCON_T4MASK (7 << 20)
+# define S3C_TCON_T4START (1 << 20)
+# define S3C_TCON_T4MANUALUPD (1 << 21)
+# define S3C_TCON_T4RELOAD (1 <<22)
+#define S3C_TCNTB4 (S3C_TIMER_BASE + 0x3c)
+#define S3C_TCNTO4 (S3C_TIMER_BASE + 0x40)
+
+
 static uint64_t s3c24xx_clocksource_read(void)
 {
 	/* note: its a down counter */
-	return 0xFFFF - readw(TCNTO4);
+	return 0xFFFF - readw(S3C_TCNTO4);
 }
 
 static struct clocksource cs = {
@@ -37,15 +54,15 @@ static int clocksource_init(void)
 {
 	uint32_t p_clk = s3c_get_pclk();
 
-	writel(0x00000000, TCON);	/* stop all timers */
-	writel(0x00ffffff, TCFG0);	/* PCLK / (255 + 1) for timer 4 */
-	writel(0x00030000, TCFG1);	/* /16 */
+	writel(0x00000000, S3C_TCON);	/* stop all timers */
+	writel(0x00ffffff, S3C_TCFG0);	/* PCLK / (255 + 1) for timer 4 */
+	writel(0x00030000, S3C_TCFG1);	/* /16 */
 
-	writew(0xffff, TCNTB4);		/* reload value is TOP */
+	writew(0xffff, S3C_TCNTB4);	/* reload value is TOP */
 
-	writel(0x00600000, TCON);	/* force a first reload */
-	writel(0x00400000, TCON);
-	writel(0x00500000, TCON);	/* enable timer 4 with auto reload */
+	writel(0x00600000, S3C_TCON);	/* force a first reload */
+	writel(0x00400000, S3C_TCON);
+	writel(0x00500000, S3C_TCON);	/* enable timer 4 with auto reload */
 
 	cs.mult = clocksource_hz2mult(p_clk / ((255 + 1) * 16), cs.shift);
 	init_clock(&cs);
-- 
1.7.7.3


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  parent reply	other threads:[~2011-12-25 20:39 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-12-25 20:38 [PATCH] Prepare to add more Samsung S3C CPUs to barebox Juergen Beisert
2011-12-25 20:38 ` [PATCH 01/14] MACH SAMSUNG: Rename the whole mach to add more CPUs in future Juergen Beisert
2011-12-25 20:38 ` [PATCH 02/14] MACH SAMSUNG/S3C: Do not compile S3C24xx's GPIO support unconditionally Juergen Beisert
2011-12-25 20:38 ` [PATCH 03/14] MACH SAMSUNG/S3C: Make it more generic for future updates Juergen Beisert
2011-12-25 20:38 ` [PATCH 04/14] MACH SAMSUNG/S3C: Use the correct CPU family name to reflect NAND driver's usage Juergen Beisert
2011-12-25 20:38 ` [PATCH 05/14] MACH SAMSUNG/S3C: Parts of the SDHC driver can be shared in the S3C CPU family Juergen Beisert
2011-12-25 20:38 ` [PATCH 06/14] MACH SAMSUNG/S3C: Reflect the CPU name the LCD driver is for Juergen Beisert
2011-12-25 20:38 ` [PATCH 07/14] MACH SAMSUNG/S3C: Separate S3C24XX clock management Juergen Beisert
2011-12-25 20:38 ` [PATCH 08/14] MACH SAMSUNG/S3C: Separate the clocksource for the S3C family Juergen Beisert
2011-12-25 20:38 ` Juergen Beisert [this message]
2011-12-25 20:38 ` [PATCH 10/14] MACH SAMSUNG/S3C: Re-work the S3C family timer driver Juergen Beisert
2011-12-25 20:38 ` [PATCH 11/14] MACH SAMSUNG/S3C: Prepare watchdog unit to be shared in the S3C family Juergen Beisert
2011-12-25 20:38 ` [PATCH 12/14] MACH SAMSUNG/S3C: Unify the UART driver for the S3C family of CPUs Juergen Beisert
2011-12-25 20:38 ` [PATCH 13/14] MACH SAMSUNG/S3C: Re-work the memory detection and handling Juergen Beisert
2011-12-25 20:38 ` [PATCH 14/14] MACH SAMSUNG/S3C: Re-work the GPIO handling for S3C24xx CPUs Juergen Beisert
  -- strict thread matches above, loose matches on Subject: below --
2012-01-02 11:43 [PATCH v2] Prepare to add more Samsung S3C CPUs to barebox Juergen Beisert
2012-01-02 11:43 ` [PATCH 09/14] MACH SAMSUNG/S3C: Rename register macros to reflect the MACH they are valid for Juergen Beisert
2011-11-26 20:22 [RFC] Prepare to add more Samsung S3C CPUs to barebox Juergen Beisert
2011-11-26 20:22 ` [PATCH 09/14] MACH SAMSUNG/S3C: Rename register macros to reflect the MACH they are valid for Juergen Beisert
2011-11-28  8:11   ` Sascha Hauer

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