[PATCH 1/7] add i2c clock support

[PATCH 1/7] add i2c clock support

[Eric Bénard]

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/mach-imx/speed-imx53.c |   26 ++++++++++++++++++++++++++
 1 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-imx/speed-imx53.c b/arch/arm/mach-imx/speed-imx53.c
index 0d6ac24..a2385fa 100644
--- a/arch/arm/mach-imx/speed-imx53.c
+++ b/arch/arm/mach-imx/speed-imx53.c
@@ -169,6 +169,31 @@ unsigned long imx_get_fecclk(void)
 	return imx_get_ipgclk();
 }
 
+static unsigned long imx_get_ipg_perclk(void)
+{
+	u32 reg;
+
+	reg = ccm_readl(MX5_CCM_CBCDR);
+	if (!(reg & MX5_CCM_CBCDR_PERIPH_CLK_SEL))
+		return pll2_sw_get_rate();
+	reg = ccm_readl(MX5_CCM_CBCMR);
+	switch ((reg & MX5_CCM_CBCMR_PERIPH_CLK_SEL_MASK) >>
+		MX5_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET) {
+	case 0:
+		return pll1_main_get_rate();
+	case 1:
+		return pll3_sw_get_rate();
+	/* case 2:
+		TODO : LP_APM */
+	}
+	return 0;
+}
+
+unsigned long imx_get_i2cclk(void)
+{
+	return imx_get_ipg_perclk();
+}
+
 unsigned long imx_get_mmcclk(void)
 {
 	u32 reg, prediv, podf, rate;
@@ -201,4 +226,5 @@ void imx_dump_clocks(void)
 	printf("ipg:  %ld\n", imx_get_ipgclk());
 	printf("fec:  %ld\n", imx_get_fecclk());
 	printf("gpt:  %ld\n", imx_get_gptclk());
+	printf("i2c:  %ld\n", imx_get_i2cclk());
 }
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

[PATCH 2/7] mfd: add mc34708 driver

[Eric Bénard]

this driver is a copie of the mc13892 one

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 drivers/mfd/Kconfig   |    4 +
 drivers/mfd/Makefile  |    1 +
 drivers/mfd/mc34708.c |  294 +++++++++++++++++++++++++++++++++++++++++++++++++
 include/mfd/mc34708.h |  102 +++++++++++++++++
 4 files changed, 401 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mfd/mc34708.c
 create mode 100644 include/mfd/mc34708.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 87797de..b080c1c 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -8,6 +8,10 @@ config I2C_MC34704
 	depends on I2C
 	bool "MC34704 PMIC driver"
 
+config I2C_MC34708
+	depends on I2C
+	bool "MC34708 PMIC driver"
+
 config I2C_MC9SDZ60
 	depends on I2C
 	bool "MC9SDZ60 driver"
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 1171335..bc9e0e8 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -1,5 +1,6 @@
 obj-$(CONFIG_I2C_MC13892) += mc13892.o
 obj-$(CONFIG_I2C_MC34704) += mc34704.o
+obj-$(CONFIG_I2C_MC34708) += mc34708.o
 obj-$(CONFIG_I2C_MC9SDZ60) += mc9sdz60.o
 obj-$(CONFIG_I2C_LP3972) += lp3972.o
 obj-$(CONFIG_I2C_TWLCORE) += twl-core.o
diff --git a/drivers/mfd/mc34708.c b/drivers/mfd/mc34708.c
new file mode 100644
index 0000000..e7f40c0
--- /dev/null
+++ b/drivers/mfd/mc34708.c
@@ -0,0 +1,294 @@
+/*
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ *               2009 Marc Kleine-Budde <mkl@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <xfuncs.h>
+#include <errno.h>
+#include <spi/spi.h>
+#include <malloc.h>
+
+#include <i2c/i2c.h>
+#include <mfd/mc34708.h>
+
+#define DRIVERNAME		"mc34708"
+
+#define to_mc34708(a)		container_of(a, struct mc34708, cdev)
+
+static struct mc34708 *mc_dev;
+
+struct mc34708 *mc34708_get(void)
+{
+	if (!mc_dev)
+		return NULL;
+
+	return mc_dev;
+}
+EXPORT_SYMBOL(mc34708_get);
+
+#ifdef CONFIG_SPI
+static int spi_rw(struct spi_device *spi, void * buf, size_t len)
+{
+	int ret;
+
+	struct spi_transfer t = {
+		.tx_buf = (const void *)buf,
+		.rx_buf = buf,
+		.len = len,
+		.cs_change = 0,
+		.delay_usecs = 0,
+	};
+	struct spi_message m;
+
+	spi_message_init(&m);
+	spi_message_add_tail(&t, &m);
+
+	if ((ret = spi_sync(spi, &m)))
+		return ret;
+	return 0;
+}
+
+#define MXC_PMIC_REG_NUM(reg)	(((reg) & 0x3f) << 25)
+#define MXC_PMIC_WRITE		(1 << 31)
+
+static int mc34708_spi_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val)
+{
+	uint32_t buf;
+
+	buf = MXC_PMIC_REG_NUM(reg);
+
+	spi_rw(mc34708->spi, &buf, 4);
+
+	*val = buf;
+
+	return 0;
+}
+
+static int mc34708_spi_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val)
+{
+	uint32_t buf = MXC_PMIC_REG_NUM(reg) | MXC_PMIC_WRITE | (val & 0xffffff);
+
+	spi_rw(mc34708->spi, &buf, 4);
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_I2C
+static int mc34708_i2c_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val)
+{
+	u8 buf[3];
+	int ret;
+
+	ret = i2c_read_reg(mc34708->client, reg, buf, 3);
+	*val = buf[0] << 16 | buf[1] << 8 | buf[2] << 0;
+
+	return ret == 3 ? 0 : ret;
+}
+
+static int mc34708_i2c_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val)
+{
+	u8 buf[] = {
+		val >> 16,
+		val >>  8,
+		val >>  0,
+	};
+	int ret;
+
+	ret = i2c_write_reg(mc34708->client, reg, buf, 3);
+
+	return ret == 3 ? 0 : ret;
+}
+#endif
+
+int mc34708_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val)
+{
+#ifdef CONFIG_I2C
+	if (mc34708->mode == MC34708_MODE_I2C)
+		return mc34708_i2c_reg_write(mc34708, reg, val);
+#endif
+#ifdef CONFIG_SPI
+	if (mc34708->mode == MC34708_MODE_SPI)
+		return mc34708_spi_reg_write(mc34708, reg, val);
+#endif
+	return -EINVAL;
+}
+EXPORT_SYMBOL(mc34708_reg_write);
+
+int mc34708_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val)
+{
+#ifdef CONFIG_I2C
+	if (mc34708->mode == MC34708_MODE_I2C)
+		return mc34708_i2c_reg_read(mc34708, reg, val);
+#endif
+#ifdef CONFIG_SPI
+	if (mc34708->mode == MC34708_MODE_SPI)
+		return mc34708_spi_reg_read(mc34708, reg, val);
+#endif
+	return -EINVAL;
+}
+EXPORT_SYMBOL(mc34708_reg_read);
+
+int mc34708_set_bits(struct mc34708 *mc34708, enum mc34708_reg reg, u32 mask, u32 val)
+{
+	u32 tmp;
+	int err;
+
+	err = mc34708_reg_read(mc34708, reg, &tmp);
+	tmp = (tmp & ~mask) | val;
+
+	if (!err)
+		err = mc34708_reg_write(mc34708, reg, tmp);
+
+	return err;
+}
+EXPORT_SYMBOL(mc34708_set_bits);
+
+static ssize_t mc_read(struct cdev *cdev, void *_buf, size_t count, ulong offset, ulong flags)
+{
+	struct mc34708 *priv = to_mc34708(cdev);
+	u32 *buf = _buf;
+	size_t i = count >> 2;
+	int err;
+
+	offset >>= 2;
+
+	while (i) {
+		err = mc34708_reg_read(priv, offset, buf);
+		if (err)
+			return (ssize_t)err;
+		buf++;
+		i--;
+		offset++;
+	}
+
+	return count;
+}
+
+static ssize_t mc_write(struct cdev *cdev, const void *_buf, size_t count, ulong offset, ulong flags)
+{
+	struct mc34708 *mc34708 = to_mc34708(cdev);
+	const u32 *buf = _buf;
+	size_t i = count >> 2;
+	int err;
+
+	offset >>= 2;
+
+	while (i) {
+		err = mc34708_reg_write(mc34708, offset, *buf);
+		if (err)
+			return (ssize_t)err;
+		buf++;
+		i--;
+		offset++;
+	}
+
+	return count;
+}
+
+static struct file_operations mc_fops = {
+	.lseek	= dev_lseek_default,
+	.read	= mc_read,
+	.write	= mc_write,
+};
+
+static int mc34708_query_revision(struct mc34708 *mc34708)
+{
+	unsigned int rev_id;
+	int rev;
+
+	mc34708_reg_read(mc34708, 7, &rev_id);
+
+	if (rev_id > 0xFFF)
+		return -EINVAL;
+
+	rev = rev_id & 0xFFF;
+
+	dev_info(mc_dev->cdev.dev, "MC34708 ID: 0x%04x\n", rev);
+
+	mc34708->revision = rev;
+
+	return rev;
+}
+
+static int mc_probe(struct device_d *dev, enum mc34708_mode mode)
+{
+	int rev;
+
+	if (mc_dev)
+		return -EBUSY;
+
+	mc_dev = xzalloc(sizeof(struct mc34708));
+	mc_dev->mode = mode;
+	mc_dev->cdev.name = DRIVERNAME;
+	if (mode == MC34708_MODE_I2C) {
+		mc_dev->client = to_i2c_client(dev);
+	}
+	if (mode == MC34708_MODE_SPI) {
+		mc_dev->spi = dev->type_data;
+		mc_dev->spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
+		mc_dev->spi->bits_per_word = 32;
+	}
+	mc_dev->cdev.size = 256;
+	mc_dev->cdev.dev = dev;
+	mc_dev->cdev.ops = &mc_fops;
+
+	rev = mc34708_query_revision(mc_dev);
+	if (rev < 0) {
+		free(mc_dev);
+		mc_dev = NULL;
+		return -EINVAL;
+	}
+
+	devfs_create(&mc_dev->cdev);
+
+	return 0;
+}
+
+static int mc_i2c_probe(struct device_d *dev)
+{
+	return mc_probe(dev, MC34708_MODE_I2C);
+}
+
+static int mc_spi_probe(struct device_d *dev)
+{
+	return mc_probe(dev, MC34708_MODE_SPI);
+}
+
+static struct driver_d mc_i2c_driver = {
+	.name  = "mc34708-i2c",
+	.probe = mc_i2c_probe,
+};
+
+static struct driver_d mc_spi_driver = {
+	.name  = "mc34708-spi",
+	.probe = mc_spi_probe,
+};
+
+static int mc_init(void)
+{
+        register_driver(&mc_i2c_driver);
+        register_driver(&mc_spi_driver);
+        return 0;
+}
+
+device_initcall(mc_init);
diff --git a/include/mfd/mc34708.h b/include/mfd/mc34708.h
new file mode 100644
index 0000000..f384c62
--- /dev/null
+++ b/include/mfd/mc34708.h
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2009 Marc Kleine-Budde <mkl@pengutronix.de>
+ *
+ * This file is released under the GPLv2
+ *
+ * Derived from:
+ * - arch-mxc/pmic_external.h --  contains interface of the PMIC protocol driver
+ *   Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ */
+
+#ifndef __ASM_ARCH_MC34708_H
+#define __ASM_ARCH_MC34708_H
+
+enum mc34708_reg {
+	MC34708_REG_INT_STATUS0		= 0x00,
+	MC34708_REG_INT_MASK0		= 0x01,
+	MC34708_REG_INT_SENSE0		= 0x02,
+	MC34708_REG_INT_STATUS1		= 0x03,
+	MC34708_REG_INT_MASK1		= 0x04,
+	MC34708_REG_INT_SENSE1		= 0x05,
+	MC34708_REG_PU_MODE_S		= 0x06,
+	MC34708_REG_IDENTIFICATION	= 0x07,
+	MC34708_REG_REG_FAULT_S		= 0x08,
+	MC34708_REG_ACC0		= 0x09,
+	MC34708_REG_ACC1		= 0x0a,
+	MC34708_REG_ACC2		= 0x0b,
+	MC34708_REG_UNUSED0		= 0x0c,
+	MC34708_REG_POWER_CTL0		= 0x0d,
+	MC34708_REG_POWER_CTL1		= 0x0e,
+	MC34708_REG_POWER_CTL2		= 0x0f,
+	MC34708_REG_MEM_A		= 0x10,
+	MC34708_REG_MEM_B		= 0x11,
+	MC34708_REG_MEM_C		= 0x12,
+	MC34708_REG_MEM_D		= 0x13,
+	MC34708_REG_RTC_TIME		= 0x14,
+	MC34708_REG_RTC_ALARM		= 0x15,
+	MC34708_REG_RTC_DAY		= 0x16,
+	MC34708_REG_RTC_DAY_ALARM	= 0x17,
+	MC34708_REG_1			= 0x18,
+	MC34708_REG_2_3			= 0x19,
+	MC34708_REG_4			= 0x1a,
+	MC34708_REG_5			= 0x1b,
+	MC34708_REG_1_2_MODE		= 0x1c,
+	MC34708_REG_3_4_5_MODE		= 0x1d,
+	MC34708_REG_SETTING_0		= 0x1e,
+	MC34708_REG_SWBST_CTRL		= 0x1f,
+	MC34708_REG_MODE_0		= 0x20,
+	MC34708_REG_GPIOLV0_CTRL	= 0x21,
+	MC34708_REG_GPIOLV1_CTRL	= 0x22,
+	MC34708_REG_GPIOLV2_CTRL	= 0x23,
+	MC34708_REG_GPIOLV3_CTRL	= 0x24,
+	MC34708_REG_USB_TIMING		= 0x25,
+	MC34708_REG_USB_BUTTON		= 0x26,
+	MC34708_REG_USB_CTRL		= 0x27,
+	MC34708_REG_USB_DEVTYPE		= 0x28,
+	MC34708_REG_UNUSED1		= 0x29,
+	MC34708_REG_UNUSED2		= 0x2a,
+	MC34708_REG_ADC0		= 0x2b,
+	MC34708_REG_ADC1		= 0x2c,
+	MC34708_REG_ADC2		= 0x2d,
+	MC34708_REG_ADC3		= 0x2e,
+	MC34708_REG_ADC4		= 0x2f,
+	MC34708_REG_ADC5		= 0x30,
+	MC34708_REG_ADC6		= 0x31,
+	MC34708_REG_ADC7		= 0x32,
+	MC34708_REG_BAT_PROFILE		= 0x33,
+	MC34708_REG_CHRG_DEBOUNCE	= 0x34,
+	MC34708_REG_CHRG_SOURCE		= 0x35,
+	MC34708_REG_CHRG_LED_CTRL	= 0x36,
+	MC34708_REG_PWM_CTRL		= 0x37,
+	MC34708_REG_UNUSED3		= 0x38,
+	MC34708_REG_UNUSED4		= 0x39,
+	MC34708_REG_UNUSED5		= 0x3a,
+	MC34708_REG_UNUSED6		= 0x3b,
+	MC34708_REG_UNUSED7		= 0x3c,
+	MC34708_REG_UNUSED8		= 0x3d,
+	MC34708_REG_UNUSED9		= 0x3e,
+	MC34708_REG_UNUSED10		= 0x3f,
+};
+
+
+enum mc34708_mode {
+	MC34708_MODE_I2C,
+	MC34708_MODE_SPI,
+};
+
+struct mc34708 {
+	struct cdev		cdev;
+	struct i2c_client	*client;
+	struct spi_device	*spi;
+	enum mc34708_mode	mode;
+	unsigned int		revision;
+};
+
+extern struct mc34708 *mc34708_get(void);
+
+extern int mc34708_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val);
+extern int mc34708_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val);
+extern int mc34708_set_bits(struct mc34708 *mc34708, enum mc34708_reg reg, u32 mask, u32 val);
+
+#endif /* __ASM_ARCH_MC34708_H */
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

[PATCH 3/7] i.MX53: add silicn revision functions

[Eric Bénard]

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/mach-imx/imx53.c                   |   45 +++++++++++++++++++++++++++
 arch/arm/mach-imx/include/mach/imx53-regs.h |    5 +++
 2 files changed, 50 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c
index 4f7d1cb..acb9d49 100644
--- a/arch/arm/mach-imx/imx53.c
+++ b/arch/arm/mach-imx/imx53.c
@@ -37,6 +37,51 @@ void *imx_gpio_base[] = {
 
 int imx_gpio_count = ARRAY_SIZE(imx_gpio_base) * 32;
 
+#define SI_REV 0x48
+
+static u32 mx53_silicon_revision;
+static char *mx53_rev_string = "unknown";
+
+int imx_silicon_revision(void)
+{
+	return mx53_silicon_revision;
+}
+
+static int query_silicon_revision(void)
+{
+	void __iomem *rom = MX53_IROM_BASE_ADDR;
+	u32 rev;
+
+	rev = readl(rom + SI_REV);
+	switch (rev) {
+	case 0x10:
+		mx53_silicon_revision = MX53_CHIP_REV_1_0;
+		mx53_rev_string = "1.0";
+		break;
+	case 0x20:
+		mx53_silicon_revision = MX53_CHIP_REV_2_0;
+		mx53_rev_string = "2.0";
+		break;
+	case 0x21:
+		mx53_silicon_revision = MX53_CHIP_REV_2_1;
+		mx53_rev_string = "2.1";
+		break;
+	default:
+		mx53_silicon_revision = 0;
+	}
+
+	return 0;
+}
+core_initcall(query_silicon_revision);
+
+static int imx53_print_silicon_rev(void)
+{
+	printf("detected i.MX53 rev %s\n", mx53_rev_string);
+
+	return 0;
+}
+device_initcall(imx53_print_silicon_rev);
+
 static int imx53_init(void)
 {
 	add_generic_device("imx_iim", 0, NULL, MX53_IIM_BASE_ADDR, SZ_4K,
diff --git a/arch/arm/mach-imx/include/mach/imx53-regs.h b/arch/arm/mach-imx/include/mach/imx53-regs.h
index 8fefc54..065bf08 100644
--- a/arch/arm/mach-imx/include/mach/imx53-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx53-regs.h
@@ -135,5 +135,10 @@
 #define MX53_CS2_96MB_BASE_ADDR		0xF6000000
 #define MX53_CS3_BASE_ADDR		0xF6000000
 
+/* silicon revisions specific to i.MX53 */
+#define MX53_CHIP_REV_1_0	0x10
+#define MX53_CHIP_REV_2_0	0x20
+#define MX53_CHIP_REV_2_1	0x21
+
 #endif /* __MACH_IMX53_REGS_H */
 
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

[PATCH 4/7] i.MX53: enable pull up on I2C0 pins

[Eric Bénard]

this allows I2C to work on boards which don't have external pull up
(like LOCO board)

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/mach-imx/include/mach/iomux-mx53.h |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-imx/include/mach/iomux-mx53.h b/arch/arm/mach-imx/include/mach/iomux-mx53.h
index 527f8fe..ac94deb 100644
--- a/arch/arm/mach-imx/include/mach/iomux-mx53.h
+++ b/arch/arm/mach-imx/include/mach/iomux-mx53.h
@@ -30,7 +30,9 @@
 #define MX53_SDHC_PAD_CTRL 	(PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
 				PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_HIGH | \
 				PAD_CTL_SRE_FAST)
-
+#define MX53_I2C_PAD_CTRL 	(PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
+				PAD_CTL_PUS_22K_UP | PAD_CTL_DSE_HIGH | \
+				PAD_CTL_SRE_FAST)
 
 #define MX53_PAD_GPIO_19__KPP_COL_5			IOMUX_PAD(0x348, 0x020, 0, 0x840, 0, NO_PAD_CTRL)
 #define MX53_PAD_GPIO_19__GPIO4_5			IOMUX_PAD(0x348, 0x020, 1, __NA_, 0, NO_PAD_CTRL)
@@ -377,7 +379,7 @@
 #define MX53_PAD_CSI0_DAT8__KPP_COL_7			IOMUX_PAD(0x40C, 0x0E0, 2, 0x848, 0, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT8__ECSPI2_SCLK			IOMUX_PAD(0x40C, 0x0E0, 3, 0x7B8, 1, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC		IOMUX_PAD(0x40C, 0x0E0, 4, __NA_, 0, NO_PAD_CTRL)
-#define MX53_PAD_CSI0_DAT8__I2C1_SDA			IOMUX_PAD(0x40C, 0x0E0, 5 | IOMUX_CONFIG_SION, 0x818, 0, NO_PAD_CTRL)
+#define MX53_PAD_CSI0_DAT8__I2C1_SDA			IOMUX_PAD(0x40C, 0x0E0, 5 | IOMUX_CONFIG_SION, 0x818, 0, MX53_I2C_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37		IOMUX_PAD(0x40C, 0x0E0, 6, __NA_, 0, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT8__TPIU_TRACE_5		IOMUX_PAD(0x40C, 0x0E0, 7, __NA_, 0, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9		IOMUX_PAD(0x410, 0x0E4, 0, __NA_, 0, NO_PAD_CTRL)
@@ -385,7 +387,7 @@
 #define MX53_PAD_CSI0_DAT9__KPP_ROW_7			IOMUX_PAD(0x410, 0x0E4, 2, 0x854, 0, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT9__ECSPI2_MOSI			IOMUX_PAD(0x410, 0x0E4, 3, 0x7C0, 1, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR		IOMUX_PAD(0x410, 0x0E4, 4, __NA_, 0, NO_PAD_CTRL)
-#define MX53_PAD_CSI0_DAT9__I2C1_SCL			IOMUX_PAD(0x410, 0x0E4, 5 | IOMUX_CONFIG_SION, 0x814, 0, NO_PAD_CTRL)
+#define MX53_PAD_CSI0_DAT9__I2C1_SCL			IOMUX_PAD(0x410, 0x0E4, 5 | IOMUX_CONFIG_SION, 0x814, 0, MX53_I2C_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38		IOMUX_PAD(0x410, 0x0E4, 6, __NA_, 0, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT9__TPIU_TRACE_6		IOMUX_PAD(0x410, 0x0E4, 7, __NA_, 0, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10		IOMUX_PAD(0x414, 0x0E8, 0, __NA_, 0, NO_PAD_CTRL)
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

[PATCH 5/7] mx53-loco: add i2c support

[Eric Bénard]

and register mc34708 which is present on MCIMX53-START-R board

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/boards/freescale-mx53-loco/board.c |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/freescale-mx53-loco/board.c b/arch/arm/boards/freescale-mx53-loco/board.c
index dc930b6..66ff040 100644
--- a/arch/arm/boards/freescale-mx53-loco/board.c
+++ b/arch/arm/boards/freescale-mx53-loco/board.c
@@ -36,6 +36,9 @@
 #include <mach/iim.h>
 #include <mach/imx5.h>
 
+#include <i2c/i2c.h>
+#include <mfd/mc34708.h>
+
 #include <asm/armlinux.h>
 #include <io.h>
 #include <asm/mmu.h>
@@ -88,6 +91,16 @@ static struct pad_desc loco_pads[] = {
 	MX53_PAD_EIM_DA11__GPIO3_11,
 	/* SD3_WP */
 	MX53_PAD_EIM_DA12__GPIO3_12,
+
+	/* I2C0 */
+	MX53_PAD_CSI0_DAT8__I2C1_SDA,
+	MX53_PAD_CSI0_DAT9__I2C1_SCL,
+};
+
+static struct i2c_board_info i2c_devices[] = {
+	{
+		I2C_BOARD_INFO("mc34708-i2c", 0x08),
+	},
 };
 
 static int loco_mem_init(void)
@@ -131,6 +144,8 @@ static int loco_devices_init(void)
 	imx53_add_fec(&fec_info);
 	imx53_add_mmc0(&loco_sd1_data);
 	imx53_add_mmc2(&loco_sd3_data);
+	i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
+	imx53_add_i2c0(NULL);
 
 	loco_fec_reset();
 
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

[PATCH 6/7] mx53-loco: add board revision support

[Eric Bénard]

- this is taken from freescale-mx35-3-stack/3stack.c and allows
this board to run Freescale's kernel which relies on the system
revision to configure the correct PMIC.

- On rev0 boards (with DA9053), the log is :
detected i.MX53 rev 2.1
MCIMX53-START board 1.0

On newer boards (rev A or B with MC34708), the log is :
mc34708-i2c@mc34708-i2c0: MC34708 ID: 0x0014
detected i.MX53 rev 2.1
MCIMX53-START-R board 1.0 rev B

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/boards/freescale-mx53-loco/board.c |   51 +++++++++++++++++++++++++++
 1 files changed, 51 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/freescale-mx53-loco/board.c b/arch/arm/boards/freescale-mx53-loco/board.c
index 66ff040..6c0e1d1 100644
--- a/arch/arm/boards/freescale-mx53-loco/board.c
+++ b/arch/arm/boards/freescale-mx53-loco/board.c
@@ -103,6 +103,31 @@ static struct i2c_board_info i2c_devices[] = {
 	},
 };
 
+/*
+ * Revision to be passed to kernel. The kernel provided
+ * by freescale relies on this.
+ *
+ * C --> CPU type
+ * S --> Silicon revision
+ * B --> Board rev
+ *
+ * 31    20     16     12    8      4     0
+ *        | Cmaj | Cmin | B  | Smaj | Smin|
+ *
+ * e.g 0x00053120 --> i.MX35, Cpu silicon rev 2.0, Board rev 2
+*/
+static unsigned int loco_system_rev = 0x00053000;
+
+static void set_silicon_rev( int rev)
+{
+	loco_system_rev = loco_system_rev | (rev & 0xFF);
+}
+
+static void set_board_rev(int rev)
+{
+	loco_system_rev =  (loco_system_rev & ~(0xF << 8)) | (rev & 0xF) << 8;
+}
+
 static int loco_mem_init(void)
 {
 	arm_add_mem_device("ram0", 0x70000000, SZ_512M);
@@ -149,6 +174,8 @@ static int loco_devices_init(void)
 
 	loco_fec_reset();
 
+	set_silicon_rev(imx_silicon_revision());
+
 	armlinux_set_bootparams((void *)0x70000100);
 	armlinux_set_architecture(MACH_TYPE_MX53_LOCO);
 
@@ -177,3 +204,27 @@ static int loco_console_init(void)
 }
 
 console_initcall(loco_console_init);
+
+static int loco_pmic_init(void)
+{
+	struct mc34708 *mc34708;
+	int rev;
+
+	mc34708 = mc34708_get();
+	if (!mc34708) {
+		/* so we have a DA9053 based board */
+		printf("MCIMX53-START board 1.0\n");
+		armlinux_set_revision(loco_system_rev);
+		return 0;
+	}
+
+	/* get the board revision from fuse */
+	rev = readl(MX53_IIM_BASE_ADDR + 0x878);
+	set_board_rev(rev);
+	printf("MCIMX53-START-R board 1.0 rev %c\n", (rev == 1) ? 'A' : 'B' );
+	armlinux_set_revision(loco_system_rev);
+
+	return 0;
+}
+
+late_initcall(loco_pmic_init);
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

[PATCH 7/7] mx53-loco: update defconfig

[Eric Bénard]

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/configs/freescale_mx53_loco_defconfig |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/arch/arm/configs/freescale_mx53_loco_defconfig b/arch/arm/configs/freescale_mx53_loco_defconfig
index b4e872d..bd2bdbe 100644
--- a/arch/arm/configs/freescale_mx53_loco_defconfig
+++ b/arch/arm/configs/freescale_mx53_loco_defconfig
@@ -21,7 +21,6 @@ CONFIG_DEBUG_INFO=y
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_SLEEP=y
 CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_READLINE=y
@@ -46,6 +45,7 @@ CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_I2C=y
 CONFIG_NET=y
 CONFIG_NET_DHCP=y
 CONFIG_NET_NFS=y
@@ -55,9 +55,12 @@ CONFIG_NET_TFTP_PUSH=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_DRIVER_NET_FEC_IMX=y
 # CONFIG_SPI is not set
+CONFIG_I2C=y
+CONFIG_I2C_IMX=y
 CONFIG_MCI=y
 CONFIG_MCI_STARTUP=y
 CONFIG_MCI_IMX_ESDHC=y
+CONFIG_I2C_MC34708=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH 2/7] mfd: add mc34708 driver

[Jean-Christophe PLAGNIOL-VILLARD]

> +static struct mc34708 *mc_dev;
> +
> +struct mc34708 *mc34708_get(void)
> +{
> +	if (!mc_dev)
> +		return NULL;
> +
> +	return mc_dev;
> +}
> +EXPORT_SYMBOL(mc34708_get);
no please do not export the current as it will not alloe multiple chip on
board
> +
> +#ifdef CONFIG_SPI
please drop the ifdef
> +static int spi_rw(struct spi_device *spi, void * buf, size_t len)
> +{
> +	int ret;
> +
> +	struct spi_transfer t = {
> +		.tx_buf = (const void *)buf,
> +		.rx_buf = buf,
> +		.len = len,
> +		.cs_change = 0,
> +		.delay_usecs = 0,
> +	};
> +	struct spi_message m;
> +
> +	spi_message_init(&m);
> +	spi_message_add_tail(&t, &m);
> +
> +	if ((ret = spi_sync(spi, &m)))
> +		return ret;
> +	return 0;
> +}
> +
> +#define MXC_PMIC_REG_NUM(reg)	(((reg) & 0x3f) << 25)
> +#define MXC_PMIC_WRITE		(1 << 31)
> +
> +static int mc34708_spi_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val)
> +{
> +	uint32_t buf;
> +
> +	buf = MXC_PMIC_REG_NUM(reg);
> +
> +	spi_rw(mc34708->spi, &buf, 4);
you need to check the return
> +
> +	*val = buf;
> +
> +	return 0;
> +}
> +
> +static int mc34708_spi_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val)
> +{
> +	uint32_t buf = MXC_PMIC_REG_NUM(reg) | MXC_PMIC_WRITE | (val & 0xffffff);
> +
> +	spi_rw(mc34708->spi, &buf, 4);
ditto
> +
> +	return 0;
> +}
> +#endif
> +
> +#ifdef CONFIG_I2C
please drop the ifdef
> +static int mc34708_i2c_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val)
> +{
> +	u8 buf[3];
> +	int ret;
> +
> +	ret = i2c_read_reg(mc34708->client, reg, buf, 3);
> +	*val = buf[0] << 16 | buf[1] << 8 | buf[2] << 0;
> +
> +	return ret == 3 ? 0 : ret;
> +}
> +
> +static int mc34708_i2c_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val)
> +{
> +	u8 buf[] = {
> +		val >> 16,
> +		val >>  8,
> +		val >>  0,
> +	};
why not convert val as a u8* and did this wirk on big endian?
> +	int ret;
> +
> +	ret = i2c_write_reg(mc34708->client, reg, buf, 3);
> +
> +	return ret == 3 ? 0 : ret;
> +}
> +#endif
> +
> +int mc34708_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val)
> +{
> +#ifdef CONFIG_I2C
please use IS_ENABLED
> +	if (mc34708->mode == MC34708_MODE_I2C)
> +		return mc34708_i2c_reg_write(mc34708, reg, val);
> +#endif
> +#ifdef CONFIG_SPI
ditto
> +	if (mc34708->mode == MC34708_MODE_SPI)
> +		return mc34708_spi_reg_write(mc34708, reg, val);
> +#endif
> +	return -EINVAL;
> +}
> +EXPORT_SYMBOL(mc34708_reg_write);
> +
> +int mc34708_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val)
> +{
> +#ifdef CONFIG_I2C
ditto
> +	if (mc34708->mode == MC34708_MODE_I2C)
> +		return mc34708_i2c_reg_read(mc34708, reg, val);
> +#endif
> +#ifdef CONFIG_SPI
> +	if (mc34708->mode == MC34708_MODE_SPI)
> +		return mc34708_spi_reg_read(mc34708, reg, val);
> +#endif
> +	return -EINVAL;
> +}
> +EXPORT_SYMBOL(mc34708_reg_read);
> +
> +int mc34708_set_bits(struct mc34708 *mc34708, enum mc34708_reg reg, u32 mask, u32 val)
> +{
> +	u32 tmp;
> +	int err;
> +
> +	err = mc34708_reg_read(mc34708, reg, &tmp);
> +	tmp = (tmp & ~mask) | val;
no need if err != 0
> +
> +	if (!err)
> +		err = mc34708_reg_write(mc34708, reg, tmp);
> +
> +	return err;
> +}
> +EXPORT_SYMBOL(mc34708_set_bits);
> +
> +static ssize_t mc_read(struct cdev *cdev, void *_buf, size_t count, ulong offset, ulong flags)
> +{
> +	struct mc34708 *priv = to_mc34708(cdev);
> +	u32 *buf = _buf;
> +	size_t i = count >> 2;
> +	int err;
> +
> +	offset >>= 2;
> +
> +	while (i) {
> +		err = mc34708_reg_read(priv, offset, buf);
> +		if (err)
> +			return (ssize_t)err;
> +		buf++;
> +		i--;
> +		offset++;
> +	}
> +
> +	return count;
> +}
> +
> +static ssize_t mc_write(struct cdev *cdev, const void *_buf, size_t count, ulong offset, ulong flags)
> +{
> +	struct mc34708 *mc34708 = to_mc34708(cdev);
> +	const u32 *buf = _buf;
> +	size_t i = count >> 2;
> +	int err;
> +
> +	offset >>= 2;
> +
> +	while (i) {
> +		err = mc34708_reg_write(mc34708, offset, *buf);
> +		if (err)
> +			return (ssize_t)err;
> +		buf++;
> +		i--;
> +		offset++;
> +	}
> +
> +	return count;
> +}
> +
> +static struct file_operations mc_fops = {
> +	.lseek	= dev_lseek_default,
> +	.read	= mc_read,
> +	.write	= mc_write,
> +};
> +
> +static int mc34708_query_revision(struct mc34708 *mc34708)
> +{
> +	unsigned int rev_id;
> +	int rev;
> +
> +	mc34708_reg_read(mc34708, 7, &rev_id);
> +
> +	if (rev_id > 0xFFF)
> +		return -EINVAL;
> +
> +	rev = rev_id & 0xFFF;
> +
> +	dev_info(mc_dev->cdev.dev, "MC34708 ID: 0x%04x\n", rev);
> +
> +	mc34708->revision = rev;
> +
> +	return rev;
> +}
> +
> +static int mc_probe(struct device_d *dev, enum mc34708_mode mode)
> +{
> +	int rev;
> +
> +	if (mc_dev)
> +		return -EBUSY;
> +
> +	mc_dev = xzalloc(sizeof(struct mc34708));
> +	mc_dev->mode = mode;
> +	mc_dev->cdev.name = DRIVERNAME;

> +	if (mode == MC34708_MODE_I2C) {
please use IS_ENABLED
> +		mc_dev->client = to_i2c_client(dev);
> +	}
ditto
> +	if (mode == MC34708_MODE_SPI) {
> +		mc_dev->spi = dev->type_data;
> +		mc_dev->spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
> +		mc_dev->spi->bits_per_word = 32;
> +	}
> +	mc_dev->cdev.size = 256;
> +	mc_dev->cdev.dev = dev;
> +	mc_dev->cdev.ops = &mc_fops;
> +
> +	rev = mc34708_query_revision(mc_dev);
> +	if (rev < 0) {
> +		free(mc_dev);
> +		mc_dev = NULL;
> +		return -EINVAL;
> +	}
> +
> +	devfs_create(&mc_dev->cdev);
return?
> +
> +	return 0;
> +}
> +
> +static int mc_i2c_probe(struct device_d *dev)
> +{
> +	return mc_probe(dev, MC34708_MODE_I2C);
> +}
> +
> +static int mc_spi_probe(struct device_d *dev)
> +{
> +	return mc_probe(dev, MC34708_MODE_SPI);
> +}
> +
> +static struct driver_d mc_i2c_driver = {
> +	.name  = "mc34708-i2c",
> +	.probe = mc_i2c_probe,
> +};
> +
> +static struct driver_d mc_spi_driver = {
> +	.name  = "mc34708-spi",
> +	.probe = mc_spi_probe,
> +};
> +
> +static int mc_init(void)
> +{
please use IS_ENABLED
> +        register_driver(&mc_i2c_driver);
> +        register_driver(&mc_spi_driver);
> +        return 0;

Best Regards,
J.

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH 6/7] mx53-loco: add board revision support

[Jean-Christophe PLAGNIOL-VILLARD]

On 01:27 Tue 21 Feb     , Eric Bénard wrote:
> - this is taken from freescale-mx35-3-stack/3stack.c and allows
> this board to run Freescale's kernel which relies on the system
> revision to configure the correct PMIC.
> 
> - On rev0 boards (with DA9053), the log is :
> detected i.MX53 rev 2.1
> MCIMX53-START board 1.0
> 
> On newer boards (rev A or B with MC34708), the log is :
> mc34708-i2c@mc34708-i2c0: MC34708 ID: 0x0014
> detected i.MX53 rev 2.1
> MCIMX53-START-R board 1.0 rev B
> 
> Signed-off-by: Eric Bénard <eric@eukrea.com>
> ---
>  arch/arm/boards/freescale-mx53-loco/board.c |   51 +++++++++++++++++++++++++++
>  1 files changed, 51 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/boards/freescale-mx53-loco/board.c b/arch/arm/boards/freescale-mx53-loco/board.c
> index 66ff040..6c0e1d1 100644
> --- a/arch/arm/boards/freescale-mx53-loco/board.c
> +++ b/arch/arm/boards/freescale-mx53-loco/board.c
> @@ -103,6 +103,31 @@ static struct i2c_board_info i2c_devices[] = {
>  	},
>  };
>  
> +/*
> + * Revision to be passed to kernel. The kernel provided
> + * by freescale relies on this.
> + *
> + * C --> CPU type
> + * S --> Silicon revision
> + * B --> Board rev
> + *
> + * 31    20     16     12    8      4     0
> + *        | Cmaj | Cmin | B  | Smaj | Smin|
> + *
> + * e.g 0x00053120 --> i.MX35, Cpu silicon rev 2.0, Board rev 2
> +*/
> +static unsigned int loco_system_rev = 0x00053000;
> +
> +static void set_silicon_rev( int rev)
> +{
> +	loco_system_rev = loco_system_rev | (rev & 0xFF);
> +}
> +
> +static void set_board_rev(int rev)
> +{
> +	loco_system_rev =  (loco_system_rev & ~(0xF << 8)) | (rev & 0xF) << 8;
> +}
> +
>  static int loco_mem_init(void)
>  {
>  	arm_add_mem_device("ram0", 0x70000000, SZ_512M);
> @@ -149,6 +174,8 @@ static int loco_devices_init(void)
>  
>  	loco_fec_reset();
>  
> +	set_silicon_rev(imx_silicon_revision());
> +
>  	armlinux_set_bootparams((void *)0x70000100);
>  	armlinux_set_architecture(MACH_TYPE_MX53_LOCO);
>  
> @@ -177,3 +204,27 @@ static int loco_console_init(void)
>  }
>  
>  console_initcall(loco_console_init);
> +
> +static int loco_pmic_init(void)
> +{
> +	struct mc34708 *mc34708;
> +	int rev;
> +
> +	mc34708 = mc34708_get();
please check the file exist
> +	if (!mc34708) {
> +		/* so we have a DA9053 based board */
> +		printf("MCIMX53-START board 1.0\n");
> +		armlinux_set_revision(loco_system_rev);
please do not duplicate it
> +		return 0;
> +	}
> +
> +	/* get the board revision from fuse */
> +	rev = readl(MX53_IIM_BASE_ADDR + 0x878);
> +	set_board_rev(rev);
> +	printf("MCIMX53-START-R board 1.0 rev %c\n", (rev == 1) ? 'A' : 'B' );
> +	armlinux_set_revision(loco_system_rev);
> +
> +	return 0;
> +}
Best Regards,
J.

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH 2/7] mfd: add mc34708 driver

[Eric Bénard]

Le Tue, 21 Feb 2012 04:48:35 +0100,
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :

> > +static struct mc34708 *mc_dev;
> > +
> > +struct mc34708 *mc34708_get(void)
> > +{
> > +	if (!mc_dev)
> > +		return NULL;
> > +
> > +	return mc_dev;
> > +}
> > +EXPORT_SYMBOL(mc34708_get);
> no please do not export the current as it will not alloe multiple chip on
> board
you can't have more than one of this chip on the board connected to
the same CPU.

Eric
-- 
http://eukrea.com/en/news/104-2012

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH 2/7] mfd: add mc34708 driver

[Jean-Christophe PLAGNIOL-VILLARD]

On 08:03 Tue 21 Feb     , Eric Bénard wrote:
> Le Tue, 21 Feb 2012 04:48:35 +0100,
> Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> 
> > > +static struct mc34708 *mc_dev;
> > > +
> > > +struct mc34708 *mc34708_get(void)
> > > +{
> > > +	if (!mc_dev)
> > > +		return NULL;
> > > +
> > > +	return mc_dev;
> > > +}
> > > +EXPORT_SYMBOL(mc34708_get);
> > no please do not export the current as it will not alloe multiple chip on
> > board
> you can't have more than one of this chip on the board connected to
> the same CPU.
except if you have 2 soc on the same board

here you use it to detect the presence of the device where we can detect it by
the presence of the dev file

Best Regards,
J.

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH 2/7] mfd: add mc34708 driver

[Eric Bénard]

Le Tue, 21 Feb 2012 14:03:18 +0100,
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :

> On 08:03 Tue 21 Feb     , Eric Bénard wrote:
> > Le Tue, 21 Feb 2012 04:48:35 +0100,
> > Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> > 
> > > > +static struct mc34708 *mc_dev;
> > > > +
> > > > +struct mc34708 *mc34708_get(void)
> > > > +{
> > > > +	if (!mc_dev)
> > > > +		return NULL;
> > > > +
> > > > +	return mc_dev;
> > > > +}
> > > > +EXPORT_SYMBOL(mc34708_get);
> > > no please do not export the current as it will not alloe multiple chip on
> > > board
> > you can't have more than one of this chip on the board connected to 
> > the same CPU.
> except if you have 2 soc on the same board
> 
that's why I said "connected to the same CPU".
If you have 2 SOC, each SOC will have its own PMIC thus it's own
barebox, thus no problem.

> here you use it to detect the presence of the device where we can detect it by
> the presence of the dev file

in the future we will also use that to write to the PMIC (as done on
mx35-3stack for example).

Eric
-- 
http://eukrea.com/en/news/104-2012

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH 2/7] mfd: add mc34708 driver

[Jean-Christophe PLAGNIOL-VILLARD]

On 14:22 Tue 21 Feb     , Eric Bénard wrote:
> Le Tue, 21 Feb 2012 14:03:18 +0100,
> Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> 
> > On 08:03 Tue 21 Feb     , Eric Bénard wrote:
> > > Le Tue, 21 Feb 2012 04:48:35 +0100,
> > > Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> > > 
> > > > > +static struct mc34708 *mc_dev;
> > > > > +
> > > > > +struct mc34708 *mc34708_get(void)
> > > > > +{
> > > > > +	if (!mc_dev)
> > > > > +		return NULL;
> > > > > +
> > > > > +	return mc_dev;
> > > > > +}
> > > > > +EXPORT_SYMBOL(mc34708_get);
> > > > no please do not export the current as it will not alloe multiple chip on
> > > > board
> > > you can't have more than one of this chip on the board connected to 
> > > the same CPU.
> > except if you have 2 soc on the same board
> > 
> that's why I said "connected to the same CPU".
> If you have 2 SOC, each SOC will have its own PMIC thus it's own
> barebox, thus no problem.
> 
> > here you use it to detect the presence of the device where we can detect it by
> > the presence of the dev file
> 
> in the future we will also use that to write to the PMIC (as done on
> mx35-3stack for example).
I still don't like the idea to export it

You need a proper API to manage the PMIC

so for today no need of this and I doubt the API will need it

Best Regards,
J.

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH 2/7] mfd: add mc34708 driver

[Eric Bénard]

Le Tue, 21 Feb 2012 15:10:11 +0100,
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> I still don't like the idea to export it
> 
> You need a proper API to manage the PMIC
> 
> so for today no need of this and I doubt the API will need it
> 
for today we have what is inside barebox and this patche is coherent
with what is actually inside barebox (please check other drivers in mfd
and mx35-3stack for example).
For the future we may no more need this if we have a proper PMIC API
but as this API actually is not written, this patchset makes sense.

Eric
-- 
http://eukrea.com/en/news/104-2012

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH 2/7] mfd: add mc34708 driver

[Jean-Christophe PLAGNIOL-VILLARD]

On 16:35 Tue 21 Feb     , Eric Bénard wrote:
> Le Tue, 21 Feb 2012 15:10:11 +0100,
> Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> > I still don't like the idea to export it
> > 
> > You need a proper API to manage the PMIC
> > 
> > so for today no need of this and I doubt the API will need it
> > 
> for today we have what is inside barebox and this patche is coherent
> with what is actually inside barebox (please check other drivers in mfd
> and mx35-3stack for example).
> For the future we may no more need this if we have a proper PMIC API
> but as this API actually is not written, this patchset makes sense.
today you do not need it

today you just need to known it the chip is here

so just check if the devfs is present

Best Regards,
J.

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH 2/7] mfd: add mc34708 driver

[Sascha Hauer]

On Tue, Feb 21, 2012 at 04:38:56PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 16:35 Tue 21 Feb     , Eric Bénard wrote:
> > Le Tue, 21 Feb 2012 15:10:11 +0100,
> > Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> > > I still don't like the idea to export it
> > > 
> > > You need a proper API to manage the PMIC
> > > 
> > > so for today no need of this and I doubt the API will need it
> > > 
> > for today we have what is inside barebox and this patche is coherent
> > with what is actually inside barebox (please check other drivers in mfd
> > and mx35-3stack for example).
> > For the future we may no more need this if we have a proper PMIC API
> > but as this API actually is not written, this patchset makes sense.
> today you do not need it
> 
> today you just need to known it the chip is here
> 
> so just check if the devfs is present
> 

Don't know where your problem is with exporting it. Yes, it supports
only a single pmic, but that's all we have on the boards I know. And
this function can be used to modify registers on the pmic, some boards
need this. The day might come when we need some regulator API, but we
are not there and often enough getting a board to run properly is just
'modify this damn bit in the pmic'

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH 2/7] mfd: add mc34708 driver

[Marc Reilly]

[-- Attachment #1.1: Type: text/plain, Size: 1510 bytes --]

Hi,

My $0.02 ...


> > > for today we have what is inside barebox and this patche is coherent
> > > with what is actually inside barebox (please check other drivers in mfd
> > > and mx35-3stack for example).
> > > For the future we may no more need this if we have a proper PMIC API
> > > but as this API actually is not written, this patchset makes sense.
> > 
> > today you do not need it
> > 
> > today you just need to known it the chip is here
> > 
> > so just check if the devfs is present
> 
> Don't know where your problem is with exporting it. 

I also don't see the problem. 99.9% of designs using this IC (family) will 
only have one of them on a board. If someone puts more than one on their board 
then they should be the person to manage dealing with two.

> Yes, it supports
> only a single pmic, but that's all we have on the boards I know. And
> this function can be used to modify registers on the pmic, some boards
> need this. The day might come when we need some regulator API, but we
> are not there and 

The board I have uses an mc13892 - there is stuff we need to we need to do 
which is unrelated to regulators like increasing the charge/supply current and 
detecting critically low battery. Calling xxxx_set_bits() is much better than 
a read/modify/write from dev file.


> often enough getting a board to run properly is just
> 'modify this damn bit in the pmic'

I've said "this damn pmic" quite a few times about the 13892 :) (Has anyone 
else had troubles too?)


Cheers,
Marc

[-- Attachment #1.2: Type: text/html, Size: 7642 bytes --]

[-- Attachment #2: Type: text/plain, Size: 149 bytes --]

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH 3/7] i.MX53: add silicn revision functions

[Sascha Hauer]

On Tue, Feb 21, 2012 at 01:27:35AM +0100, Eric Bénard wrote:
> Signed-off-by: Eric Bénard <eric@eukrea.com>
> ---
>  arch/arm/mach-imx/imx53.c                   |   45 +++++++++++++++++++++++++++
>  arch/arm/mach-imx/include/mach/imx53-regs.h |    5 +++
>  2 files changed, 50 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c
> index 4f7d1cb..acb9d49 100644
> --- a/arch/arm/mach-imx/imx53.c
> +++ b/arch/arm/mach-imx/imx53.c
> @@ -37,6 +37,51 @@ void *imx_gpio_base[] = {
>  
>  int imx_gpio_count = ARRAY_SIZE(imx_gpio_base) * 32;
>  
> +#define SI_REV 0x48
> +
> +static u32 mx53_silicon_revision;
> +static char *mx53_rev_string = "unknown";
> +
> +int imx_silicon_revision(void)
> +{
> +	return mx53_silicon_revision;
> +}
> +
> +static int query_silicon_revision(void)
> +{
> +	void __iomem *rom = MX53_IROM_BASE_ADDR;
> +	u32 rev;
> +
> +	rev = readl(rom + SI_REV);
> +	switch (rev) {
> +	case 0x10:
> +		mx53_silicon_revision = MX53_CHIP_REV_1_0;
> +		mx53_rev_string = "1.0";
> +		break;
> +	case 0x20:
> +		mx53_silicon_revision = MX53_CHIP_REV_2_0;
> +		mx53_rev_string = "2.0";
> +		break;
> +	case 0x21:
> +		mx53_silicon_revision = MX53_CHIP_REV_2_1;
> +		mx53_rev_string = "2.1";
> +		break;
> +	default:
> +		mx53_silicon_revision = 0;
> +	}
> +
> +	return 0;
> +}
> +core_initcall(query_silicon_revision);
> +
> +static int imx53_print_silicon_rev(void)
> +{
> +	printf("detected i.MX53 rev %s\n", mx53_rev_string);
> +
> +	return 0;
> +}
> +device_initcall(imx53_print_silicon_rev);
> +
>  static int imx53_init(void)
>  {
>  	add_generic_device("imx_iim", 0, NULL, MX53_IIM_BASE_ADDR, SZ_4K,
> diff --git a/arch/arm/mach-imx/include/mach/imx53-regs.h b/arch/arm/mach-imx/include/mach/imx53-regs.h
> index 8fefc54..065bf08 100644
> --- a/arch/arm/mach-imx/include/mach/imx53-regs.h
> +++ b/arch/arm/mach-imx/include/mach/imx53-regs.h
> @@ -135,5 +135,10 @@
>  #define MX53_CS2_96MB_BASE_ADDR		0xF6000000
>  #define MX53_CS3_BASE_ADDR		0xF6000000
>  
> +/* silicon revisions specific to i.MX53 */
> +#define MX53_CHIP_REV_1_0	0x10
> +#define MX53_CHIP_REV_2_0	0x20
> +#define MX53_CHIP_REV_2_1	0x21

Can you please add the chip revisions to imx-regs.h and replace the
MX53_ prefix with a IMX_ prefix? They are the same for all i.MX SoCs.
We can then let the other SoCs use these defines later.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

[PATCH v2 1/7] add i2c clock support

[Eric Bénard]

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/mach-imx/speed-imx53.c |   26 ++++++++++++++++++++++++++
 1 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-imx/speed-imx53.c b/arch/arm/mach-imx/speed-imx53.c
index 0d6ac24..a2385fa 100644
--- a/arch/arm/mach-imx/speed-imx53.c
+++ b/arch/arm/mach-imx/speed-imx53.c
@@ -169,6 +169,31 @@ unsigned long imx_get_fecclk(void)
 	return imx_get_ipgclk();
 }
 
+static unsigned long imx_get_ipg_perclk(void)
+{
+	u32 reg;
+
+	reg = ccm_readl(MX5_CCM_CBCDR);
+	if (!(reg & MX5_CCM_CBCDR_PERIPH_CLK_SEL))
+		return pll2_sw_get_rate();
+	reg = ccm_readl(MX5_CCM_CBCMR);
+	switch ((reg & MX5_CCM_CBCMR_PERIPH_CLK_SEL_MASK) >>
+		MX5_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET) {
+	case 0:
+		return pll1_main_get_rate();
+	case 1:
+		return pll3_sw_get_rate();
+	/* case 2:
+		TODO : LP_APM */
+	}
+	return 0;
+}
+
+unsigned long imx_get_i2cclk(void)
+{
+	return imx_get_ipg_perclk();
+}
+
 unsigned long imx_get_mmcclk(void)
 {
 	u32 reg, prediv, podf, rate;
@@ -201,4 +226,5 @@ void imx_dump_clocks(void)
 	printf("ipg:  %ld\n", imx_get_ipgclk());
 	printf("fec:  %ld\n", imx_get_fecclk());
 	printf("gpt:  %ld\n", imx_get_gptclk());
+	printf("i2c:  %ld\n", imx_get_i2cclk());
 }
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

[PATCH v2 2/7] mfd: add mc34708 driver

[Eric Bénard]

this driver is a copie of the mc13892 one

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 drivers/mfd/Kconfig   |    4 +
 drivers/mfd/Makefile  |    1 +
 drivers/mfd/mc34708.c |  294 +++++++++++++++++++++++++++++++++++++++++++++++++
 include/mfd/mc34708.h |  102 +++++++++++++++++
 4 files changed, 401 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mfd/mc34708.c
 create mode 100644 include/mfd/mc34708.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 87797de..b080c1c 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -8,6 +8,10 @@ config I2C_MC34704
 	depends on I2C
 	bool "MC34704 PMIC driver"
 
+config I2C_MC34708
+	depends on I2C
+	bool "MC34708 PMIC driver"
+
 config I2C_MC9SDZ60
 	depends on I2C
 	bool "MC9SDZ60 driver"
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 1171335..bc9e0e8 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -1,5 +1,6 @@
 obj-$(CONFIG_I2C_MC13892) += mc13892.o
 obj-$(CONFIG_I2C_MC34704) += mc34704.o
+obj-$(CONFIG_I2C_MC34708) += mc34708.o
 obj-$(CONFIG_I2C_MC9SDZ60) += mc9sdz60.o
 obj-$(CONFIG_I2C_LP3972) += lp3972.o
 obj-$(CONFIG_I2C_TWLCORE) += twl-core.o
diff --git a/drivers/mfd/mc34708.c b/drivers/mfd/mc34708.c
new file mode 100644
index 0000000..e7f40c0
--- /dev/null
+++ b/drivers/mfd/mc34708.c
@@ -0,0 +1,294 @@
+/*
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ *               2009 Marc Kleine-Budde <mkl@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <xfuncs.h>
+#include <errno.h>
+#include <spi/spi.h>
+#include <malloc.h>
+
+#include <i2c/i2c.h>
+#include <mfd/mc34708.h>
+
+#define DRIVERNAME		"mc34708"
+
+#define to_mc34708(a)		container_of(a, struct mc34708, cdev)
+
+static struct mc34708 *mc_dev;
+
+struct mc34708 *mc34708_get(void)
+{
+	if (!mc_dev)
+		return NULL;
+
+	return mc_dev;
+}
+EXPORT_SYMBOL(mc34708_get);
+
+#ifdef CONFIG_SPI
+static int spi_rw(struct spi_device *spi, void * buf, size_t len)
+{
+	int ret;
+
+	struct spi_transfer t = {
+		.tx_buf = (const void *)buf,
+		.rx_buf = buf,
+		.len = len,
+		.cs_change = 0,
+		.delay_usecs = 0,
+	};
+	struct spi_message m;
+
+	spi_message_init(&m);
+	spi_message_add_tail(&t, &m);
+
+	if ((ret = spi_sync(spi, &m)))
+		return ret;
+	return 0;
+}
+
+#define MXC_PMIC_REG_NUM(reg)	(((reg) & 0x3f) << 25)
+#define MXC_PMIC_WRITE		(1 << 31)
+
+static int mc34708_spi_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val)
+{
+	uint32_t buf;
+
+	buf = MXC_PMIC_REG_NUM(reg);
+
+	spi_rw(mc34708->spi, &buf, 4);
+
+	*val = buf;
+
+	return 0;
+}
+
+static int mc34708_spi_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val)
+{
+	uint32_t buf = MXC_PMIC_REG_NUM(reg) | MXC_PMIC_WRITE | (val & 0xffffff);
+
+	spi_rw(mc34708->spi, &buf, 4);
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_I2C
+static int mc34708_i2c_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val)
+{
+	u8 buf[3];
+	int ret;
+
+	ret = i2c_read_reg(mc34708->client, reg, buf, 3);
+	*val = buf[0] << 16 | buf[1] << 8 | buf[2] << 0;
+
+	return ret == 3 ? 0 : ret;
+}
+
+static int mc34708_i2c_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val)
+{
+	u8 buf[] = {
+		val >> 16,
+		val >>  8,
+		val >>  0,
+	};
+	int ret;
+
+	ret = i2c_write_reg(mc34708->client, reg, buf, 3);
+
+	return ret == 3 ? 0 : ret;
+}
+#endif
+
+int mc34708_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val)
+{
+#ifdef CONFIG_I2C
+	if (mc34708->mode == MC34708_MODE_I2C)
+		return mc34708_i2c_reg_write(mc34708, reg, val);
+#endif
+#ifdef CONFIG_SPI
+	if (mc34708->mode == MC34708_MODE_SPI)
+		return mc34708_spi_reg_write(mc34708, reg, val);
+#endif
+	return -EINVAL;
+}
+EXPORT_SYMBOL(mc34708_reg_write);
+
+int mc34708_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val)
+{
+#ifdef CONFIG_I2C
+	if (mc34708->mode == MC34708_MODE_I2C)
+		return mc34708_i2c_reg_read(mc34708, reg, val);
+#endif
+#ifdef CONFIG_SPI
+	if (mc34708->mode == MC34708_MODE_SPI)
+		return mc34708_spi_reg_read(mc34708, reg, val);
+#endif
+	return -EINVAL;
+}
+EXPORT_SYMBOL(mc34708_reg_read);
+
+int mc34708_set_bits(struct mc34708 *mc34708, enum mc34708_reg reg, u32 mask, u32 val)
+{
+	u32 tmp;
+	int err;
+
+	err = mc34708_reg_read(mc34708, reg, &tmp);
+	tmp = (tmp & ~mask) | val;
+
+	if (!err)
+		err = mc34708_reg_write(mc34708, reg, tmp);
+
+	return err;
+}
+EXPORT_SYMBOL(mc34708_set_bits);
+
+static ssize_t mc_read(struct cdev *cdev, void *_buf, size_t count, ulong offset, ulong flags)
+{
+	struct mc34708 *priv = to_mc34708(cdev);
+	u32 *buf = _buf;
+	size_t i = count >> 2;
+	int err;
+
+	offset >>= 2;
+
+	while (i) {
+		err = mc34708_reg_read(priv, offset, buf);
+		if (err)
+			return (ssize_t)err;
+		buf++;
+		i--;
+		offset++;
+	}
+
+	return count;
+}
+
+static ssize_t mc_write(struct cdev *cdev, const void *_buf, size_t count, ulong offset, ulong flags)
+{
+	struct mc34708 *mc34708 = to_mc34708(cdev);
+	const u32 *buf = _buf;
+	size_t i = count >> 2;
+	int err;
+
+	offset >>= 2;
+
+	while (i) {
+		err = mc34708_reg_write(mc34708, offset, *buf);
+		if (err)
+			return (ssize_t)err;
+		buf++;
+		i--;
+		offset++;
+	}
+
+	return count;
+}
+
+static struct file_operations mc_fops = {
+	.lseek	= dev_lseek_default,
+	.read	= mc_read,
+	.write	= mc_write,
+};
+
+static int mc34708_query_revision(struct mc34708 *mc34708)
+{
+	unsigned int rev_id;
+	int rev;
+
+	mc34708_reg_read(mc34708, 7, &rev_id);
+
+	if (rev_id > 0xFFF)
+		return -EINVAL;
+
+	rev = rev_id & 0xFFF;
+
+	dev_info(mc_dev->cdev.dev, "MC34708 ID: 0x%04x\n", rev);
+
+	mc34708->revision = rev;
+
+	return rev;
+}
+
+static int mc_probe(struct device_d *dev, enum mc34708_mode mode)
+{
+	int rev;
+
+	if (mc_dev)
+		return -EBUSY;
+
+	mc_dev = xzalloc(sizeof(struct mc34708));
+	mc_dev->mode = mode;
+	mc_dev->cdev.name = DRIVERNAME;
+	if (mode == MC34708_MODE_I2C) {
+		mc_dev->client = to_i2c_client(dev);
+	}
+	if (mode == MC34708_MODE_SPI) {
+		mc_dev->spi = dev->type_data;
+		mc_dev->spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
+		mc_dev->spi->bits_per_word = 32;
+	}
+	mc_dev->cdev.size = 256;
+	mc_dev->cdev.dev = dev;
+	mc_dev->cdev.ops = &mc_fops;
+
+	rev = mc34708_query_revision(mc_dev);
+	if (rev < 0) {
+		free(mc_dev);
+		mc_dev = NULL;
+		return -EINVAL;
+	}
+
+	devfs_create(&mc_dev->cdev);
+
+	return 0;
+}
+
+static int mc_i2c_probe(struct device_d *dev)
+{
+	return mc_probe(dev, MC34708_MODE_I2C);
+}
+
+static int mc_spi_probe(struct device_d *dev)
+{
+	return mc_probe(dev, MC34708_MODE_SPI);
+}
+
+static struct driver_d mc_i2c_driver = {
+	.name  = "mc34708-i2c",
+	.probe = mc_i2c_probe,
+};
+
+static struct driver_d mc_spi_driver = {
+	.name  = "mc34708-spi",
+	.probe = mc_spi_probe,
+};
+
+static int mc_init(void)
+{
+        register_driver(&mc_i2c_driver);
+        register_driver(&mc_spi_driver);
+        return 0;
+}
+
+device_initcall(mc_init);
diff --git a/include/mfd/mc34708.h b/include/mfd/mc34708.h
new file mode 100644
index 0000000..f384c62
--- /dev/null
+++ b/include/mfd/mc34708.h
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2009 Marc Kleine-Budde <mkl@pengutronix.de>
+ *
+ * This file is released under the GPLv2
+ *
+ * Derived from:
+ * - arch-mxc/pmic_external.h --  contains interface of the PMIC protocol driver
+ *   Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ */
+
+#ifndef __ASM_ARCH_MC34708_H
+#define __ASM_ARCH_MC34708_H
+
+enum mc34708_reg {
+	MC34708_REG_INT_STATUS0		= 0x00,
+	MC34708_REG_INT_MASK0		= 0x01,
+	MC34708_REG_INT_SENSE0		= 0x02,
+	MC34708_REG_INT_STATUS1		= 0x03,
+	MC34708_REG_INT_MASK1		= 0x04,
+	MC34708_REG_INT_SENSE1		= 0x05,
+	MC34708_REG_PU_MODE_S		= 0x06,
+	MC34708_REG_IDENTIFICATION	= 0x07,
+	MC34708_REG_REG_FAULT_S		= 0x08,
+	MC34708_REG_ACC0		= 0x09,
+	MC34708_REG_ACC1		= 0x0a,
+	MC34708_REG_ACC2		= 0x0b,
+	MC34708_REG_UNUSED0		= 0x0c,
+	MC34708_REG_POWER_CTL0		= 0x0d,
+	MC34708_REG_POWER_CTL1		= 0x0e,
+	MC34708_REG_POWER_CTL2		= 0x0f,
+	MC34708_REG_MEM_A		= 0x10,
+	MC34708_REG_MEM_B		= 0x11,
+	MC34708_REG_MEM_C		= 0x12,
+	MC34708_REG_MEM_D		= 0x13,
+	MC34708_REG_RTC_TIME		= 0x14,
+	MC34708_REG_RTC_ALARM		= 0x15,
+	MC34708_REG_RTC_DAY		= 0x16,
+	MC34708_REG_RTC_DAY_ALARM	= 0x17,
+	MC34708_REG_1			= 0x18,
+	MC34708_REG_2_3			= 0x19,
+	MC34708_REG_4			= 0x1a,
+	MC34708_REG_5			= 0x1b,
+	MC34708_REG_1_2_MODE		= 0x1c,
+	MC34708_REG_3_4_5_MODE		= 0x1d,
+	MC34708_REG_SETTING_0		= 0x1e,
+	MC34708_REG_SWBST_CTRL		= 0x1f,
+	MC34708_REG_MODE_0		= 0x20,
+	MC34708_REG_GPIOLV0_CTRL	= 0x21,
+	MC34708_REG_GPIOLV1_CTRL	= 0x22,
+	MC34708_REG_GPIOLV2_CTRL	= 0x23,
+	MC34708_REG_GPIOLV3_CTRL	= 0x24,
+	MC34708_REG_USB_TIMING		= 0x25,
+	MC34708_REG_USB_BUTTON		= 0x26,
+	MC34708_REG_USB_CTRL		= 0x27,
+	MC34708_REG_USB_DEVTYPE		= 0x28,
+	MC34708_REG_UNUSED1		= 0x29,
+	MC34708_REG_UNUSED2		= 0x2a,
+	MC34708_REG_ADC0		= 0x2b,
+	MC34708_REG_ADC1		= 0x2c,
+	MC34708_REG_ADC2		= 0x2d,
+	MC34708_REG_ADC3		= 0x2e,
+	MC34708_REG_ADC4		= 0x2f,
+	MC34708_REG_ADC5		= 0x30,
+	MC34708_REG_ADC6		= 0x31,
+	MC34708_REG_ADC7		= 0x32,
+	MC34708_REG_BAT_PROFILE		= 0x33,
+	MC34708_REG_CHRG_DEBOUNCE	= 0x34,
+	MC34708_REG_CHRG_SOURCE		= 0x35,
+	MC34708_REG_CHRG_LED_CTRL	= 0x36,
+	MC34708_REG_PWM_CTRL		= 0x37,
+	MC34708_REG_UNUSED3		= 0x38,
+	MC34708_REG_UNUSED4		= 0x39,
+	MC34708_REG_UNUSED5		= 0x3a,
+	MC34708_REG_UNUSED6		= 0x3b,
+	MC34708_REG_UNUSED7		= 0x3c,
+	MC34708_REG_UNUSED8		= 0x3d,
+	MC34708_REG_UNUSED9		= 0x3e,
+	MC34708_REG_UNUSED10		= 0x3f,
+};
+
+
+enum mc34708_mode {
+	MC34708_MODE_I2C,
+	MC34708_MODE_SPI,
+};
+
+struct mc34708 {
+	struct cdev		cdev;
+	struct i2c_client	*client;
+	struct spi_device	*spi;
+	enum mc34708_mode	mode;
+	unsigned int		revision;
+};
+
+extern struct mc34708 *mc34708_get(void);
+
+extern int mc34708_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val);
+extern int mc34708_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val);
+extern int mc34708_set_bits(struct mc34708 *mc34708, enum mc34708_reg reg, u32 mask, u32 val);
+
+#endif /* __ASM_ARCH_MC34708_H */
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

[PATCH v2 3/7] i.MX53: add silicon revision functions

[Eric Bénard]

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/mach-imx/imx53.c                 |   47 ++++++++++++++++++++++++++++-
 arch/arm/mach-imx/include/mach/imx-regs.h |    5 +++
 2 files changed, 51 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c
index 4f7d1cb..8742c46 100644
--- a/arch/arm/mach-imx/imx53.c
+++ b/arch/arm/mach-imx/imx53.c
@@ -20,7 +20,7 @@
 #include <io.h>
 #include <sizes.h>
 #include <mach/imx5.h>
-#include <mach/imx53-regs.h>
+#include <mach/imx-regs.h>
 #include <mach/clock-imx51_53.h>
 
 #include "gpio.h"
@@ -37,6 +37,51 @@ void *imx_gpio_base[] = {
 
 int imx_gpio_count = ARRAY_SIZE(imx_gpio_base) * 32;
 
+#define SI_REV 0x48
+
+static u32 mx53_silicon_revision;
+static char *mx53_rev_string = "unknown";
+
+int imx_silicon_revision(void)
+{
+	return mx53_silicon_revision;
+}
+
+static int query_silicon_revision(void)
+{
+	void __iomem *rom = MX53_IROM_BASE_ADDR;
+	u32 rev;
+
+	rev = readl(rom + SI_REV);
+	switch (rev) {
+	case 0x10:
+		mx53_silicon_revision = IMX_CHIP_REV_1_0;
+		mx53_rev_string = "1.0";
+		break;
+	case 0x20:
+		mx53_silicon_revision = IMX_CHIP_REV_2_0;
+		mx53_rev_string = "2.0";
+		break;
+	case 0x21:
+		mx53_silicon_revision = IMX_CHIP_REV_2_1;
+		mx53_rev_string = "2.1";
+		break;
+	default:
+		mx53_silicon_revision = 0;
+	}
+
+	return 0;
+}
+core_initcall(query_silicon_revision);
+
+static int imx53_print_silicon_rev(void)
+{
+	printf("detected i.MX53 rev %s\n", mx53_rev_string);
+
+	return 0;
+}
+device_initcall(imx53_print_silicon_rev);
+
 static int imx53_init(void)
 {
 	add_generic_device("imx_iim", 0, NULL, MX53_IIM_BASE_ADDR, SZ_4K,
diff --git a/arch/arm/mach-imx/include/mach/imx-regs.h b/arch/arm/mach-imx/include/mach/imx-regs.h
index a272dda..789397e 100644
--- a/arch/arm/mach-imx/include/mach/imx-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx-regs.h
@@ -105,4 +105,9 @@
 
 #define GPIO_GIUS      (1<<16)
 
+/* silicon revisions  */
+#define IMX_CHIP_REV_1_0	0x10
+#define IMX_CHIP_REV_2_0	0x20
+#define IMX_CHIP_REV_2_1	0x21
+
 #endif				/* _IMX_REGS_H */
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

[PATCH v2 4/7] i.MX53: enable pull up on I2C0 pins

[Eric Bénard]

this allows I2C to work on boards which don't have external pull up
(like LOCO board)

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/mach-imx/include/mach/iomux-mx53.h |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-imx/include/mach/iomux-mx53.h b/arch/arm/mach-imx/include/mach/iomux-mx53.h
index 527f8fe..ac94deb 100644
--- a/arch/arm/mach-imx/include/mach/iomux-mx53.h
+++ b/arch/arm/mach-imx/include/mach/iomux-mx53.h
@@ -30,7 +30,9 @@
 #define MX53_SDHC_PAD_CTRL 	(PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
 				PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_HIGH | \
 				PAD_CTL_SRE_FAST)
-
+#define MX53_I2C_PAD_CTRL 	(PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
+				PAD_CTL_PUS_22K_UP | PAD_CTL_DSE_HIGH | \
+				PAD_CTL_SRE_FAST)
 
 #define MX53_PAD_GPIO_19__KPP_COL_5			IOMUX_PAD(0x348, 0x020, 0, 0x840, 0, NO_PAD_CTRL)
 #define MX53_PAD_GPIO_19__GPIO4_5			IOMUX_PAD(0x348, 0x020, 1, __NA_, 0, NO_PAD_CTRL)
@@ -377,7 +379,7 @@
 #define MX53_PAD_CSI0_DAT8__KPP_COL_7			IOMUX_PAD(0x40C, 0x0E0, 2, 0x848, 0, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT8__ECSPI2_SCLK			IOMUX_PAD(0x40C, 0x0E0, 3, 0x7B8, 1, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC		IOMUX_PAD(0x40C, 0x0E0, 4, __NA_, 0, NO_PAD_CTRL)
-#define MX53_PAD_CSI0_DAT8__I2C1_SDA			IOMUX_PAD(0x40C, 0x0E0, 5 | IOMUX_CONFIG_SION, 0x818, 0, NO_PAD_CTRL)
+#define MX53_PAD_CSI0_DAT8__I2C1_SDA			IOMUX_PAD(0x40C, 0x0E0, 5 | IOMUX_CONFIG_SION, 0x818, 0, MX53_I2C_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37		IOMUX_PAD(0x40C, 0x0E0, 6, __NA_, 0, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT8__TPIU_TRACE_5		IOMUX_PAD(0x40C, 0x0E0, 7, __NA_, 0, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9		IOMUX_PAD(0x410, 0x0E4, 0, __NA_, 0, NO_PAD_CTRL)
@@ -385,7 +387,7 @@
 #define MX53_PAD_CSI0_DAT9__KPP_ROW_7			IOMUX_PAD(0x410, 0x0E4, 2, 0x854, 0, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT9__ECSPI2_MOSI			IOMUX_PAD(0x410, 0x0E4, 3, 0x7C0, 1, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR		IOMUX_PAD(0x410, 0x0E4, 4, __NA_, 0, NO_PAD_CTRL)
-#define MX53_PAD_CSI0_DAT9__I2C1_SCL			IOMUX_PAD(0x410, 0x0E4, 5 | IOMUX_CONFIG_SION, 0x814, 0, NO_PAD_CTRL)
+#define MX53_PAD_CSI0_DAT9__I2C1_SCL			IOMUX_PAD(0x410, 0x0E4, 5 | IOMUX_CONFIG_SION, 0x814, 0, MX53_I2C_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38		IOMUX_PAD(0x410, 0x0E4, 6, __NA_, 0, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT9__TPIU_TRACE_6		IOMUX_PAD(0x410, 0x0E4, 7, __NA_, 0, NO_PAD_CTRL)
 #define MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10		IOMUX_PAD(0x414, 0x0E8, 0, __NA_, 0, NO_PAD_CTRL)
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

[PATCH v2 5/7] mx53-loco: add i2c support

[Eric Bénard]

and register mc34708 which is present on MCIMX53-START-R board

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/boards/freescale-mx53-loco/board.c |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/freescale-mx53-loco/board.c b/arch/arm/boards/freescale-mx53-loco/board.c
index dc930b6..66ff040 100644
--- a/arch/arm/boards/freescale-mx53-loco/board.c
+++ b/arch/arm/boards/freescale-mx53-loco/board.c
@@ -36,6 +36,9 @@
 #include <mach/iim.h>
 #include <mach/imx5.h>
 
+#include <i2c/i2c.h>
+#include <mfd/mc34708.h>
+
 #include <asm/armlinux.h>
 #include <io.h>
 #include <asm/mmu.h>
@@ -88,6 +91,16 @@ static struct pad_desc loco_pads[] = {
 	MX53_PAD_EIM_DA11__GPIO3_11,
 	/* SD3_WP */
 	MX53_PAD_EIM_DA12__GPIO3_12,
+
+	/* I2C0 */
+	MX53_PAD_CSI0_DAT8__I2C1_SDA,
+	MX53_PAD_CSI0_DAT9__I2C1_SCL,
+};
+
+static struct i2c_board_info i2c_devices[] = {
+	{
+		I2C_BOARD_INFO("mc34708-i2c", 0x08),
+	},
 };
 
 static int loco_mem_init(void)
@@ -131,6 +144,8 @@ static int loco_devices_init(void)
 	imx53_add_fec(&fec_info);
 	imx53_add_mmc0(&loco_sd1_data);
 	imx53_add_mmc2(&loco_sd3_data);
+	i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
+	imx53_add_i2c0(NULL);
 
 	loco_fec_reset();
 
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

[PATCH v2 6/7] mx53-loco: add board revision support

[Eric Bénard]

- this is taken from freescale-mx35-3-stack/3stack.c and allows
this board to run Freescale's kernel which relies on the system
revision to configure the correct PMIC.

- On rev0 boards (with DA9053), the log is :
detected i.MX53 rev 2.1
MCIMX53-START board 1.0

On newer boards (rev A or B with MC34708), the log is :
mc34708-i2c@mc34708-i2c0: MC34708 ID: 0x0014
detected i.MX53 rev 2.1
MCIMX53-START-R board 1.0 rev B

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/boards/freescale-mx53-loco/board.c |   51 +++++++++++++++++++++++++++
 1 files changed, 51 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/freescale-mx53-loco/board.c b/arch/arm/boards/freescale-mx53-loco/board.c
index 66ff040..6c0e1d1 100644
--- a/arch/arm/boards/freescale-mx53-loco/board.c
+++ b/arch/arm/boards/freescale-mx53-loco/board.c
@@ -103,6 +103,31 @@ static struct i2c_board_info i2c_devices[] = {
 	},
 };
 
+/*
+ * Revision to be passed to kernel. The kernel provided
+ * by freescale relies on this.
+ *
+ * C --> CPU type
+ * S --> Silicon revision
+ * B --> Board rev
+ *
+ * 31    20     16     12    8      4     0
+ *        | Cmaj | Cmin | B  | Smaj | Smin|
+ *
+ * e.g 0x00053120 --> i.MX35, Cpu silicon rev 2.0, Board rev 2
+*/
+static unsigned int loco_system_rev = 0x00053000;
+
+static void set_silicon_rev( int rev)
+{
+	loco_system_rev = loco_system_rev | (rev & 0xFF);
+}
+
+static void set_board_rev(int rev)
+{
+	loco_system_rev =  (loco_system_rev & ~(0xF << 8)) | (rev & 0xF) << 8;
+}
+
 static int loco_mem_init(void)
 {
 	arm_add_mem_device("ram0", 0x70000000, SZ_512M);
@@ -149,6 +174,8 @@ static int loco_devices_init(void)
 
 	loco_fec_reset();
 
+	set_silicon_rev(imx_silicon_revision());
+
 	armlinux_set_bootparams((void *)0x70000100);
 	armlinux_set_architecture(MACH_TYPE_MX53_LOCO);
 
@@ -177,3 +204,27 @@ static int loco_console_init(void)
 }
 
 console_initcall(loco_console_init);
+
+static int loco_pmic_init(void)
+{
+	struct mc34708 *mc34708;
+	int rev;
+
+	mc34708 = mc34708_get();
+	if (!mc34708) {
+		/* so we have a DA9053 based board */
+		printf("MCIMX53-START board 1.0\n");
+		armlinux_set_revision(loco_system_rev);
+		return 0;
+	}
+
+	/* get the board revision from fuse */
+	rev = readl(MX53_IIM_BASE_ADDR + 0x878);
+	set_board_rev(rev);
+	printf("MCIMX53-START-R board 1.0 rev %c\n", (rev == 1) ? 'A' : 'B' );
+	armlinux_set_revision(loco_system_rev);
+
+	return 0;
+}
+
+late_initcall(loco_pmic_init);
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

[PATCH v2 7/7] mx53-loco: update defconfig

[Eric Bénard]

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/configs/freescale_mx53_loco_defconfig |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/arch/arm/configs/freescale_mx53_loco_defconfig b/arch/arm/configs/freescale_mx53_loco_defconfig
index b4e872d..bd2bdbe 100644
--- a/arch/arm/configs/freescale_mx53_loco_defconfig
+++ b/arch/arm/configs/freescale_mx53_loco_defconfig
@@ -21,7 +21,6 @@ CONFIG_DEBUG_INFO=y
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_SLEEP=y
 CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_READLINE=y
@@ -46,6 +45,7 @@ CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_I2C=y
 CONFIG_NET=y
 CONFIG_NET_DHCP=y
 CONFIG_NET_NFS=y
@@ -55,9 +55,12 @@ CONFIG_NET_TFTP_PUSH=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_DRIVER_NET_FEC_IMX=y
 # CONFIG_SPI is not set
+CONFIG_I2C=y
+CONFIG_I2C_IMX=y
 CONFIG_MCI=y
 CONFIG_MCI_STARTUP=y
 CONFIG_MCI_IMX_ESDHC=y
+CONFIG_I2C_MC34708=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
-- 
1.7.7.6


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH v2 6/7] mx53-loco: add board revision support

[Jean-Christophe PLAGNIOL-VILLARD]

On 09:20 Mon 27 Feb     , Eric Bénard wrote:
> - this is taken from freescale-mx35-3-stack/3stack.c and allows
> this board to run Freescale's kernel which relies on the system
> revision to configure the correct PMIC.
> 
> - On rev0 boards (with DA9053), the log is :
> detected i.MX53 rev 2.1
> MCIMX53-START board 1.0
> 
> On newer boards (rev A or B with MC34708), the log is :
> mc34708-i2c@mc34708-i2c0: MC34708 ID: 0x0014
> detected i.MX53 rev 2.1
> MCIMX53-START-R board 1.0 rev B
> 
> Signed-off-by: Eric Bénard <eric@eukrea.com>
> ---
>  arch/arm/boards/freescale-mx53-loco/board.c |   51 +++++++++++++++++++++++++++
>  1 files changed, 51 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/boards/freescale-mx53-loco/board.c b/arch/arm/boards/freescale-mx53-loco/board.c
> index 66ff040..6c0e1d1 100644
> --- a/arch/arm/boards/freescale-mx53-loco/board.c
> +++ b/arch/arm/boards/freescale-mx53-loco/board.c
> @@ -103,6 +103,31 @@ static struct i2c_board_info i2c_devices[] = {
>  	},
>  };
>  
> +/*
> + * Revision to be passed to kernel. The kernel provided
> + * by freescale relies on this.
> + *
> + * C --> CPU type
> + * S --> Silicon revision
> + * B --> Board rev
> + *
> + * 31    20     16     12    8      4     0
> + *        | Cmaj | Cmin | B  | Smaj | Smin|
> + *
> + * e.g 0x00053120 --> i.MX35, Cpu silicon rev 2.0, Board rev 2
> +*/
> +static unsigned int loco_system_rev = 0x00053000;
> +
> +static void set_silicon_rev( int rev)
> +{
> +	loco_system_rev = loco_system_rev | (rev & 0xFF);
> +}
> +
> +static void set_board_rev(int rev)
> +{
> +	loco_system_rev =  (loco_system_rev & ~(0xF << 8)) | (rev & 0xF) << 8;
> +}
> +
>  static int loco_mem_init(void)
>  {
>  	arm_add_mem_device("ram0", 0x70000000, SZ_512M);
> @@ -149,6 +174,8 @@ static int loco_devices_init(void)
>  
>  	loco_fec_reset();
>  
> +	set_silicon_rev(imx_silicon_revision());
> +
>  	armlinux_set_bootparams((void *)0x70000100);
>  	armlinux_set_architecture(MACH_TYPE_MX53_LOCO);
>  
> @@ -177,3 +204,27 @@ static int loco_console_init(void)
>  }
>  
>  console_initcall(loco_console_init);
> +
> +static int loco_pmic_init(void)
> +{
> +	struct mc34708 *mc34708;
> +	int rev;
> +
> +	mc34708 = mc34708_get();
> +	if (!mc34708) {
> +		/* so we have a DA9053 based board */
> +		printf("MCIMX53-START board 1.0\n");
> +		armlinux_set_revision(loco_system_rev);
> +		return 0;
> +	}
here I still don't like the idea to check the pointer

check the file exist is the rigght way

Best Regards,
J.

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH v2 6/7] mx53-loco: add board revision support

[Sascha Hauer]

On Mon, Feb 27, 2012 at 04:40:23PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 09:20 Mon 27 Feb     , Eric Bénard wrote:
> > - this is taken from freescale-mx35-3-stack/3stack.c and allows
> > this board to run Freescale's kernel which relies on the system
> > revision to configure the correct PMIC.
> > 
> > - On rev0 boards (with DA9053), the log is :
> > detected i.MX53 rev 2.1
> > MCIMX53-START board 1.0
> > 
> > On newer boards (rev A or B with MC34708), the log is :
> > mc34708-i2c@mc34708-i2c0: MC34708 ID: 0x0014
> > detected i.MX53 rev 2.1
> > MCIMX53-START-R board 1.0 rev B
> > 
> > Signed-off-by: Eric Bénard <eric@eukrea.com>
> > ---
> >  arch/arm/boards/freescale-mx53-loco/board.c |   51 +++++++++++++++++++++++++++
> >  1 files changed, 51 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/arm/boards/freescale-mx53-loco/board.c b/arch/arm/boards/freescale-mx53-loco/board.c
> > index 66ff040..6c0e1d1 100644
> > --- a/arch/arm/boards/freescale-mx53-loco/board.c
> > +++ b/arch/arm/boards/freescale-mx53-loco/board.c
> > @@ -103,6 +103,31 @@ static struct i2c_board_info i2c_devices[] = {
> >  	},
> >  };
> >  
> > +/*
> > + * Revision to be passed to kernel. The kernel provided
> > + * by freescale relies on this.
> > + *
> > + * C --> CPU type
> > + * S --> Silicon revision
> > + * B --> Board rev
> > + *
> > + * 31    20     16     12    8      4     0
> > + *        | Cmaj | Cmin | B  | Smaj | Smin|
> > + *
> > + * e.g 0x00053120 --> i.MX35, Cpu silicon rev 2.0, Board rev 2
> > +*/
> > +static unsigned int loco_system_rev = 0x00053000;
> > +
> > +static void set_silicon_rev( int rev)
> > +{
> > +	loco_system_rev = loco_system_rev | (rev & 0xFF);
> > +}
> > +
> > +static void set_board_rev(int rev)
> > +{
> > +	loco_system_rev =  (loco_system_rev & ~(0xF << 8)) | (rev & 0xF) << 8;
> > +}
> > +
> >  static int loco_mem_init(void)
> >  {
> >  	arm_add_mem_device("ram0", 0x70000000, SZ_512M);
> > @@ -149,6 +174,8 @@ static int loco_devices_init(void)
> >  
> >  	loco_fec_reset();
> >  
> > +	set_silicon_rev(imx_silicon_revision());
> > +
> >  	armlinux_set_bootparams((void *)0x70000100);
> >  	armlinux_set_architecture(MACH_TYPE_MX53_LOCO);
> >  
> > @@ -177,3 +204,27 @@ static int loco_console_init(void)
> >  }
> >  
> >  console_initcall(loco_console_init);
> > +
> > +static int loco_pmic_init(void)
> > +{
> > +	struct mc34708 *mc34708;
> > +	int rev;
> > +
> > +	mc34708 = mc34708_get();
> > +	if (!mc34708) {
> > +		/* so we have a DA9053 based board */
> > +		printf("MCIMX53-START board 1.0\n");
> > +		armlinux_set_revision(loco_system_rev);
> > +		return 0;
> > +	}
> here I still don't like the idea to check the pointer
> 
> check the file exist is the rigght way

I don't agree.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: [PATCH v2 1/7] add i2c clock support

[Sascha Hauer]

Applied this series.

Thanks

Sascha

On Mon, Feb 27, 2012 at 09:20:07AM +0100, Eric Bénard wrote:
> Signed-off-by: Eric Bénard <eric@eukrea.com>
> ---
>  arch/arm/mach-imx/speed-imx53.c |   26 ++++++++++++++++++++++++++
>  1 files changed, 26 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/speed-imx53.c b/arch/arm/mach-imx/speed-imx53.c
> index 0d6ac24..a2385fa 100644
> --- a/arch/arm/mach-imx/speed-imx53.c
> +++ b/arch/arm/mach-imx/speed-imx53.c
> @@ -169,6 +169,31 @@ unsigned long imx_get_fecclk(void)
>  	return imx_get_ipgclk();
>  }
>  
> +static unsigned long imx_get_ipg_perclk(void)
> +{
> +	u32 reg;
> +
> +	reg = ccm_readl(MX5_CCM_CBCDR);
> +	if (!(reg & MX5_CCM_CBCDR_PERIPH_CLK_SEL))
> +		return pll2_sw_get_rate();
> +	reg = ccm_readl(MX5_CCM_CBCMR);
> +	switch ((reg & MX5_CCM_CBCMR_PERIPH_CLK_SEL_MASK) >>
> +		MX5_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET) {
> +	case 0:
> +		return pll1_main_get_rate();
> +	case 1:
> +		return pll3_sw_get_rate();
> +	/* case 2:
> +		TODO : LP_APM */
> +	}
> +	return 0;
> +}
> +
> +unsigned long imx_get_i2cclk(void)
> +{
> +	return imx_get_ipg_perclk();
> +}
> +
>  unsigned long imx_get_mmcclk(void)
>  {
>  	u32 reg, prediv, podf, rate;
> @@ -201,4 +226,5 @@ void imx_dump_clocks(void)
>  	printf("ipg:  %ld\n", imx_get_ipgclk());
>  	printf("fec:  %ld\n", imx_get_fecclk());
>  	printf("gpt:  %ld\n", imx_get_gptclk());
> +	printf("i2c:  %ld\n", imx_get_i2cclk());
>  }
> -- 
> 1.7.7.6
> 
> 
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox