* [RFC 1/5] MIPS: add common header file for DEBUG_LL via NS16550
2012-05-10 9:32 [RFC 0/5] MIPS: add XBurst processor family support Antony Pavlov
@ 2012-05-10 9:32 ` Antony Pavlov
2012-05-11 7:20 ` Sascha Hauer
2012-05-10 9:32 ` [RFC 2/5] MIPS: add XBurst processor family support Antony Pavlov
` (4 subsequent siblings)
5 siblings, 1 reply; 10+ messages in thread
From: Antony Pavlov @ 2012-05-10 9:32 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/include/debug_ll_common.h | 40 +++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
create mode 100644 arch/mips/include/debug_ll_common.h
diff --git a/arch/mips/include/debug_ll_common.h b/arch/mips/include/debug_ll_common.h
new file mode 100644
index 0000000..7c26f54
--- /dev/null
+++ b/arch/mips/include/debug_ll_common.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2012 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+/** @file
+ * This file contains declaration for early output support
+ */
+#ifndef __INCLUDE_ARCH_DEBUG_LL_COMMON_H__
+#define __INCLUDE_ARCH_DEBUG_LL_COMMON_H__
+
+#include <asm/io.h>
+
+#define rbr (0 << DEBUG_LL_UART_SHIFT)
+#define lsr (5 << DEBUG_LL_UART_SHIFT)
+
+#define LSR_THRE 0x20 /* Xmit holding register empty */
+
+static __inline__ void putc(char ch)
+{
+ while (!(__raw_readb((u8 *)DEBUG_LL_UART_ADDR + lsr) & LSR_THRE));
+ __raw_writeb(ch, (u8 *)DEBUG_LL_UART_ADDR + rbr);
+}
+
+#endif /* __INCLUDE_ARCH_DEBUG_LL_COMMON_H__ */
--
1.7.10
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [RFC 1/5] MIPS: add common header file for DEBUG_LL via NS16550
2012-05-10 9:32 ` [RFC 1/5] MIPS: add common header file for DEBUG_LL via NS16550 Antony Pavlov
@ 2012-05-11 7:20 ` Sascha Hauer
2012-05-11 9:11 ` Antony Pavlov
0 siblings, 1 reply; 10+ messages in thread
From: Sascha Hauer @ 2012-05-11 7:20 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox
On Thu, May 10, 2012 at 01:32:06PM +0400, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
> ---
> arch/mips/include/debug_ll_common.h | 40 +++++++++++++++++++++++++++++++++++
> 1 file changed, 40 insertions(+)
> create mode 100644 arch/mips/include/debug_ll_common.h
>
> diff --git a/arch/mips/include/debug_ll_common.h b/arch/mips/include/debug_ll_common.h
Does that mean that every mips has a ns16550? If not the file should
have 16550 in its name.
Sascha
> new file mode 100644
> index 0000000..7c26f54
> --- /dev/null
> +++ b/arch/mips/include/debug_ll_common.h
> @@ -0,0 +1,40 @@
> +/*
> + * Copyright (C) 2012 Antony Pavlov <antonynpavlov@gmail.com>
> + *
> + * This file is part of barebox.
> + * See file CREDITS for list of people who contributed to this project.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2
> + * as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
> + */
> +
> +/** @file
> + * This file contains declaration for early output support
> + */
> +#ifndef __INCLUDE_ARCH_DEBUG_LL_COMMON_H__
> +#define __INCLUDE_ARCH_DEBUG_LL_COMMON_H__
> +
> +#include <asm/io.h>
> +
> +#define rbr (0 << DEBUG_LL_UART_SHIFT)
> +#define lsr (5 << DEBUG_LL_UART_SHIFT)
> +
> +#define LSR_THRE 0x20 /* Xmit holding register empty */
> +
> +static __inline__ void putc(char ch)
> +{
> + while (!(__raw_readb((u8 *)DEBUG_LL_UART_ADDR + lsr) & LSR_THRE));
> + __raw_writeb(ch, (u8 *)DEBUG_LL_UART_ADDR + rbr);
> +}
> +
> +#endif /* __INCLUDE_ARCH_DEBUG_LL_COMMON_H__ */
> --
> 1.7.10
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [RFC 1/5] MIPS: add common header file for DEBUG_LL via NS16550
2012-05-11 7:20 ` Sascha Hauer
@ 2012-05-11 9:11 ` Antony Pavlov
0 siblings, 0 replies; 10+ messages in thread
From: Antony Pavlov @ 2012-05-11 9:11 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
On 11 May 2012 11:20, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> On Thu, May 10, 2012 at 01:32:06PM +0400, Antony Pavlov wrote:
>> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
>> ---
>> arch/mips/include/debug_ll_common.h | 40 +++++++++++++++++++++++++++++++++++
>> 1 file changed, 40 insertions(+)
>> create mode 100644 arch/mips/include/debug_ll_common.h
>>
>> diff --git a/arch/mips/include/debug_ll_common.h b/arch/mips/include/debug_ll_common.h
>
> Does that mean that every mips has a ns16550? If not the file should
> have 16550 in its name.
You are right!
Can we use the header like this for the other architectures (ARM etc) too?
> Sascha
>
>> new file mode 100644
>> index 0000000..7c26f54
>> --- /dev/null
>> +++ b/arch/mips/include/debug_ll_common.h
>> @@ -0,0 +1,40 @@
>> +/*
>> + * Copyright (C) 2012 Antony Pavlov <antonynpavlov@gmail.com>
>> + *
>> + * This file is part of barebox.
>> + * See file CREDITS for list of people who contributed to this project.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2
>> + * as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
>> + */
>> +
>> +/** @file
>> + * This file contains declaration for early output support
>> + */
>> +#ifndef __INCLUDE_ARCH_DEBUG_LL_COMMON_H__
>> +#define __INCLUDE_ARCH_DEBUG_LL_COMMON_H__
>> +
>> +#include <asm/io.h>
>> +
>> +#define rbr (0 << DEBUG_LL_UART_SHIFT)
>> +#define lsr (5 << DEBUG_LL_UART_SHIFT)
>> +
>> +#define LSR_THRE 0x20 /* Xmit holding register empty */
>> +
>> +static __inline__ void putc(char ch)
>> +{
>> + while (!(__raw_readb((u8 *)DEBUG_LL_UART_ADDR + lsr) & LSR_THRE));
>> + __raw_writeb(ch, (u8 *)DEBUG_LL_UART_ADDR + rbr);
>> +}
>> +
>> +#endif /* __INCLUDE_ARCH_DEBUG_LL_COMMON_H__ */
>> --
>> 1.7.10
>>
>>
>> _______________________________________________
>> barebox mailing list
>> barebox@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/barebox
>>
>
> --
> Pengutronix e.K. | |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
--
Best regards,
Antony Pavlov
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 10+ messages in thread
* [RFC 2/5] MIPS: add XBurst processor family support
2012-05-10 9:32 [RFC 0/5] MIPS: add XBurst processor family support Antony Pavlov
2012-05-10 9:32 ` [RFC 1/5] MIPS: add common header file for DEBUG_LL via NS16550 Antony Pavlov
@ 2012-05-10 9:32 ` Antony Pavlov
2012-05-10 9:32 ` [RFC 3/5] MISP: XBurst: add JZ4755 CPU support Antony Pavlov
` (3 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Antony Pavlov @ 2012-05-10 9:32 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/Kconfig | 8 +++++++
arch/mips/Makefile | 2 ++
arch/mips/mach-mips.dox | 4 ++++
arch/mips/mach-xburst/Kconfig | 7 ++++++
arch/mips/mach-xburst/include/mach/debug_ll.h | 29 +++++++++++++++++++++++++
arch/mips/mach-xburst/mach-xburst.dox | 5 +++++
6 files changed, 55 insertions(+)
create mode 100644 arch/mips/mach-xburst/Kconfig
create mode 100644 arch/mips/mach-xburst/include/mach/debug_ll.h
create mode 100644 arch/mips/mach-xburst/mach-xburst.dox
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 50d5c67..7a1eeac 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -46,10 +46,18 @@ config MACH_MIPS_BCM47XX
select SYS_SUPPORTS_LITTLE_ENDIAN
select HAS_DEBUG_LL
+config MACH_MIPS_XBURST
+ bool "Ingenic XBurst-based boards"
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select DRIVER_SERIAL_NS16550
+ select HAS_DEBUG_LL
endchoice
source arch/mips/mach-malta/Kconfig
source arch/mips/mach-bcm47xx/Kconfig
+source arch/mips/mach-xburst/Kconfig
endmenu
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 43b8ae6..345d9a2 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -66,6 +66,8 @@ board-$(CONFIG_BOARD_QEMU_MALTA) := qemu-malta
machine-$(CONFIG_MACH_MIPS_BCM47XX) := bcm47xx
board-$(CONFIG_BOARD_DLINK_DIR320) := dlink-dir-320
+machine-$(CONFIG_MACH_MIPS_XBURST) := xburst
+
machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y))
ifeq ($(KBUILD_SRC),)
diff --git a/arch/mips/mach-mips.dox b/arch/mips/mach-mips.dox
index 9bcec13..750a451 100644
--- a/arch/mips/mach-mips.dox
+++ b/arch/mips/mach-mips.dox
@@ -58,4 +58,8 @@ ISBN-13: 978-0120884216
@subsection mach_bcm47xx_info BCM47xx-based boards
@li @subpage dev_bcm47xx_mach
+
+@subsection mach_xburst_info XBurst-based boards
+
+@li @subpage dev_xburst_mach
*/
diff --git a/arch/mips/mach-xburst/Kconfig b/arch/mips/mach-xburst/Kconfig
new file mode 100644
index 0000000..7228b8f
--- /dev/null
+++ b/arch/mips/mach-xburst/Kconfig
@@ -0,0 +1,7 @@
+if MACH_MIPS_XBURST
+
+config ARCH_TEXT_BASE
+ hex
+ default 0xa0800000
+
+endif
diff --git a/arch/mips/mach-xburst/include/mach/debug_ll.h b/arch/mips/mach-xburst/include/mach/debug_ll.h
new file mode 100644
index 0000000..90f6528
--- /dev/null
+++ b/arch/mips/mach-xburst/include/mach/debug_ll.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2012 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __MACH_XBURST_DEBUG_LL__
+#define __MACH_XBURST_DEBUG_LL__
+
+/** @file
+ * This File contains declaration for early output support
+ */
+#include <debug_ll_common.h>
+
+#endif /* __MACH_XBURST_DEBUG_LL__ */
diff --git a/arch/mips/mach-xburst/mach-xburst.dox b/arch/mips/mach-xburst/mach-xburst.dox
new file mode 100644
index 0000000..84ae221
--- /dev/null
+++ b/arch/mips/mach-xburst/mach-xburst.dox
@@ -0,0 +1,5 @@
+/** @page dev_xburst_mach XBurst in barebox
+
+@section xburst_boards XBurst-based boards
+
+*/
--
1.7.10
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [RFC 3/5] MISP: XBurst: add JZ4755 CPU support
2012-05-10 9:32 [RFC 0/5] MIPS: add XBurst processor family support Antony Pavlov
2012-05-10 9:32 ` [RFC 1/5] MIPS: add common header file for DEBUG_LL via NS16550 Antony Pavlov
2012-05-10 9:32 ` [RFC 2/5] MIPS: add XBurst processor family support Antony Pavlov
@ 2012-05-10 9:32 ` Antony Pavlov
2012-05-10 9:32 ` [RFC 4/5] MIPS: XBurst: add Ritmix RZX-50 board support Antony Pavlov
` (2 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Antony Pavlov @ 2012-05-10 9:32 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/mach-xburst/Kconfig | 3 +
arch/mips/mach-xburst/Makefile | 1 +
arch/mips/mach-xburst/csrc-jz4750.c | 61 +++++++++++++++
.../mach-xburst/include/mach/debug_ll_jz4755.h | 29 +++++++
arch/mips/mach-xburst/include/mach/jz4750d_regs.h | 81 ++++++++++++++++++++
arch/mips/mach-xburst/reset-jz4750.c | 47 ++++++++++++
6 files changed, 222 insertions(+)
create mode 100644 arch/mips/mach-xburst/Makefile
create mode 100644 arch/mips/mach-xburst/csrc-jz4750.c
create mode 100644 arch/mips/mach-xburst/include/mach/debug_ll_jz4755.h
create mode 100644 arch/mips/mach-xburst/include/mach/jz4750d_regs.h
create mode 100644 arch/mips/mach-xburst/reset-jz4750.c
diff --git a/arch/mips/mach-xburst/Kconfig b/arch/mips/mach-xburst/Kconfig
index 7228b8f..0306f2e 100644
--- a/arch/mips/mach-xburst/Kconfig
+++ b/arch/mips/mach-xburst/Kconfig
@@ -4,4 +4,7 @@ config ARCH_TEXT_BASE
hex
default 0xa0800000
+config CPU_JZ4755
+ bool
+
endif
diff --git a/arch/mips/mach-xburst/Makefile b/arch/mips/mach-xburst/Makefile
new file mode 100644
index 0000000..e5634ba
--- /dev/null
+++ b/arch/mips/mach-xburst/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_CPU_JZ4755) += csrc-jz4750.o reset-jz4750.o
diff --git a/arch/mips/mach-xburst/csrc-jz4750.c b/arch/mips/mach-xburst/csrc-jz4750.c
new file mode 100644
index 0000000..f625b70
--- /dev/null
+++ b/arch/mips/mach-xburst/csrc-jz4750.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2012 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+/**
+ * @file
+ * @brief Clocksource based on JZ475x OS timer
+ */
+
+#include <init.h>
+#include <clock.h>
+#include <io.h>
+#include <mach/jz4750d_regs.h>
+
+#define JZ_TIMER_CLOCK 40000
+
+static uint64_t jz4750_cs_read(void)
+{
+ return (uint64_t)__raw_readl((void *)TCU_OSTCNT);
+}
+
+static struct clocksource jz4750_cs = {
+ .read = jz4750_cs_read,
+ .mask = CLOCKSOURCE_MASK(32),
+ .shift = 10,
+};
+
+static int clocksource_init(void)
+{
+ jz4750_cs.mult = clocksource_hz2mult(JZ_TIMER_CLOCK, jz4750_cs.shift);
+ init_clock(&jz4750_cs);
+
+ __raw_writel(TCU_OSTCSR_PRESCALE1 | TCU_OSTCSR_EXT_EN,
+ (void *)TCU_OSTCSR);
+ __raw_writel(0, (void *)TCU_OSTCNT);
+ __raw_writel(0xffffffff, (void *)TCU_OSTDR);
+
+ /* enable timer clock */
+ __raw_writel(TCU_TSCR_OSTSC, (void *)TCU_TSCR);
+ /* start counting up */
+ __raw_writel(TCU_TESR_OSTST, (void *)TCU_TESR);
+
+ return 0;
+}
+core_initcall(clocksource_init);
diff --git a/arch/mips/mach-xburst/include/mach/debug_ll_jz4755.h b/arch/mips/mach-xburst/include/mach/debug_ll_jz4755.h
new file mode 100644
index 0000000..babe296
--- /dev/null
+++ b/arch/mips/mach-xburst/include/mach/debug_ll_jz4755.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2012 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __INCLUDE_DEBUG_LL_JZ4755_H__
+#define __INCLUDE_DEBUG_LL_JZ4755_H__
+
+#include <mach/jz4750d_regs.h>
+
+#define DEBUG_LL_UART_ADDR UART1_BASE
+#define DEBUG_LL_UART_SHIFT 2
+
+#endif /* __INCLUDE_DEBUG_LL_JZ4755_H__ */
diff --git a/arch/mips/mach-xburst/include/mach/jz4750d_regs.h b/arch/mips/mach-xburst/include/mach/jz4750d_regs.h
new file mode 100644
index 0000000..28f1c70
--- /dev/null
+++ b/arch/mips/mach-xburst/include/mach/jz4750d_regs.h
@@ -0,0 +1,81 @@
+/*
+ * based on linux/include/asm-mips/mach-jz4750d/regs.h
+ *
+ * JZ4750D register definition.
+ *
+ * Copyright (C) 2008 Ingenic Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __JZ4750D_REGS_H__
+#define __JZ4750D_REGS_H__
+
+#define TCU_BASE 0xB0002000
+#define WDT_BASE 0xB0002000
+#define UART1_BASE 0xB0031000
+
+/*************************************************************************
+ * TCU (Timer Counter Unit)
+ *************************************************************************/
+#define TCU_TESR (TCU_BASE + 0x14) /* Timer Counter Enable Set Register */
+ #define TCU_TESR_OSTST (1 << 15)
+ #define TCU_TESR_TCST5 (1 << 5)
+ #define TCU_TESR_TCST4 (1 << 4)
+ #define TCU_TESR_TCST3 (1 << 3)
+ #define TCU_TESR_TCST2 (1 << 2)
+ #define TCU_TESR_TCST1 (1 << 1)
+ #define TCU_TESR_TCST0 (1 << 0)
+
+#define TCU_TSCR (TCU_BASE + 0x3c) /* Timer Stop Clear Register */
+ #define TCU_TSCR_WDTSC (1 << 16)
+ #define TCU_TSCR_OSTSC (1 << 15)
+ #define TCU_TSCR_STPC5 (1 << 5)
+ #define TCU_TSCR_STPC4 (1 << 4)
+ #define TCU_TSCR_STPC3 (1 << 3)
+ #define TCU_TSCR_STPC2 (1 << 2)
+ #define TCU_TSCR_STPC1 (1 << 1)
+ #define TCU_TSCR_STPC0 (1 << 0)
+
+/* Operating System Timer */
+#define TCU_OSTDR (TCU_BASE + 0xe0)
+#define TCU_OSTCNT (TCU_BASE + 0xe8)
+#define TCU_OSTCSR (TCU_BASE + 0xec)
+#define TCU_OSTCSR_PRESCALE_BIT 3
+#define TCU_OSTCSR_PRESCALE_MASK (0x7 << TCU_OSTCSR_PRESCALE_BIT)
+ #define TCU_OSTCSR_PRESCALE1 (0x0 << TCU_OSTCSR_PRESCALE_BIT)
+ #define TCU_OSTCSR_PRESCALE4 (0x1 << TCU_OSTCSR_PRESCALE_BIT)
+ #define TCU_OSTCSR_PRESCALE16 (0x2 << TCU_OSTCSR_PRESCALE_BIT)
+ #define TCU_OSTCSR_PRESCALE64 (0x3 << TCU_OSTCSR_PRESCALE_BIT)
+ #define TCU_OSTCSR_PRESCALE256 (0x4 << TCU_OSTCSR_PRESCALE_BIT)
+ #define TCU_OSTCSR_PRESCALE1024 (0x5 << TCU_OSTCSR_PRESCALE_BIT)
+#define TCU_OSTCSR_EXT_EN (1 << 2) /* select extal as the timer clock input */
+#define TCU_OSTCSR_RTC_EN (1 << 1) /* select rtcclk as the timer clock input */
+#define TCU_OSTCSR_PCK_EN (1 << 0) /* select pclk as the timer clock input */
+
+/*************************************************************************
+ * WDT (WatchDog Timer)
+ *************************************************************************/
+#define WDT_TDR (WDT_BASE + 0x00)
+#define WDT_TCER (WDT_BASE + 0x04)
+#define WDT_TCNT (WDT_BASE + 0x08)
+#define WDT_TCSR (WDT_BASE + 0x0C)
+
+// Register definition
+#define WDT_TCSR_PRESCALE_BIT 3
+#define WDT_TCSR_PRESCALE_MASK (0x7 << WDT_TCSR_PRESCALE_BIT)
+ #define WDT_TCSR_PRESCALE1 (0x0 << WDT_TCSR_PRESCALE_BIT)
+ #define WDT_TCSR_PRESCALE4 (0x1 << WDT_TCSR_PRESCALE_BIT)
+ #define WDT_TCSR_PRESCALE16 (0x2 << WDT_TCSR_PRESCALE_BIT)
+ #define WDT_TCSR_PRESCALE64 (0x3 << WDT_TCSR_PRESCALE_BIT)
+ #define WDT_TCSR_PRESCALE256 (0x4 << WDT_TCSR_PRESCALE_BIT)
+ #define WDT_TCSR_PRESCALE1024 (0x5 << WDT_TCSR_PRESCALE_BIT)
+#define WDT_TCSR_EXT_EN (1 << 2)
+#define WDT_TCSR_RTC_EN (1 << 1)
+#define WDT_TCSR_PCK_EN (1 << 0)
+
+#define WDT_TCER_TCEN (1 << 0)
+
+#endif /* __JZ4750D_REGS_H__ */
diff --git a/arch/mips/mach-xburst/reset-jz4750.c b/arch/mips/mach-xburst/reset-jz4750.c
new file mode 100644
index 0000000..3b69b1b
--- /dev/null
+++ b/arch/mips/mach-xburst/reset-jz4750.c
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2012 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+/**
+ * @file
+ * @brief Resetting an JZ4755-based board
+ */
+
+#include <common.h>
+#include <io.h>
+#include <mach/jz4750d_regs.h>
+
+#define JZ_EXTAL 24000000
+
+void __noreturn reset_cpu(ulong addr)
+{
+ __raw_writew(WDT_TCSR_PRESCALE4 | WDT_TCSR_EXT_EN, (u16 *)WDT_TCSR);
+ __raw_writew(0, (u16 *)WDT_TCNT);
+
+ /* reset after 4ms */
+ __raw_writew(JZ_EXTAL / 1000, (u16 *)WDT_TDR);
+ /* enable wdt clock */
+ __raw_writel(TCU_TSCR_WDTSC, (u32 *)TCU_TSCR);
+ /* start wdt */
+ __raw_writeb(WDT_TCER_TCEN, (u8 *)WDT_TCER);
+
+ while (1);
+ /*NOTREACHED*/
+}
+EXPORT_SYMBOL(reset_cpu);
--
1.7.10
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [RFC 4/5] MIPS: XBurst: add Ritmix RZX-50 board support
2012-05-10 9:32 [RFC 0/5] MIPS: add XBurst processor family support Antony Pavlov
` (2 preceding siblings ...)
2012-05-10 9:32 ` [RFC 3/5] MISP: XBurst: add JZ4755 CPU support Antony Pavlov
@ 2012-05-10 9:32 ` Antony Pavlov
2012-05-10 16:31 ` Jean-Christophe PLAGNIOL-VILLARD
2012-05-10 9:32 ` [RFC 5/5] MIPS: add defconfig for Ritmix RZX-50 board Antony Pavlov
2012-05-11 7:26 ` [RFC 0/5] MIPS: add XBurst processor family support Sascha Hauer
5 siblings, 1 reply; 10+ messages in thread
From: Antony Pavlov @ 2012-05-10 9:32 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/Makefile | 1 +
arch/mips/boards/rzx50/Kconfig | 6 +++
arch/mips/boards/rzx50/Makefile | 1 +
arch/mips/boards/rzx50/config.h | 19 +++++++
arch/mips/boards/rzx50/rzx50.dox | 20 ++++++++
arch/mips/boards/rzx50/serial.c | 66 +++++++++++++++++++++++++
arch/mips/mach-xburst/Kconfig | 11 +++++
arch/mips/mach-xburst/include/mach/debug_ll.h | 4 ++
arch/mips/mach-xburst/mach-xburst.dox | 2 +
9 files changed, 130 insertions(+)
create mode 100644 arch/mips/boards/rzx50/Kconfig
create mode 100644 arch/mips/boards/rzx50/Makefile
create mode 100644 arch/mips/boards/rzx50/config.h
create mode 100644 arch/mips/boards/rzx50/rzx50.dox
create mode 100644 arch/mips/boards/rzx50/serial.c
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 345d9a2..f28c21d 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -67,6 +67,7 @@ machine-$(CONFIG_MACH_MIPS_BCM47XX) := bcm47xx
board-$(CONFIG_BOARD_DLINK_DIR320) := dlink-dir-320
machine-$(CONFIG_MACH_MIPS_XBURST) := xburst
+board-$(CONFIG_BOARD_RZX50) := rzx50
machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y))
diff --git a/arch/mips/boards/rzx50/Kconfig b/arch/mips/boards/rzx50/Kconfig
new file mode 100644
index 0000000..38401aa
--- /dev/null
+++ b/arch/mips/boards/rzx50/Kconfig
@@ -0,0 +1,6 @@
+if BOARD_RZX50
+
+config BOARDINFO
+ default "Ritmix RZX-50"
+
+endif
diff --git a/arch/mips/boards/rzx50/Makefile b/arch/mips/boards/rzx50/Makefile
new file mode 100644
index 0000000..ff1a655
--- /dev/null
+++ b/arch/mips/boards/rzx50/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_DRIVER_SERIAL_NS16550) += serial.o
diff --git a/arch/mips/boards/rzx50/config.h b/arch/mips/boards/rzx50/config.h
new file mode 100644
index 0000000..eb4ab08
--- /dev/null
+++ b/arch/mips/boards/rzx50/config.h
@@ -0,0 +1,19 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+/* nothing special yet */
diff --git a/arch/mips/boards/rzx50/rzx50.dox b/arch/mips/boards/rzx50/rzx50.dox
new file mode 100644
index 0000000..9f0d600
--- /dev/null
+++ b/arch/mips/boards/rzx50/rzx50.dox
@@ -0,0 +1,20 @@
+/** @page rzx50 Ritmix RZX-50 game console
+
+The portable game console has
+@li JZ4755 SoC;
+@li 64 MiB SDRAM;
+@li 4 MiB microSDHC card / 4 MiB NAND type Flash Memory;
+@li RS232 serial interface (LV-TTL levels on board!);
+@li LCD display;
+@li Video out interface;
+@li 1xUSB interface;
+@li buttons.
+
+The game console uses U-Boot as firmware.
+
+Barebox can be started from U-boot using Z-modem.
+
+Ritmix RZX-50 links:
+@li ...
+
+*/
diff --git a/arch/mips/boards/rzx50/serial.c b/arch/mips/boards/rzx50/serial.c
new file mode 100644
index 0000000..308cd18
--- /dev/null
+++ b/arch/mips/boards/rzx50/serial.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2012 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <types.h>
+#include <driver.h>
+#include <init.h>
+#include <ns16550.h>
+#include <mach/jz4750d_regs.h>
+#include <io.h>
+#include <asm/common.h>
+
+#define JZ4750D_UART_SHIFT 2
+
+#define ier (1 << JZ4750D_UART_SHIFT)
+#define fcr (2 << JZ4750D_UART_SHIFT)
+
+static void jz4750d_serial_reg_write(unsigned int val, unsigned long base,
+ unsigned char reg_offset)
+{
+ switch (reg_offset) {
+ case fcr:
+ val |= 0x10; /* Enable uart module */
+ break;
+ case ier:
+ val |= (val & 0x4) << 2;
+ break;
+ default:
+ break;
+ }
+
+ writeb(val & 0xff, (void *)(base + reg_offset));
+}
+
+static struct NS16550_plat serial_plat = {
+ .clock = 12000000,
+ .shift = JZ4750D_UART_SHIFT,
+ .reg_write = &jz4750d_serial_reg_write,
+};
+
+static int rzx50_console_init(void)
+{
+ /* Register the serial port */
+ add_ns16550_device(-1, UART1_BASE, 8 << JZ4750D_UART_SHIFT,
+ IORESOURCE_MEM_8BIT, &serial_plat);
+
+ return 0;
+}
+console_initcall(rzx50_console_init);
diff --git a/arch/mips/mach-xburst/Kconfig b/arch/mips/mach-xburst/Kconfig
index 0306f2e..60e411c 100644
--- a/arch/mips/mach-xburst/Kconfig
+++ b/arch/mips/mach-xburst/Kconfig
@@ -7,4 +7,15 @@ config ARCH_TEXT_BASE
config CPU_JZ4755
bool
+choice
+ prompt "Board type"
+
+config BOARD_RZX50
+ bool "Ritmix RZX-50"
+ select CPU_JZ4755
+
+endchoice
+
+source arch/mips/boards/rzx50/Kconfig
+
endif
diff --git a/arch/mips/mach-xburst/include/mach/debug_ll.h b/arch/mips/mach-xburst/include/mach/debug_ll.h
index 90f6528..a8c82f2 100644
--- a/arch/mips/mach-xburst/include/mach/debug_ll.h
+++ b/arch/mips/mach-xburst/include/mach/debug_ll.h
@@ -24,6 +24,10 @@
/** @file
* This File contains declaration for early output support
*/
+#ifdef CONFIG_BOARD_RZX50
+#include <mach/debug_ll_jz4755.h>
+#endif
+
#include <debug_ll_common.h>
#endif /* __MACH_XBURST_DEBUG_LL__ */
diff --git a/arch/mips/mach-xburst/mach-xburst.dox b/arch/mips/mach-xburst/mach-xburst.dox
index 84ae221..a5e524d 100644
--- a/arch/mips/mach-xburst/mach-xburst.dox
+++ b/arch/mips/mach-xburst/mach-xburst.dox
@@ -2,4 +2,6 @@
@section xburst_boards XBurst-based boards
+@li @subpage rzx50
+
*/
--
1.7.10
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http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [RFC 4/5] MIPS: XBurst: add Ritmix RZX-50 board support
2012-05-10 9:32 ` [RFC 4/5] MIPS: XBurst: add Ritmix RZX-50 board support Antony Pavlov
@ 2012-05-10 16:31 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 10+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-05-10 16:31 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox
> diff --git a/arch/mips/boards/rzx50/Makefile b/arch/mips/boards/rzx50/Makefile
> new file mode 100644
> index 0000000..ff1a655
> --- /dev/null
> +++ b/arch/mips/boards/rzx50/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_DRIVER_SERIAL_NS16550) += serial.o
> diff --git a/arch/mips/boards/rzx50/config.h b/arch/mips/boards/rzx50/config.h
> new file mode 100644
> index 0000000..eb4ab08
> --- /dev/null
> +++ b/arch/mips/boards/rzx50/config.h
> @@ -0,0 +1,19 @@
> +/*
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + *
> + */
> +
> +/* nothing special yet */
> diff --git a/arch/mips/boards/rzx50/rzx50.dox b/arch/mips/boards/rzx50/rzx50.dox
> new file mode 100644
> index 0000000..9f0d600
> --- /dev/null
> +++ b/arch/mips/boards/rzx50/rzx50.dox
> @@ -0,0 +1,20 @@
> +/** @page rzx50 Ritmix RZX-50 game console
> +
> +The portable game console has
> +@li JZ4755 SoC;
> +@li 64 MiB SDRAM;
> +@li 4 MiB microSDHC card / 4 MiB NAND type Flash Memory;
4 MiB? of 4 BiG?
Best Regards,
J.
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [RFC 5/5] MIPS: add defconfig for Ritmix RZX-50 board
2012-05-10 9:32 [RFC 0/5] MIPS: add XBurst processor family support Antony Pavlov
` (3 preceding siblings ...)
2012-05-10 9:32 ` [RFC 4/5] MIPS: XBurst: add Ritmix RZX-50 board support Antony Pavlov
@ 2012-05-10 9:32 ` Antony Pavlov
2012-05-11 7:26 ` [RFC 0/5] MIPS: add XBurst processor family support Sascha Hauer
5 siblings, 0 replies; 10+ messages in thread
From: Antony Pavlov @ 2012-05-10 9:32 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/configs/rzx50_defconfig | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
create mode 100644 arch/mips/configs/rzx50_defconfig
diff --git a/arch/mips/configs/rzx50_defconfig b/arch/mips/configs/rzx50_defconfig
new file mode 100644
index 0000000..722d977
--- /dev/null
+++ b/arch/mips/configs/rzx50_defconfig
@@ -0,0 +1,29 @@
+CONFIG_MACH_MIPS_XBURST=y
+CONFIG_BAUDRATE=57600
+CONFIG_GLOB=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_HUSH_GETOPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+# CONFIG_DEFAULT_ENVIRONMENT is not set
+CONFIG_DEBUG_LL=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_LOADY=y
+CONFIG_CMD_LOADS=y
+CONFIG_CMD_SAVES=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_BOOTM_VERBOSE=y
+CONFIG_CMD_BOOTM_INITRD=y
+CONFIG_CMD_BOOTM_OFTREE=y
+CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+# CONFIG_SPI is not set
+CONFIG_SHA1=y
+CONFIG_SHA224=y
+CONFIG_SHA256=y
--
1.7.10
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [RFC 0/5] MIPS: add XBurst processor family support
2012-05-10 9:32 [RFC 0/5] MIPS: add XBurst processor family support Antony Pavlov
` (4 preceding siblings ...)
2012-05-10 9:32 ` [RFC 5/5] MIPS: add defconfig for Ritmix RZX-50 board Antony Pavlov
@ 2012-05-11 7:26 ` Sascha Hauer
5 siblings, 0 replies; 10+ messages in thread
From: Sascha Hauer @ 2012-05-11 7:26 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox
On Thu, May 10, 2012 at 01:32:05PM +0400, Antony Pavlov wrote:
> This patch series introduce XBurst processor family support to barebox.
>
> XBurst is an CPU family developed by Ingenic Semiconductor
> to address the requirements of mobile devices. XBurst processors
> are used in mobile gaming consoles (e.g. notable Dingoo A320),
> e-books, mp3-players and so on.
>
> The patches have preliminary status. Please, review it!
Apart from the two comments the series looks good.
Sascha
>
> [RFC 1/5] MIPS: add common header file for DEBUG_LL via NS16550
> [RFC 2/5] MIPS: add XBurst processor family support
> [RFC 3/5] MISP: XBurst: add JZ4755 CPU support
> [RFC 4/5] MIPS: XBurst: add Ritmix RZX-50 board support
> [RFC 5/5] MIPS: add defconfig for Ritmix RZX-50 board
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
--
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Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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