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From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 2/4] ARM MMU: call __mmu_cache_* as regular C functions
Date: Sun, 12 Aug 2012 16:30:30 +0200	[thread overview]
Message-ID: <1344781832-17978-3-git-send-email-s.hauer@pengutronix.de> (raw)
In-Reply-To: <1344781832-17978-1-git-send-email-s.hauer@pengutronix.de>

Now that __mmu_cache_* restore the registers they can be called
as regular C functions. Create a header file for them and use
C functions rather than inline assembly.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/cpu/mmu.c |   25 ++++++-------------------
 arch/arm/cpu/mmu.h |    8 ++++++++
 2 files changed, 14 insertions(+), 19 deletions(-)
 create mode 100644 arch/arm/cpu/mmu.h

diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 607f357..dad8092 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -8,6 +8,8 @@
 #include <asm/system.h>
 #include <memory.h>
 
+#include "mmu.h"
+
 static unsigned long *ttb;
 
 static void create_sections(unsigned long virt, unsigned long phys, int size_m,
@@ -21,12 +23,7 @@ static void create_sections(unsigned long virt, unsigned long phys, int size_m,
 	for (i = size_m; i > 0; i--, virt++, phys++)
 		ttb[virt] = (phys << 20) | flags;
 
-	asm volatile (
-		"bl __mmu_cache_flush;"
-		:
-		:
-		: "r0", "r1", "r2", "r3", "r6", "r10", "r12", "lr", "cc", "memory"
-	);
+	__mmu_cache_flush();
 }
 
 /*
@@ -255,12 +252,7 @@ static int mmu_init(void)
 		create_sections(bank->start, bank->start, bank->size >> 20,
 				PMD_SECT_DEF_CACHED);
 
-	asm volatile (
-		"bl __mmu_cache_on;"
-		:
-		:
-		: "r0", "r1", "r2", "r3", "r6", "r10", "r12", "lr", "cc", "memory"
-        );
+	__mmu_cache_on();
 
 	/*
 	 * Now that we have the MMU and caches on remap sdram again using
@@ -284,13 +276,8 @@ void mmu_disable(void)
 	if (outer_cache.disable)
 		outer_cache.disable();
 
-	asm volatile (
-		"bl __mmu_cache_flush;"
-		"bl __mmu_cache_off;"
-		:
-		:
-		: "r0", "r1", "r2", "r3", "r6", "r10", "r12", "lr", "cc", "memory"
-	);
+	__mmu_cache_flush();
+	__mmu_cache_off();
 }
 
 #define PAGE_ALIGN(s) ((s) + PAGE_SIZE - 1) & ~(PAGE_SIZE - 1);
diff --git a/arch/arm/cpu/mmu.h b/arch/arm/cpu/mmu.h
new file mode 100644
index 0000000..618968b
--- /dev/null
+++ b/arch/arm/cpu/mmu.h
@@ -0,0 +1,8 @@
+#ifndef __ARM_MMU_H
+#define __ARM_MMU_H
+
+void __mmu_cache_on(void);
+void __mmu_cache_off(void);
+void __mmu_cache_flush(void);
+
+#endif /* __ARM_MMU_H */
-- 
1.7.10.4


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  parent reply	other threads:[~2012-08-12 14:30 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-08-12 14:30 [PATCH] ARM: enable MMU in pbl Sascha Hauer
2012-08-12 14:30 ` [PATCH 1/4] ARM __mmu_cache_*: Do not clobber registers Sascha Hauer
2012-08-12 14:30 ` Sascha Hauer [this message]
2012-08-12 14:30 ` [PATCH 3/4] ARM pbl: enable MMU during decompression Sascha Hauer
2012-08-12 18:09   ` Jean-Christophe PLAGNIOL-VILLARD
2012-08-13 18:29     ` Sascha Hauer
2012-09-21 13:18       ` Jean-Christophe PLAGNIOL-VILLARD
2012-08-12 14:30 ` [PATCH 4/4] create a common ARM flush_icache function Sascha Hauer
2012-09-20 18:52 ` [PATCH] ARM: enable MMU in pbl Jean-Christophe PLAGNIOL-VILLARD
2012-09-20 19:56   ` Sascha Hauer
2012-09-21 13:23     ` Jean-Christophe PLAGNIOL-VILLARD
2012-09-21 14:46       ` Jean-Christophe PLAGNIOL-VILLARD
2012-09-22 10:21         ` Sascha Hauer
2012-09-22 11:41           ` Jean-Christophe PLAGNIOL-VILLARD

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