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From: Jan Luebbe <jlu@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 09/10] omap3: allow enabling clocks for UART3, MMC1 and SPI
Date: Mon,  3 Sep 2012 13:46:04 +0200	[thread overview]
Message-ID: <1346672765-16162-10-git-send-email-jlu@pengutronix.de> (raw)
In-Reply-To: <1346672765-16162-1-git-send-email-jlu@pengutronix.de>

Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
---
 arch/arm/mach-omap/Kconfig       |    4 ++++
 arch/arm/mach-omap/omap3_clock.c |   35 +++++++++++++++++++++++++----------
 2 files changed, 29 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index a781287..82fa46b 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -61,6 +61,10 @@ config OMAP_CLOCK_UART3
 	bool
 config OMAP_CLOCK_I2C
 	bool
+config OMAP_CLOCK_MMC1
+	bool
+config OMAP_CLOCK_SPI
+	bool
 
 # Blind enable all possible clocks.. think twice before you do this.
 config OMAP_CLOCK_ALL
diff --git a/arch/arm/mach-omap/omap3_clock.c b/arch/arm/mach-omap/omap3_clock.c
index 646235e..bfaa1cf 100644
--- a/arch/arm/mach-omap/omap3_clock.c
+++ b/arch/arm/mach-omap/omap3_clock.c
@@ -674,16 +674,31 @@ static void per_clocks_enable(void)
 	/* Enable the ICLK for 32K Sync Timer as its used in udelay */
 	sr32(CM_REG(ICLKEN_WKUP), 2, 1, 0x1);
 
-#ifdef CONFIG_OMAP_CLOCK_UART
-	/* Enable UART1 clocks */
-	sr32(CM_REG(FCLKEN1_CORE), 13, 1, 0x1);
-	sr32(CM_REG(ICLKEN1_CORE), 13, 1, 0x1);
-#endif
-#ifdef CONFIG_OMAP_CLOCK_I2C
-	/* Turn on all 3 I2C clocks */
-	sr32(CM_REG(FCLKEN1_CORE), 15, 3, 0x7);
-	sr32(CM_REG(ICLKEN1_CORE), 15, 3, 0x7);	/* I2C1,2,3 = on */
-#endif
+	if (IS_ENABLED(CONFIG_OMAP_CLOCK_UART)) {
+		/* Enable UART1 clocks */
+		sr32(CM_REG(FCLKEN1_CORE), 13, 1, 0x1);
+		sr32(CM_REG(ICLKEN1_CORE), 13, 1, 0x1);
+	}
+	if (IS_ENABLED(CONFIG_OMAP_CLOCK_UART3)) {
+		/* Enable UART3 clocks */
+		sr32(CM_REG(FCLKEN_PER), 11, 1, 0x1);
+		sr32(CM_REG(ICLKEN_PER), 11, 1, 0x1);
+	}
+	if (IS_ENABLED(CONFIG_OMAP_CLOCK_I2C)) {
+		/* Turn on all 3 I2C clocks */
+		sr32(CM_REG(FCLKEN1_CORE), 15, 3, 0x7);
+		sr32(CM_REG(ICLKEN1_CORE), 15, 3, 0x7);	/* I2C1,2,3 = on */
+	}
+	if (IS_ENABLED(CONFIG_OMAP_CLOCK_MMC1)) {
+		/* Enable MMC1 clocks */
+		sr32(CM_REG(FCLKEN1_CORE), 24, 1, 0x1);
+		sr32(CM_REG(ICLKEN1_CORE), 24, 1, 0x1);
+	}
+	if (IS_ENABLED(CONFIG_OMAP_CLOCK_SPI)) {
+		/* Enable SPI clocks */
+		sr32(CM_REG(FCLKEN1_CORE), 18, 4, 0xf);
+		sr32(CM_REG(ICLKEN1_CORE), 18, 4, 0xf);
+	}
 
 #ifdef CONFIG_OMAP_CLOCK_ALL
 #define FCK_IVA2_ON	0x00000001
-- 
1.7.10.4


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  parent reply	other threads:[~2012-09-03 11:46 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-03 11:45 Prepare support for TI AM35xx Jan Luebbe
2012-09-03 11:45 ` [PATCH 01/10] drivers/nor/m25p80: add JEDEC ID for Micron/Numonyx SPI NOR flash Jan Luebbe
2012-09-03 11:45 ` [PATCH 02/10] drivers/nor/m25p80: add MEMGETINFO ioctl Jan Luebbe
2012-09-04  8:20   ` Sascha Hauer
2012-09-03 11:45 ` [PATCH 03/10] Makefile: add target to produce a SPL compatible uimage Jan Luebbe
2012-09-03 16:22   ` Jean-Christophe PLAGNIOL-VILLARD
2012-09-03 11:45 ` [PATCH 04/10] scripts: add tool to create image for SPI boot on AM35xx Jan Luebbe
2012-09-04  8:27   ` Sascha Hauer
2012-09-03 11:46 ` [PATCH 05/10] common: split out meminfo output and make it optional Jan Luebbe
2012-09-03 11:46 ` [PATCH 06/10] omap: add SPI as a boot mode for xload Jan Luebbe
2012-09-03 16:24   ` Jean-Christophe PLAGNIOL-VILLARD
2012-09-04  7:41     ` Jan Weitzel
2012-09-03 11:46 ` [PATCH 07/10] drivers/net/ksz8864rmn: add driver for Micrel KSZ8864RMN Ethernet Switch Jan Luebbe
2012-09-03 11:46 ` [PATCH 08/10] drivers/net: add driver for the EMAC device found in some TI SoCs Jan Luebbe
2012-09-03 16:27   ` Jean-Christophe PLAGNIOL-VILLARD
2012-09-04  8:42   ` Sascha Hauer
2012-09-03 11:46 ` Jan Luebbe [this message]
2012-09-04  8:48   ` [PATCH 09/10] omap3: allow enabling clocks for UART3, MMC1 and SPI Sascha Hauer
2012-09-05  9:28     ` Jan Lübbe
2012-09-03 11:46 ` [PATCH 10/10] drivers/spi: add driver for the Multichannel SPI controller found in TI SoCs Jan Luebbe
2012-09-03 16:32   ` Jean-Christophe PLAGNIOL-VILLARD
2012-09-04  8:58   ` Sascha Hauer
2012-09-05  9:20     ` Jan Lübbe

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