[PATCH 0/2] P2020RDB eTSEC2

[PATCH 0/2] P2020RDB eTSEC2

[Renaud Barbier]

This patch set updates the gianfar driver and enables the port eTSEC2
of the P2020RDB. Both eTSEC2 and eTSEC3 can be used.
Also it has been noticed that dev_request_mem_region returns NULL when
a region is already mapped. Some of the registers set may be the same between
or within driver instances. This patch sorts out the conflict in region
request.

Renaud Barbier (2):
  gianfar: region request returns NULL on already mapped region
  P2020rdb: eTSEC2 support

 arch/ppc/boards/freescale-p2020rdb/p2020rdb.c |   24 ++++++++++++++++++-
 drivers/net/gianfar.c                         |   30 ++++++++++++++++++++++++-
 2 files changed, 51 insertions(+), 3 deletions(-)


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[PATCH 1/2] gianfar: region request returns NULL on already mapped region

[Renaud Barbier]

When requesting a memory region and that region has already been
requested within an instance of the driver or another instance, a NULL
pointer is obtained from the function dev_request_mem_region.
For a eTSEC port we have three sets of registers:
- MAC registers
- External phy access registers
- TBI registers.

Depending on the eTSEC port number and eTSEC version (v1/v2), the overlap
may happen between registers of a port or between registers of two ports
or more.
For instance, in eTSEC v1 all ports use the external phy registers from
eTSEC1 and for each port the MAC registers = TBI registers.
This patch works around the memory overlapping.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
---
 drivers/net/gianfar.c |   30 +++++++++++++++++++++++++++++-
 1 files changed, 29 insertions(+), 1 deletions(-)

diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 19544de..917f843 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -28,6 +28,8 @@
 #define RX_BUF_CNT 	PKTBUFSRX
 #define BUF_ALIGN	8
 
+static void __iomem *phyregs;
+
 /*
  * Initialize required registers to appropriate values, zeroing
  * those we don't care about (unless zero is bad, in which case,
@@ -488,9 +490,35 @@ static int gfar_probe(struct device_d *dev)
 
 	edev = &priv->edev;
 
+	/*
+	 * Memory region requests may return NULL because depending on
+	 * the Ethernet port, it may have been already mapped.
+	 * TSECv1:
+	 *  port 1: region 0 = 1 = 2
+	 *  port 2,3: region 0 = 2, region 1 = port 1 region 1
+	 *
+	 * TSECv2:
+	 *  port 1: 1 = 2
+	 *  port 2,3: no overlap, region 1 = port 1 region 1
+	 */
 	priv->regs = dev_request_mem_region(dev, 0);
-	priv->phyregs = dev_request_mem_region(dev, 1);
+	if (priv->regs == NULL)
+		priv->regs = phyregs;
+
+	if (phyregs == NULL) {
+		phyregs = dev_request_mem_region(dev, 1);
+		if (phyregs == NULL)
+			phyregs = priv->regs;
+	}
+	priv->phyregs = phyregs;
+
 	priv->phyregs_sgmii = dev_request_mem_region(dev, 2);
+	if (priv->phyregs_sgmii == NULL)
+#ifdef CONFIG_TSECV2
+		priv->phyregs_sgmii = priv->phyregs;
+#else
+		priv->phyregs_sgmii = priv->regs;
+#endif
 
 	priv->phyaddr = gfar_info->phyaddr;
 	priv->tbicr = gfar_info->tbicr;
-- 
1.7.1


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[PATCH 2/2] P2020rdb: eTSEC2 support

[Renaud Barbier]

This patch defines the parameters to configure the eTSEC2 Ethernet port.
It also sets the TBI physical address of port eTSEC1 to eTSEC3 to prevent
the eTSEC2 PHY(address 0) from going into an undefined state.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
---
 arch/ppc/boards/freescale-p2020rdb/p2020rdb.c |   24 ++++++++++++++++++++++--
 1 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
index 2431cb5..64170f8 100644
--- a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
+++ b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
@@ -63,9 +63,14 @@
 #define SYSCLK_50	50000000
 #define SYSCLK_100	100000000
 
-/* Ethernet. Use eTSEC3 */
+/* eTSEC2 and eTSEC 3 Ethernet port parameters */
 static struct gfar_info_struct gfar_info[] = {
 	{
+		.phyaddr = 0,
+		.tbiana = 0x1a0,
+		.tbicr = 0x9140,
+	},
+	{
 		.phyaddr = 1,
 		.tbiana = 0,
 		.tbicr = 0,
@@ -79,6 +84,9 @@ struct i2c_platform_data i2cplat = {
 
 static int devices_init(void)
 {
+	void __iomem *tsecregs;
+	int ix;
+
 	add_cfi_flash_device(DEVICE_ID_DYNAMIC, CFG_FLASH_BASE, 16 << 20, 0);
 
 	add_generic_device("i2c-fsl", 0, NULL, I2C1_BASE_ADDR,
@@ -86,8 +94,20 @@ static int devices_init(void)
 	add_generic_device("i2c-fsl", 1, NULL, I2C2_BASE_ADDR,
 			0x100, IORESOURCE_MEM, &i2cplat);
 
+	/*
+	 * Assign TBI physical address early because eTSEC2 has a PHY address
+	 * of 0. Otherwise, the PHY on eTSEC2 goes into a bad state since
+	 * the miidev driver does the first access.
+	 */
+	for (ix = 0; ix < 3; ix++) {
+		tsecregs = (void __iomem *)(GFAR_BASE_ADDR + (ix * 0x1000));
+		out_be32(tsecregs + 0x30, 0x1f);
+	}
+
+	/* eTSEC2 */
+	fsl_eth_init(2, &gfar_info[0]);
 	/* eTSEC3 */
-	fsl_eth_init(3, &gfar_info[0]);
+	fsl_eth_init(3, &gfar_info[1]);
 
 	devfs_add_partition("nor0", 0xf80000, 0x80000, DEVFS_PARTITION_FIXED,
 			    "self0");
-- 
1.7.1


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Re: [PATCH 0/2] P2020RDB eTSEC2

[Sascha Hauer]

Hi Renaud,

On Thu, Sep 13, 2012 at 06:41:49PM +0100, Renaud Barbier wrote:
> This patch set updates the gianfar driver and enables the port eTSEC2
> of the P2020RDB. Both eTSEC2 and eTSEC3 can be used.
> Also it has been noticed that dev_request_mem_region returns NULL when
> a region is already mapped. Some of the registers set may be the same between
> or within driver instances. This patch sorts out the conflict in region
> request.

That's not nice to have conflicting resources. The best solution would
be to register the phy independently of the network device and just use
the phy in the driver instead of registering it.
I see that with the current (generic network, mii) code this does not
work. Jean-Christophe currently works on phylib support which could
improve the situation somewhat. It may still not be possible to do what
you have to, but your patches will need adjustments to phylib anyway.

Could have have a look at it? I asked Jean-Christophe for sending the
phylib support again, and I think it can be merged then.

Thanks
 Sascha



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