From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 14/14] ARM i.MX25: Add function to setup chipselect
Date: Mon, 24 Sep 2012 12:46:23 +0200 [thread overview]
Message-ID: <1348483583-12586-15-git-send-email-s.hauer@pengutronix.de> (raw)
In-Reply-To: <1348483583-12586-1-git-send-email-s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/imx25.c | 9 +++++++++
arch/arm/mach-imx/include/mach/imx25-regs.h | 6 +-----
arch/arm/mach-imx/include/mach/weim.h | 3 +++
3 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-imx/imx25.c b/arch/arm/mach-imx/imx25.c
index 3f44649..32c0412 100644
--- a/arch/arm/mach-imx/imx25.c
+++ b/arch/arm/mach-imx/imx25.c
@@ -16,8 +16,17 @@
#include <mach/imx-regs.h>
#include <mach/iim.h>
#include <io.h>
+#include <mach/weim.h>
#include <sizes.h>
+void imx25_setup_weimcs(size_t cs, unsigned upper, unsigned lower,
+ unsigned additional)
+{
+ writel(upper, MX25_WEIM_BASE_ADDR + (cs * 0x10) + 0x0);
+ writel(lower, MX25_WEIM_BASE_ADDR + (cs * 0x10) + 0x4);
+ writel(additional, MX25_WEIM_BASE_ADDR + (cs * 0x10) + 0x8);
+}
+
/* IIM fuse definitions */
#define IIM_BANK0_BASE (MX25_IIM_BASE_ADDR + 0x800)
#define IIM_BANK1_BASE (MX25_IIM_BASE_ADDR + 0xc00)
diff --git a/arch/arm/mach-imx/include/mach/imx25-regs.h b/arch/arm/mach-imx/include/mach/imx25-regs.h
index 8e7ff85..0bf6e11 100644
--- a/arch/arm/mach-imx/include/mach/imx25-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx25-regs.h
@@ -137,11 +137,7 @@
#define MX25_CSD1_BASE_ADDR 0x90000000
#define MX25_ESDCTL_BASE_ADDR 0xb8001000
-
-#define WEIM_BASE 0xb8002000
-#define CSCR_U(x) (WEIM_BASE + (x) * 0x10)
-#define CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10)
-#define CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10)
+#define MX25_WEIM_BASE_ADDR 0xb8002000
/*
* Watchdog Registers
diff --git a/arch/arm/mach-imx/include/mach/weim.h b/arch/arm/mach-imx/include/mach/weim.h
index 576f87c..8d572dc 100644
--- a/arch/arm/mach-imx/include/mach/weim.h
+++ b/arch/arm/mach-imx/include/mach/weim.h
@@ -10,6 +10,9 @@ void imx31_setup_weimcs(size_t cs, unsigned upper, unsigned lower,
void imx35_setup_weimcs(size_t cs, unsigned upper, unsigned lower,
unsigned additional);
+void imx25_setup_weimcs(size_t cs, unsigned upper, unsigned lower,
+ unsigned additional);
+
void imx1_setup_eimcs(size_t cs, unsigned upper, unsigned lower);
void imx21_setup_eimcs(size_t cs, unsigned upper, unsigned lower);
--
1.7.10.4
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next prev parent reply other threads:[~2012-09-24 10:46 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-24 10:46 [PATCH] i.MX register cleanups Sascha Hauer
2012-09-24 10:46 ` [PATCH 01/14] ARM i.MX31: give register base addresses a proper MX31_ prefix Sascha Hauer
2012-09-24 10:46 ` [PATCH 02/14] ARM i.MX35: give register base addresses a proper MX35_ prefix Sascha Hauer
2012-09-24 10:46 ` [PATCH 03/14] ARM i.MX21: give register base addresses a proper MX21_ prefix Sascha Hauer
2012-09-24 10:46 ` [PATCH 04/14] ARM i.MX1: give register base addresses a proper MX1_ prefix Sascha Hauer
2012-09-24 10:46 ` [PATCH 05/14] ARM i.MX27: give register base addresses a proper MX27_ prefix Sascha Hauer
2012-09-24 10:46 ` [PATCH 06/14] ARM i.MX25: give register base addresses a proper MX25_ prefix Sascha Hauer
2012-09-24 10:46 ` [PATCH 07/14] ARM i.MX/MXS: Allow to include imx*-regs.h directly Sascha Hauer
2012-09-24 10:46 ` [PATCH 08/14] ARM i.MX51: Use defines rather than hardcoded addresses Sascha Hauer
2012-09-24 10:46 ` [PATCH 09/14] ARM i.MX: Add header file for WEIM cs setup Sascha Hauer
2012-09-24 10:46 ` [PATCH 10/14] ARM i.MX1: Add function to setup chipselect Sascha Hauer
2012-09-24 10:46 ` [PATCH 11/14] ARM i.MX21: " Sascha Hauer
2012-09-24 10:46 ` [PATCH 12/14] ARM i.MX31: " Sascha Hauer
2012-09-24 10:46 ` [PATCH 13/14] ARM i.MX35: " Sascha Hauer
2012-09-24 10:46 ` Sascha Hauer [this message]
2012-09-24 12:04 ` [PATCH 14/14] ARM i.MX25: " Roberto Nibali
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