* [PATCH 01/14] twl6030: add debug info
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-08 22:55 ` [PATCH 02/14] omap4: add rename definitions to match datasheet Vicente
` (13 subsequent siblings)
14 siblings, 0 replies; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
Signed-off-by: Vicente <vicencb@gmail.com>
---
drivers/mfd/twl6030.c | 21 +++++++++++++++++++++
include/mfd/twl6030.h | 8 ++++++++
2 files changed, 29 insertions(+)
diff --git a/drivers/mfd/twl6030.c b/drivers/mfd/twl6030.c
index 01728fd..6b872ab 100644
--- a/drivers/mfd/twl6030.c
+++ b/drivers/mfd/twl6030.c
@@ -39,6 +39,27 @@ static int twl_probe(struct device_d *dev)
devfs_create(&(twl_dev->core.cdev));
+ if (IS_ENABLED(CONFIG_DEBUG)) {
+ u8 i, jtag_rev, eprom_rev;
+ int r;
+ u64 dieid;
+
+ r = twl6030_reg_read(twl_dev, TWL6030_JTAG_JTAGVERNUM,
+ &jtag_rev);
+ r |= twl6030_reg_read(twl_dev, TWL6030_JTAG_EPROM_REV,
+ &eprom_rev);
+ for (i = 0; i < 8; i++)
+ r |= twl6030_reg_read(twl_dev, TWL6030_DIEID_0+i,
+ ((u8 *)(&dieid))+i);
+ if (r)
+ dev_dbg(dev, "TWL6030 Error reading ID\n");
+ else
+ dev_dbg(dev, "TWL6030 JTAG REV: 0x%02X, "
+ "EPROM REV: 0x%02X, "
+ "DIE ID: 0x%016llX\n",
+ (unsigned)jtag_rev, (unsigned)eprom_rev, dieid);
+ }
+
return 0;
}
diff --git a/include/mfd/twl6030.h b/include/mfd/twl6030.h
index f1278d4..bb4f773 100644
--- a/include/mfd/twl6030.h
+++ b/include/mfd/twl6030.h
@@ -371,6 +371,14 @@ enum twl6030_reg {
/* JTAG */
TWL6030_JTAG_JTAGVERNUM = 0x0287,
TWL6030_JTAG_EPROM_REV = 0x02DF,
+ TWL6030_DIEID_0 = 0x02C0,
+ TWL6030_DIEID_1 = 0x02C1,
+ TWL6030_DIEID_2 = 0x02C2,
+ TWL6030_DIEID_3 = 0x02C3,
+ TWL6030_DIEID_4 = 0x02C4,
+ TWL6030_DIEID_5 = 0x02C5,
+ TWL6030_DIEID_6 = 0x02C6,
+ TWL6030_DIEID_7 = 0x02C7,
/* GPADC Trimming */
TWL6030_GPADC_TRIM1 = 0x02CD,
TWL6030_GPADC_TRIM2 = 0x02CE,
--
1.7.12.2
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^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 02/14] omap4: add rename definitions to match datasheet
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
2012-10-08 22:55 ` [PATCH 01/14] twl6030: add debug info Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-08 22:55 ` [PATCH 03/14] ARM: import irq handling from linux Vicente
` (12 subsequent siblings)
14 siblings, 0 replies; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
Signed-off-by: Vicente <vicencb@gmail.com>
---
arch/arm/boards/panda/mux.c | 52 ++++++++--------
arch/arm/boards/pcm049/mux.c | 44 +++++++-------
arch/arm/boards/phycard-a-xl2/mux.c | 46 +++++++-------
arch/arm/mach-omap/include/mach/omap4-mux.h | 80 ++++++++++++++++---------
arch/arm/mach-omap/include/mach/omap4-silicon.h | 13 ++++
5 files changed, 136 insertions(+), 99 deletions(-)
diff --git a/arch/arm/boards/panda/mux.c b/arch/arm/boards/panda/mux.c
index 3783006..8225aa6 100644
--- a/arch/arm/boards/panda/mux.c
+++ b/arch/arm/boards/panda/mux.c
@@ -212,31 +212,31 @@ static const struct pad_conf_entry core_padconf_array[] = {
};
static const struct pad_conf_entry wkup_padconf_array[] = {
- { PAD0_SIM_IO, IEN | M0 /* sim_io */ },
- { PAD1_SIM_CLK, M0 /* sim_clk */ },
- { PAD0_SIM_RESET, M0 /* sim_reset */ },
- { PAD1_SIM_CD, PTU | IEN | M0 /* sim_cd */ },
- { PAD0_SIM_PWRCTRL, M0 /* sim_pwrctrl */ },
- { PAD1_SR_SCL, PTU | IEN | M0 /* sr_scl */ },
- { PAD0_SR_SDA, PTU | IEN | M0 /* sr_sda */ },
- { PAD1_FREF_XTAL_IN, M0 /* # */ },
- { PAD0_FREF_SLICER_IN, M0 /* fref_slicer_in */ },
- { PAD1_FREF_CLK_IOREQ, M0 /* fref_clk_ioreq */ },
- { PAD0_FREF_CLK0_OUT, M2 /* sys_drm_msecure */ },
- { PAD1_FREF_CLK3_REQ, PTU | IEN | M0 /* # */ },
- { PAD0_FREF_CLK3_OUT, M0 /* fref_clk3_out */ },
- { PAD1_FREF_CLK4_REQ, PTU | IEN | M0 /* # */ },
- { PAD0_FREF_CLK4_OUT, M0 /* # */ },
- { PAD1_SYS_32K, IEN | M0 /* sys_32k */ },
- { PAD0_SYS_NRESPWRON, M0 /* sys_nrespwron */ },
- { PAD1_SYS_NRESWARM, M0 /* sys_nreswarm */ },
- { PAD0_SYS_PWR_REQ, PTU | M0 /* sys_pwr_req */ },
- { PAD1_SYS_PWRON_RESET, M3 /* gpio_wk29 */ },
- { PAD0_SYS_BOOT6, IEN | M3 /* gpio_wk9 */ },
- { PAD1_SYS_BOOT7, IEN | M3 /* gpio_wk10 */ },
- { PAD1_FREF_CLK3_REQ, M3 /* gpio_wk30 */ },
- { PAD1_FREF_CLK4_REQ, M3 /* gpio_wk7 */ },
- { PAD0_FREF_CLK4_OUT, M3 /* gpio_wk8 */ },
+ { GPIO_WK0, IEN | M0 /* sim_io */ },
+ { GPIO_WK1, M0 /* sim_clk */ },
+ { GPIO_WK2, M0 /* sim_reset */ },
+ { GPIO_WK3, PTU | IEN | M0 /* sim_cd */ },
+ { GPIO_WK4, M0 /* sim_pwrctrl */ },
+ { SR_SCL, PTU | IEN | M0 /* sr_scl */ },
+ { SR_SDA, PTU | IEN | M0 /* sr_sda */ },
+ { FREF_XTAL_IN, M0 /* # */ },
+ { FREF_SLICER_IN, M0 /* fref_slicer_in */ },
+ { FREF_CLK_IOREQ, M0 /* fref_clk_ioreq */ },
+ { FREF_CLK0_OUT, M2 /* sys_drm_msecure */ },
+ { FREF_CLK3_REQ, PTU | IEN | M0 /* # */ },
+ { FREF_CLK3_OUT, M0 /* fref_clk3_out */ },
+ { FREF_CLK4_REQ, PTU | IEN | M0 /* # */ },
+ { FREF_CLK4_OUT, M0 /* # */ },
+ { SYS_32K, IEN | M0 /* sys_32k */ },
+ { SYS_NRESPWRON, M0 /* sys_nrespwron */ },
+ { SYS_NRESWARM, M0 /* sys_nreswarm */ },
+ { SYS_PWR_REQ, PTU | M0 /* sys_pwr_req */ },
+ { SYS_PWRON_RESET_OUT, M3 /* gpio_wk29 */ },
+ { SYS_BOOT6, IEN | M3 /* gpio_wk9 */ },
+ { SYS_BOOT7, IEN | M3 /* gpio_wk10 */ },
+ { FREF_CLK3_REQ, M3 /* gpio_wk30 */ },
+ { FREF_CLK4_REQ, M3 /* gpio_wk7 */ },
+ { FREF_CLK4_OUT, M3 /* gpio_wk8 */ },
};
void set_muxconf_regs(void)
@@ -249,7 +249,7 @@ void set_muxconf_regs(void)
/* gpio_wk7 is used for controlling TPS on 4460 */
if (omap4_revision() >= OMAP4460_ES1_0) {
- writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ);
+ writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + FREF_CLK4_REQ);
/* Enable GPIO-1 clocks before TPS initialization */
omap4_enable_gpio1_wup_clocks();
}
diff --git a/arch/arm/boards/pcm049/mux.c b/arch/arm/boards/pcm049/mux.c
index 04e1d67..35eb0a3 100644
--- a/arch/arm/boards/pcm049/mux.c
+++ b/arch/arm/boards/pcm049/mux.c
@@ -212,28 +212,28 @@ static const struct pad_conf_entry core_padconf_array[] = {
};
static const struct pad_conf_entry wkup_padconf_array[] = {
- {PAD0_SIM_IO, (SAFE_MODE)}, /* nc */
- {PAD1_SIM_CLK, (SAFE_MODE)}, /* nc */
- {PAD0_SIM_RESET, (SAFE_MODE)}, /* nc */
- {PAD1_SIM_CD, (SAFE_MODE)}, /* nc */
- {PAD0_SIM_PWRCTRL, (SAFE_MODE)}, /* nc */
- {PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */
- {PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */
- {PAD1_FREF_XTAL_IN, (M0)}, /* # */
- {PAD0_FREF_SLICER_IN, (SAFE_MODE)}, /* nc */
- {PAD1_FREF_CLK_IOREQ, (SAFE_MODE)}, /* nc */
- {PAD0_FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */
- {PAD1_FREF_CLK3_REQ, (IEN | M3)}, /* gpio_wk30 */
- {PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */
- {PAD1_FREF_CLK4_REQ, (M0)}, /* fref_clk4_req */
- {PAD0_FREF_CLK4_OUT, (M0)}, /* fref_clk4_out */
- {PAD1_SYS_32K, (IEN | M0)}, /* sys_32k */
- {PAD0_SYS_NRESPWRON, (M0)}, /* sys_nrespwron */
- {PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */
- {PAD0_SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */
- {PAD1_SYS_PWRON_RESET, (M0)}, /* sys_pwron_reset_out */
- {PAD0_SYS_BOOT6, (M0)}, /* sys_boot6 */
- {PAD1_SYS_BOOT7, (M0)}, /* sys_boot7 */
+ {GPIO_WK0, (SAFE_MODE)}, /* nc */
+ {GPIO_WK1, (SAFE_MODE)}, /* nc */
+ {GPIO_WK2, (SAFE_MODE)}, /* nc */
+ {GPIO_WK3, (SAFE_MODE)}, /* nc */
+ {GPIO_WK4, (SAFE_MODE)}, /* nc */
+ {SR_SCL, (PTU | IEN | M0)}, /* sr_scl */
+ {SR_SDA, (PTU | IEN | M0)}, /* sr_sda */
+ {FREF_XTAL_IN, (M0)}, /* # */
+ {FREF_SLICER_IN, (SAFE_MODE)}, /* nc */
+ {FREF_CLK_IOREQ, (SAFE_MODE)}, /* nc */
+ {FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */
+ {FREF_CLK3_REQ, (IEN | M3)}, /* gpio_wk30 */
+ {FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */
+ {FREF_CLK4_REQ, (M0)}, /* fref_clk4_req */
+ {FREF_CLK4_OUT, (M0)}, /* fref_clk4_out */
+ {SYS_32K, (IEN | M0)}, /* sys_32k */
+ {SYS_NRESPWRON, (M0)}, /* sys_nrespwron */
+ {SYS_NRESWARM, (M0)}, /* sys_nreswarm */
+ {SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */
+ {SYS_PWRON_RESET_OUT, (M0)}, /* sys_pwron_reset_out */
+ {SYS_BOOT6, (M0)}, /* sys_boot6 */
+ {SYS_BOOT7, (M0)}, /* sys_boot7 */
};
void set_muxconf_regs(void)
diff --git a/arch/arm/boards/phycard-a-xl2/mux.c b/arch/arm/boards/phycard-a-xl2/mux.c
index dc605e3..a31d995 100644
--- a/arch/arm/boards/phycard-a-xl2/mux.c
+++ b/arch/arm/boards/phycard-a-xl2/mux.c
@@ -212,28 +212,28 @@ static const struct pad_conf_entry core_padconf_array[] = {
};
static const struct pad_conf_entry wkup_padconf_array[] = {
- {PAD0_SIM_IO, (SAFE_MODE)}, /* tbd */
- {PAD1_SIM_CLK, (SAFE_MODE)}, /* nc */
- {PAD0_SIM_RESET, (SAFE_MODE)}, /* nc */
- {PAD1_SIM_CD, (SAFE_MODE)}, /* nc */
- {PAD0_SIM_PWRCTRL, (SAFE_MODE)}, /* nc */
- {PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */
- {PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */
- {PAD1_FREF_XTAL_IN, (M0)}, /* # */
- {PAD0_FREF_SLICER_IN, (SAFE_MODE)}, /* nc */
- {PAD1_FREF_CLK_IOREQ, (SAFE_MODE)}, /* nc */
- {PAD0_FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */
- {PAD1_FREF_CLK3_REQ, (SAFE_MODE)}, /* nc */
- {PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */
- {PAD1_FREF_CLK4_REQ, (IEN | M3)}, /* gpio_wk7 */
- {PAD0_FREF_CLK4_OUT, (M0)}, /* fref_clk4_out */
- {PAD1_SYS_32K, (IEN | M0)}, /* sys_32k */
- {PAD0_SYS_NRESPWRON, (M0)}, /* sys_nrespwron */
- {PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */
- {PAD0_SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */
- {PAD1_SYS_PWRON_RESET, (M0)}, /* sys_pwron_reset_out */
- {PAD0_SYS_BOOT6, (M0)}, /* sys_boot6 */
- {PAD1_SYS_BOOT7, (M0)}, /* sys_boot7 */
+ {GPIO_WK0, (SAFE_MODE)}, /* tbd */
+ {GPIO_WK1, (SAFE_MODE)}, /* nc */
+ {GPIO_WK2, (SAFE_MODE)}, /* nc */
+ {GPIO_WK3, (SAFE_MODE)}, /* nc */
+ {GPIO_WK4, (SAFE_MODE)}, /* nc */
+ {SR_SCL, (PTU | IEN | M0)}, /* sr_scl */
+ {SR_SDA, (PTU | IEN | M0)}, /* sr_sda */
+ {FREF_XTAL_IN, (M0)}, /* # */
+ {FREF_SLICER_IN, (SAFE_MODE)}, /* nc */
+ {FREF_CLK_IOREQ, (SAFE_MODE)}, /* nc */
+ {FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */
+ {FREF_CLK3_REQ, (SAFE_MODE)}, /* nc */
+ {FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */
+ {FREF_CLK4_REQ, (IEN | M3)}, /* gpio_wk7 */
+ {FREF_CLK4_OUT, (M0)}, /* fref_clk4_out */
+ {SYS_32K, (IEN | M0)}, /* sys_32k */
+ {SYS_NRESPWRON, (M0)}, /* sys_nrespwron */
+ {SYS_NRESWARM, (M0)}, /* sys_nreswarm */
+ {SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */
+ {SYS_PWRON_RESET_OUT, (M0)}, /* sys_pwron_reset_out */
+ {SYS_BOOT6, (M0)}, /* sys_boot6 */
+ {SYS_BOOT7, (M0)}, /* sys_boot7 */
};
void set_muxconf_regs(void)
@@ -246,7 +246,7 @@ void set_muxconf_regs(void)
/* gpio_wk7 is used for controlling TPS on 4460 */
if (omap4_revision() >= OMAP4460_ES1_0) {
- writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ);
+ writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + FREF_CLK4_REQ);
/* Enable GPIO-1 clocks before TPS initialization */
omap4_enable_gpio1_wup_clocks();
}
diff --git a/arch/arm/mach-omap/include/mach/omap4-mux.h b/arch/arm/mach-omap/include/mach/omap4-mux.h
index 9ed6486..9088631 100644
--- a/arch/arm/mach-omap/include/mach/omap4-mux.h
+++ b/arch/arm/mach-omap/include/mach/omap4-mux.h
@@ -32,6 +32,7 @@ struct pad_conf_entry {
} __attribute__ ((packed));
+#define WAKEUP_EN (1 << 14)
#ifdef CONFIG_OFF_PADCONF
#define OFF_PD (1 << 12)
#define OFF_PU (3 << 12)
@@ -123,14 +124,23 @@ struct pad_conf_entry {
#define GPMC_WAIT0 0x008A
#define GPMC_WAIT1 0x008C
#define C2C_DATA11 0x008E
+#define GPMC_WAIT2 0x008E
#define C2C_DATA12 0x0090
+#define GPMC_NCS4 0x0090
#define C2C_DATA13 0x0092
+#define GPMC_NCS5 0x0092
#define C2C_DATA14 0x0094
+#define GPMC_NCS6 0x0094
#define C2C_DATA15 0x0096
+#define GPMC_NCS7 0x0096
#define HDMI_HPD 0x0098
+#define GPIO63 0x0098
#define HDMI_CEC 0x009A
+#define GPIO64 0x009A
#define HDMI_DDC_SCL 0x009C
+#define GPIO65 0x009C
#define HDMI_DDC_SDA 0x009E
+#define GPIO66 0x009E
#define CSI21_DX0 0x00A0
#define CSI21_DY0 0x00A2
#define CSI21_DX1 0x00A4
@@ -242,17 +252,29 @@ struct pad_conf_entry {
#define USBB2_HSIC_DATA 0x0178
#define USBB2_HSIC_STROBE 0x017A
#define UNIPRO_TX0 0x017C
+#define KPD_COL3 0x017C
#define UNIPRO_TY0 0x017E
+#define KPD_COL4 0x017E
#define UNIPRO_TX1 0x0180
+#define KPD_COL5 0x0180
#define UNIPRO_TY1 0x0182
+#define KPD_COL0 0x0182
#define UNIPRO_TX2 0x0184
+#define KPD_COL1 0x0184
#define UNIPRO_TY2 0x0186
+#define KPD_COL2 0x0186
#define UNIPRO_RX0 0x0188
+#define KPD_ROW3 0x0188
#define UNIPRO_RY0 0x018A
+#define KPD_ROW4 0x018A
#define UNIPRO_RX1 0x018C
+#define KPD_ROW5 0x018C
#define UNIPRO_RY1 0x018E
+#define KPD_ROW0 0x018E
#define UNIPRO_RX2 0x0190
+#define KPD_ROW1 0x0190
#define UNIPRO_RY2 0x0192
+#define KPD_ROW2 0x0192
#define USBA0_OTG_CE 0x0194
#define USBA0_OTG_DP 0x0196
#define USBA0_OTG_DM 0x0198
@@ -286,6 +308,8 @@ struct pad_conf_entry {
#define DPM_EMU17 0x01D0
#define DPM_EMU18 0x01D2
#define DPM_EMU19 0x01D4
+#define CSI22_DX2 0x01D6
+#define CSI22_DY2 0x01F4
#define WAKEUPEVENT_0 0x01D8
#define WAKEUPEVENT_1 0x01DC
#define WAKEUPEVENT_2 0x01E0
@@ -297,34 +321,34 @@ struct pad_conf_entry {
#define WKUP_REVISION 0x0000
#define WKUP_HWINFO 0x0004
#define WKUP_SYSCONFIG 0x0010
-#define PAD0_SIM_IO 0x0040
-#define PAD1_SIM_CLK 0x0042
-#define PAD0_SIM_RESET 0x0044
-#define PAD1_SIM_CD 0x0046
-#define PAD0_SIM_PWRCTRL 0x0048
-#define PAD1_SR_SCL 0x004A
-#define PAD0_SR_SDA 0x004C
-#define PAD1_FREF_XTAL_IN 0x004E
-#define PAD0_FREF_SLICER_IN 0x0050
-#define PAD1_FREF_CLK_IOREQ 0x0052
-#define PAD0_FREF_CLK0_OUT 0x0054
-#define PAD1_FREF_CLK3_REQ 0x0056
-#define PAD0_FREF_CLK3_OUT 0x0058
-#define PAD1_FREF_CLK4_REQ 0x005A
-#define PAD0_FREF_CLK4_OUT 0x005C
-#define PAD1_SYS_32K 0x005E
-#define PAD0_SYS_NRESPWRON 0x0060
-#define PAD1_SYS_NRESWARM 0x0062
-#define PAD0_SYS_PWR_REQ 0x0064
-#define PAD1_SYS_PWRON_RESET 0x0066
-#define PAD0_SYS_BOOT6 0x0068
-#define PAD1_SYS_BOOT7 0x006A
-#define PAD0_JTAG_NTRST 0x006C
-#define PAD1_JTAG_TCK 0x006D
-#define PAD0_JTAG_RTCK 0x0070
-#define PAD1_JTAG_TMS_TMSC 0x0072
-#define PAD0_JTAG_TDI 0x0074
-#define PAD1_JTAG_TDO 0x0076
+#define GPIO_WK0 0x0040
+#define GPIO_WK1 0x0042
+#define GPIO_WK2 0x0044
+#define GPIO_WK3 0x0046
+#define GPIO_WK4 0x0048
+#define SR_SCL 0x004A
+#define SR_SDA 0x004C
+#define FREF_XTAL_IN 0x004E
+#define FREF_SLICER_IN 0x0050
+#define FREF_CLK_IOREQ 0x0052
+#define FREF_CLK0_OUT 0x0054
+#define FREF_CLK3_REQ 0x0056
+#define FREF_CLK3_OUT 0x0058
+#define FREF_CLK4_REQ 0x005A
+#define FREF_CLK4_OUT 0x005C
+#define SYS_32K 0x005E
+#define SYS_NRESPWRON 0x0060
+#define SYS_NRESWARM 0x0062
+#define SYS_PWR_REQ 0x0064
+#define SYS_PWRON_RESET_OUT 0x0066
+#define SYS_BOOT6 0x0068
+#define SYS_BOOT7 0x006A
+#define JTAG_NTRST 0x006C
+#define JTAG_TCK 0x006E
+#define JTAG_RTCK 0x0070
+#define JTAG_TMS_TMSC 0x0072
+#define JTAG_TDI 0x0074
+#define JTAG_TDO 0x0076
#define PADCONF_WAKEUPEVENT_0 0x007C
#define CONTROL_SMART1NOPMIO_PADCONF_0 0x05A0
#define CONTROL_SMART1NOPMIO_PADCONF_1 0x05A4
diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h b/arch/arm/mach-omap/include/mach/omap4-silicon.h
index 345e09a..71ffe39 100644
--- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
@@ -72,6 +72,12 @@
#define OMAP44XX_UART2_BASE (OMAP44XX_L4_PER_BASE + 0x6c000)
#define OMAP44XX_UART3_BASE (OMAP44XX_L4_PER_BASE + 0x20000)
+/* I2C */
+#define OMAP44XX_I2C1_BASE (OMAP44XX_L4_PER_BASE + 0x070000)
+#define OMAP44XX_I2C2_BASE (OMAP44XX_L4_PER_BASE + 0x072000)
+#define OMAP44XX_I2C3_BASE (OMAP44XX_L4_PER_BASE + 0x060000)
+#define OMAP44XX_I2C4_BASE (OMAP44XX_L4_PER_BASE + 0x350000)
+
/* General Purpose Timers */
#define OMAP44XX_GPT1_BASE (OMAP44XX_L4_WKUP_BASE + 0x18000)
#define OMAP44XX_GPT2_BASE (OMAP44XX_L4_PER_BASE + 0x32000)
@@ -88,6 +94,13 @@
/* 32KTIMER */
#define OMAP_32KTIMER_BASE (OMAP44XX_L4_WKUP_BASE + 0x4000)
+/* MMC */
+#define OMAP44XX_MMC1_BASE (OMAP44XX_L4_PER_BASE + 0x09C100)
+#define OMAP44XX_MMC2_BASE (OMAP44XX_L4_PER_BASE + 0x0B4100)
+#define OMAP44XX_MMC3_BASE (OMAP44XX_L4_PER_BASE + 0x0AD100)
+#define OMAP44XX_MMC4_BASE (OMAP44XX_L4_PER_BASE + 0x0D1100)
+#define OMAP44XX_MMC5_BASE (OMAP44XX_L4_PER_BASE + 0x0D5100)
+
/* GPMC */
#define OMAP_GPMC_BASE 0x50000000
--
1.7.12.2
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^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 03/14] ARM: import irq handling from linux
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
2012-10-08 22:55 ` [PATCH 01/14] twl6030: add debug info Vicente
2012-10-08 22:55 ` [PATCH 02/14] omap4: add rename definitions to match datasheet Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-08 22:55 ` [PATCH 04/14] ARM: ensure irqs are disabled Vicente
` (11 subsequent siblings)
14 siblings, 0 replies; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
Signed-off-by: Vicente <vicencb@gmail.com>
---
arch/arm/cpu/exceptions.S | 1 -
arch/arm/cpu/interrupts.c | 6 +-
arch/arm/include/asm/irqflags.h | 155 ++++++++++++++++++++++++++++++++++++++++
arch/arm/include/asm/ptrace.h | 55 +++++++-------
4 files changed, 188 insertions(+), 29 deletions(-)
create mode 100644 arch/arm/include/asm/irqflags.h
diff --git a/arch/arm/cpu/exceptions.S b/arch/arm/cpu/exceptions.S
index 7f94f9f..8a08b2a 100644
--- a/arch/arm/cpu/exceptions.S
+++ b/arch/arm/cpu/exceptions.S
@@ -35,7 +35,6 @@
#define S_R0 0
#define MODE_SVC 0x13
-#define I_BIT 0x80
_STACK_START:
.word STACK_BASE + STACK_SIZE - 4
diff --git a/arch/arm/cpu/interrupts.c b/arch/arm/cpu/interrupts.c
index 4ed562f..6e60adc 100644
--- a/arch/arm/cpu/interrupts.c
+++ b/arch/arm/cpu/interrupts.c
@@ -57,9 +57,9 @@ void show_regs (struct pt_regs *regs)
printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
printf ("Flags: %c%c%c%c",
- flags & CC_N_BIT ? 'N' : 'n',
- flags & CC_Z_BIT ? 'Z' : 'z',
- flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
+ flags & PSR_N_BIT ? 'N' : 'n',
+ flags & PSR_Z_BIT ? 'Z' : 'z',
+ flags & PSR_C_BIT ? 'C' : 'c', flags & PSR_V_BIT ? 'V' : 'v');
printf (" IRQs %s FIQs %s Mode %s%s\n",
interrupts_enabled (regs) ? "on" : "off",
fast_interrupts_enabled (regs) ? "on" : "off",
diff --git a/arch/arm/include/asm/irqflags.h b/arch/arm/include/asm/irqflags.h
new file mode 100644
index 0000000..1e6cca5
--- /dev/null
+++ b/arch/arm/include/asm/irqflags.h
@@ -0,0 +1,155 @@
+#ifndef __ASM_ARM_IRQFLAGS_H
+#define __ASM_ARM_IRQFLAGS_H
+
+#ifdef __KERNEL__
+
+#include <asm/ptrace.h>
+
+/*
+ * CPU interrupt mask handling.
+ */
+#if __LINUX_ARM_ARCH__ >= 6
+
+static inline unsigned long arch_local_irq_save(void)
+{
+ unsigned long flags;
+
+ asm volatile(
+ " mrs %0, cpsr @ arch_local_irq_save\n"
+ " cpsid i"
+ : "=r" (flags) : : "memory", "cc");
+ return flags;
+}
+
+static inline void arch_local_irq_enable(void)
+{
+ asm volatile(
+ " cpsie i @ arch_local_irq_enable"
+ :
+ :
+ : "memory", "cc");
+}
+
+static inline void arch_local_irq_disable(void)
+{
+ asm volatile(
+ " cpsid i @ arch_local_irq_disable"
+ :
+ :
+ : "memory", "cc");
+}
+
+#define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
+#define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
+#else
+
+/*
+ * Save the current interrupt enable state & disable IRQs
+ */
+static inline unsigned long arch_local_irq_save(void)
+{
+ unsigned long flags, temp;
+
+ asm volatile(
+ " mrs %0, cpsr @ arch_local_irq_save\n"
+ " orr %1, %0, #128\n"
+ " msr cpsr_c, %1"
+ : "=r" (flags), "=r" (temp)
+ :
+ : "memory", "cc");
+ return flags;
+}
+
+/*
+ * Enable IRQs
+ */
+static inline void arch_local_irq_enable(void)
+{
+ unsigned long temp;
+ asm volatile(
+ " mrs %0, cpsr @ arch_local_irq_enable\n"
+ " bic %0, %0, #128\n"
+ " msr cpsr_c, %0"
+ : "=r" (temp)
+ :
+ : "memory", "cc");
+}
+
+/*
+ * Disable IRQs
+ */
+static inline void arch_local_irq_disable(void)
+{
+ unsigned long temp;
+ asm volatile(
+ " mrs %0, cpsr @ arch_local_irq_disable\n"
+ " orr %0, %0, #128\n"
+ " msr cpsr_c, %0"
+ : "=r" (temp)
+ :
+ : "memory", "cc");
+}
+
+/*
+ * Enable FIQs
+ */
+#define local_fiq_enable() \
+ ({ \
+ unsigned long temp; \
+ __asm__ __volatile__( \
+ "mrs %0, cpsr @ stf\n" \
+" bic %0, %0, #64\n" \
+" msr cpsr_c, %0" \
+ : "=r" (temp) \
+ : \
+ : "memory", "cc"); \
+ })
+
+/*
+ * Disable FIQs
+ */
+#define local_fiq_disable() \
+ ({ \
+ unsigned long temp; \
+ __asm__ __volatile__( \
+ "mrs %0, cpsr @ clf\n" \
+" orr %0, %0, #64\n" \
+" msr cpsr_c, %0" \
+ : "=r" (temp) \
+ : \
+ : "memory", "cc"); \
+ })
+
+#endif
+
+/*
+ * Save the current interrupt enable state.
+ */
+static inline unsigned long arch_local_save_flags(void)
+{
+ unsigned long flags;
+ asm volatile(
+ " mrs %0, cpsr @ local_save_flags"
+ : "=r" (flags) : : "memory", "cc");
+ return flags;
+}
+
+/*
+ * restore saved IRQ & FIQ state
+ */
+static inline void arch_local_irq_restore(unsigned long flags)
+{
+ asm volatile(
+ " msr cpsr_c, %0 @ local_irq_restore"
+ :
+ : "r" (flags)
+ : "memory", "cc");
+}
+
+static inline int arch_irqs_disabled_flags(unsigned long flags)
+{
+ return flags & PSR_I_BIT;
+}
+
+#endif
+#endif
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index b384369..ac065ab 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -23,25 +23,30 @@
/*
* PSR bits
*/
-#define USR26_MODE 0x00
-#define FIQ26_MODE 0x01
-#define IRQ26_MODE 0x02
-#define SVC26_MODE 0x03
-#define USR_MODE 0x10
-#define FIQ_MODE 0x11
-#define IRQ_MODE 0x12
-#define SVC_MODE 0x13
-#define ABT_MODE 0x17
-#define UND_MODE 0x1b
-#define SYSTEM_MODE 0x1f
-#define MODE_MASK 0x1f
-#define T_BIT 0x20
-#define F_BIT 0x40
-#define I_BIT 0x80
-#define CC_V_BIT (1 << 28)
-#define CC_C_BIT (1 << 29)
-#define CC_Z_BIT (1 << 30)
-#define CC_N_BIT (1 << 31)
+#define USR26_MODE 0x00000000
+#define FIQ26_MODE 0x00000001
+#define IRQ26_MODE 0x00000002
+#define SVC26_MODE 0x00000003
+#define USR_MODE 0x00000010
+#define FIQ_MODE 0x00000011
+#define IRQ_MODE 0x00000012
+#define SVC_MODE 0x00000013
+#define ABT_MODE 0x00000017
+#define UND_MODE 0x0000001b
+#define SYSTEM_MODE 0x0000001f
+#define MODE32_BIT 0x00000010
+#define MODE_MASK 0x0000001f
+#define PSR_T_BIT 0x00000020
+#define PSR_F_BIT 0x00000040
+#define PSR_I_BIT 0x00000080
+#define PSR_A_BIT 0x00000100
+#define PSR_E_BIT 0x00000200
+#define PSR_J_BIT 0x01000000
+#define PSR_Q_BIT 0x08000000
+#define PSR_V_BIT 0x10000000
+#define PSR_C_BIT 0x20000000
+#define PSR_Z_BIT 0x40000000
+#define PSR_N_BIT 0x80000000
#define PCMASK 0
#ifndef __ASSEMBLY__
@@ -79,7 +84,7 @@ struct pt_regs {
#ifdef CONFIG_ARM_THUMB
#define thumb_mode(regs) \
- (((regs)->ARM_cpsr & T_BIT))
+ (((regs)->ARM_cpsr & PSR_T_BIT))
#else
#define thumb_mode(regs) (0)
#endif
@@ -88,13 +93,13 @@ struct pt_regs {
((regs)->ARM_cpsr & MODE_MASK)
#define interrupts_enabled(regs) \
- (!((regs)->ARM_cpsr & I_BIT))
+ (!((regs)->ARM_cpsr & PSR_I_BIT))
#define fast_interrupts_enabled(regs) \
- (!((regs)->ARM_cpsr & F_BIT))
+ (!((regs)->ARM_cpsr & PSR_F_BIT))
#define condition_codes(regs) \
- ((regs)->ARM_cpsr & (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT))
+ ((regs)->ARM_cpsr & (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT))
/* Are the current registers suitable for user mode?
* (used to maintain security in signal handlers)
@@ -102,13 +107,13 @@ struct pt_regs {
static inline int valid_user_regs(struct pt_regs *regs)
{
if ((regs->ARM_cpsr & 0xf) == 0 &&
- (regs->ARM_cpsr & (F_BIT|I_BIT)) == 0)
+ (regs->ARM_cpsr & (PSR_F_BIT|PSR_I_BIT)) == 0)
return 1;
/*
* Force CPSR to something logical...
*/
- regs->ARM_cpsr &= (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT|0x10);
+ regs->ARM_cpsr &= (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT|0x10);
return 0;
}
--
1.7.12.2
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^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 04/14] ARM: ensure irqs are disabled
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
` (2 preceding siblings ...)
2012-10-08 22:55 ` [PATCH 03/14] ARM: import irq handling from linux Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-08 22:55 ` [PATCH 05/14] omap: revert gpiolib Vicente
` (10 subsequent siblings)
14 siblings, 0 replies; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
Signed-off-by: Vicente <vicencb@gmail.com>
---
arch/arm/cpu/cpu.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c
index 87ba877..7991c7a 100644
--- a/arch/arm/cpu/cpu.c
+++ b/arch/arm/cpu/cpu.c
@@ -28,6 +28,7 @@
#include <asm/mmu.h>
#include <asm/system.h>
#include <asm/memory.h>
+#include <asm/irqflags.h>
/**
* Enable processor's instruction cache
@@ -85,6 +86,12 @@ void arch_shutdown(void)
: "r0", "r1", "r2", "r3", "r6", "r10", "r12", "lr", "cc", "memory"
);
#endif
+ /*
+ * barebox normally does not use interrupts, but some functionalities
+ * (eg. OMAP4_USBBOOT) require them enabled. So be sure interrupts are
+ * disabled before exiting.
+ */
+ arch_local_irq_disable();
}
#ifdef CONFIG_THUMB2_BAREBOX
--
1.7.12.2
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^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 05/14] omap: revert gpiolib
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
` (3 preceding siblings ...)
2012-10-08 22:55 ` [PATCH 04/14] ARM: ensure irqs are disabled Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-08 22:55 ` [PATCH 06/14] omap4: add usb boot source Vicente
` (9 subsequent siblings)
14 siblings, 0 replies; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
By now it is still required as the changes proposed:
base should be calculated as dev->id * 32
region size should be reduced to 0x0f00
Does not solve the issue.
Signed-off-by: Vicente <vicencb@gmail.com>
---
arch/arm/Kconfig | 1 -
arch/arm/mach-omap/gpio.c | 170 ++++++++++++++++++++-----------------
arch/arm/mach-omap/omap3_generic.c | 19 -----
arch/arm/mach-omap/omap4_generic.c | 19 -----
4 files changed, 93 insertions(+), 116 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8278c82..1cb56c5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -60,7 +60,6 @@ config ARCH_NOMADIK
config ARCH_OMAP
bool "TI OMAP"
select HAS_DEBUG_LL
- select GPIOLIB
config ARCH_PXA
bool "Intel/Marvell PXA based"
diff --git a/arch/arm/mach-omap/gpio.c b/arch/arm/mach-omap/gpio.c
index 376e9a7..bb5f30f 100644
--- a/arch/arm/mach-omap/gpio.c
+++ b/arch/arm/mach-omap/gpio.c
@@ -32,10 +32,11 @@
* published by the Free Software Foundation.
*/
#include <common.h>
+#include <mach/gpio.h>
#include <io.h>
#include <errno.h>
-#include <gpio.h>
-#include <init.h>
+
+#ifdef CONFIG_ARCH_OMAP3
#define OMAP_GPIO_OE 0x0034
#define OMAP_GPIO_DATAIN 0x0038
@@ -43,114 +44,129 @@
#define OMAP_GPIO_CLEARDATAOUT 0x0090
#define OMAP_GPIO_SETDATAOUT 0x0094
-struct omap_gpio_chip {
- void __iomem *base;
- struct gpio_chip chip;
+static void __iomem *gpio_bank[] = {
+ (void *)0x48310000,
+ (void *)0x49050000,
+ (void *)0x49052000,
+ (void *)0x49054000,
+ (void *)0x49056000,
+ (void *)0x49058000,
+};
+#endif
+
+#ifdef CONFIG_ARCH_OMAP4
+
+#define OMAP_GPIO_OE 0x0134
+#define OMAP_GPIO_DATAIN 0x0138
+#define OMAP_GPIO_DATAOUT 0x013c
+#define OMAP_GPIO_CLEARDATAOUT 0x0190
+#define OMAP_GPIO_SETDATAOUT 0x0194
+
+static void __iomem *gpio_bank[] = {
+ (void *)0x4a310000,
+ (void *)0x48055000,
+ (void *)0x48057000,
+ (void *)0x48059000,
+ (void *)0x4805b000,
+ (void *)0x4805d000,
};
+#endif
-static inline int omap_get_gpio_index(int gpio)
+static inline void __iomem *get_gpio_base(int gpio)
{
- return gpio & 0x1f;
+ return gpio_bank[gpio >> 5];
}
-static void omap_gpio_set_value(struct gpio_chip *chip,
- unsigned gpio, int value)
+static inline int get_gpio_index(int gpio)
{
- struct omap_gpio_chip *omapgpio =
- container_of(chip, struct omap_gpio_chip, chip);
- void __iomem *base = omapgpio->base;
- u32 l = 0;
-
- if (value)
- base += OMAP_GPIO_SETDATAOUT;
- else
- base += OMAP_GPIO_CLEARDATAOUT;
+ return gpio & 0x1f;
+}
- l = 1 << omap_get_gpio_index(gpio);
+static inline int gpio_valid(int gpio)
+{
+ if (gpio < 0)
+ return -1;
+ if (gpio / 32 < ARRAY_SIZE(gpio_bank))
+ return 0;
+ return -1;
+}
- writel(l, base);
+static int check_gpio(int gpio)
+{
+ if (gpio_valid(gpio) < 0) {
+ printf("ERROR : check_gpio: invalid GPIO %d\n", gpio);
+ return -1;
+ }
+ return 0;
}
-static int omap_gpio_direction_input(struct gpio_chip *chip,
- unsigned gpio)
+void gpio_set_value(unsigned gpio, int value)
{
- struct omap_gpio_chip *omapgpio =
- container_of(chip, struct omap_gpio_chip, chip);
- void __iomem *base = omapgpio->base;
- u32 val;
+ void __iomem *reg;
+ u32 l = 0;
- base += OMAP_GPIO_OE;
+ if (check_gpio(gpio) < 0)
+ return;
- val = readl(base);
- val |= 1 << omap_get_gpio_index(gpio);
- writel(val, base);
+ reg = get_gpio_base(gpio);
- return 0;
+ if (value)
+ reg += OMAP_GPIO_SETDATAOUT;
+ else
+ reg += OMAP_GPIO_CLEARDATAOUT;
+ l = 1 << get_gpio_index(gpio);
+
+ __raw_writel(l, reg);
}
-static int omap_gpio_direction_output(struct gpio_chip *chip,
- unsigned gpio, int value)
+int gpio_direction_input(unsigned gpio)
{
- struct omap_gpio_chip *omapgpio =
- container_of(chip, struct omap_gpio_chip, chip);
- void __iomem *base = omapgpio->base;
+ void __iomem *reg;
u32 val;
- omap_gpio_set_value(chip, gpio, value);
+ if (check_gpio(gpio) < 0)
+ return -EINVAL;
+
+ reg = get_gpio_base(gpio);
- base += OMAP_GPIO_OE;
+ reg += OMAP_GPIO_OE;
- val = readl(base);
- val &= ~(1 << omap_get_gpio_index(gpio));
- writel(val, base);
+ val = __raw_readl(reg);
+ val |= 1 << get_gpio_index(gpio);
+ __raw_writel(val, reg);
return 0;
}
-static int omap_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
+int gpio_direction_output(unsigned gpio, int value)
{
- struct omap_gpio_chip *omapgpio =
- container_of(chip, struct omap_gpio_chip, chip);
- void __iomem *base = omapgpio->base;
-
- base += OMAP_GPIO_DATAIN;
-
- return (readl(base) & (1 << omap_get_gpio_index(gpio))) != 0;
-
-}
+ void __iomem *reg;
+ u32 val;
-static struct gpio_ops omap_gpio_ops = {
- .direction_input = omap_gpio_direction_input,
- .direction_output = omap_gpio_direction_output,
- .get = omap_gpio_get_value,
- .set = omap_gpio_set_value,
-};
+ if (check_gpio(gpio) < 0)
+ return -EINVAL;
+ reg = get_gpio_base(gpio);
-static int omap_gpio_probe(struct device_d *dev)
-{
- struct omap_gpio_chip *omapgpio;
+ gpio_set_value(gpio, value);
- omapgpio = xzalloc(sizeof(*omapgpio));
- omapgpio->base = dev_request_mem_region(dev, 0);
- omapgpio->chip.ops = &omap_gpio_ops;
- omapgpio->chip.base = -1;
- omapgpio->chip.ngpio = 32;
- omapgpio->chip.dev = dev;
- gpiochip_add(&omapgpio->chip);
+ reg += OMAP_GPIO_OE;
- dev_dbg(dev, "probed gpiochip%d with base %d\n",
- dev->id, omapgpio->chip.base);
+ val = __raw_readl(reg);
+ val &= ~(1 << get_gpio_index(gpio));
+ __raw_writel(val, reg);
return 0;
}
-static struct driver_d omap_gpio_driver = {
- .name = "omap-gpio",
- .probe = omap_gpio_probe,
-};
-
-static int omap_gpio_add(void)
+int gpio_get_value(unsigned gpio)
{
- return platform_driver_register(&omap_gpio_driver);
+ void __iomem *reg;
+
+ if (check_gpio(gpio) < 0)
+ return -EINVAL;
+ reg = get_gpio_base(gpio);
+
+ reg += OMAP_GPIO_DATAIN;
+
+ return (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0;
}
-coredevice_initcall(omap_gpio_add);
diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c
index 5028e9a..af26af4 100644
--- a/arch/arm/mach-omap/omap3_generic.c
+++ b/arch/arm/mach-omap/omap3_generic.c
@@ -511,22 +511,3 @@ const struct gpmc_config omap3_nand_cfg = {
.base = 0x28000000,
.size = GPMC_SIZE_16M,
};
-
-static int omap3_gpio_init(void)
-{
- add_generic_device("omap-gpio", 0, NULL, 0x48310000,
- 0x100, IORESOURCE_MEM, NULL);
- add_generic_device("omap-gpio", 1, NULL, 0x49050000,
- 0x100, IORESOURCE_MEM, NULL);
- add_generic_device("omap-gpio", 2, NULL, 0x49052000,
- 0x100, IORESOURCE_MEM, NULL);
- add_generic_device("omap-gpio", 3, NULL, 0x49054000,
- 0x100, IORESOURCE_MEM, NULL);
- add_generic_device("omap-gpio", 4, NULL, 0x49056000,
- 0x100, IORESOURCE_MEM, NULL);
- add_generic_device("omap-gpio", 5, NULL, 0x49058000,
- 0x100, IORESOURCE_MEM, NULL);
-
- return 0;
-}
-coredevice_initcall(omap3_gpio_init);
diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
index a159dfc..617d786 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -572,22 +572,3 @@ const struct gpmc_config omap4_nand_cfg = {
.base = 0x28000000,
.size = GPMC_SIZE_16M,
};
-
-static int omap4_gpio_init(void)
-{
- add_generic_device("omap-gpio", 0, NULL, 0x4a310100,
- 0x1000, IORESOURCE_MEM, NULL);
- add_generic_device("omap-gpio", 1, NULL, 0x48055100,
- 0x1000, IORESOURCE_MEM, NULL);
- add_generic_device("omap-gpio", 2, NULL, 0x48057100,
- 0x1000, IORESOURCE_MEM, NULL);
- add_generic_device("omap-gpio", 3, NULL, 0x48059100,
- 0x1000, IORESOURCE_MEM, NULL);
- add_generic_device("omap-gpio", 4, NULL, 0x4805b100,
- 0x1000, IORESOURCE_MEM, NULL);
- add_generic_device("omap-gpio", 5, NULL, 0x4805d100,
- 0x1000, IORESOURCE_MEM, NULL);
-
- return 0;
-}
-coredevice_initcall(omap4_gpio_init);
--
1.7.12.2
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http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 06/14] omap4: add usb boot source
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
` (4 preceding siblings ...)
2012-10-08 22:55 ` [PATCH 05/14] omap: revert gpiolib Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-08 22:55 ` [PATCH 07/14] bootm: close open files Vicente
` (8 subsequent siblings)
14 siblings, 0 replies; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
Signed-off-by: Vicente <vicencb@gmail.com>
---
arch/arm/mach-omap/include/mach/xload.h | 1 +
arch/arm/mach-omap/omap4_generic.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/arm/mach-omap/include/mach/xload.h b/arch/arm/mach-omap/include/mach/xload.h
index 63b68df..44d3754 100644
--- a/arch/arm/mach-omap/include/mach/xload.h
+++ b/arch/arm/mach-omap/include/mach/xload.h
@@ -6,6 +6,7 @@ enum omap_boot_src {
OMAP_BOOTSRC_MMC1,
OMAP_BOOTSRC_NAND,
OMAP_BOOTSRC_SPI1,
+ OMAP_BOOTSRC_USB1,
};
enum omap_boot_src omap3_bootsrc(void);
diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
index 617d786..6562268 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -481,6 +481,8 @@ enum omap_boot_src omap4_bootsrc(void)
return OMAP_BOOTSRC_MMC1;
if (bootsrc & (1 << 3))
return OMAP_BOOTSRC_NAND;
+ if (bootsrc & (1<<20))
+ return OMAP_BOOTSRC_USB1;
return OMAP_BOOTSRC_UNKNOWN;
}
--
1.7.12.2
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 07/14] bootm: close open files
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
` (5 preceding siblings ...)
2012-10-08 22:55 ` [PATCH 06/14] omap4: add usb boot source Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-08 22:55 ` [PATCH 08/14] uimage: improve transfer speed Vicente
` (7 subsequent siblings)
14 siblings, 0 replies; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
Signed-off-by: Vicente <vicencb@gmail.com>
---
arch/arm/lib/bootm.c | 4 +++-
commands/bootm.c | 6 +++++-
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index c5b76ea..288c0b2 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -269,8 +269,9 @@ static int do_bootz_linux(struct image_data *data)
ret = do_bootz_linux_fdt(fd, data);
if (ret && ret != -ENXIO)
- return ret;
+ goto err_out;
+ close(fd);
return __do_bootm_linux(data, swap);
err_out:
@@ -431,6 +432,7 @@ static int do_bootm_aimage(struct image_data *data)
reset_cpu(0);
}
+ close(fd);
return __do_bootm_linux(data, 0);
err_out:
diff --git a/commands/bootm.c b/commands/bootm.c
index 8e51695..20b49f0 100644
--- a/commands/bootm.c
+++ b/commands/bootm.c
@@ -70,6 +70,7 @@ static int bootm_open_os_uimage(struct image_data *data)
if (ret) {
printf("Checking data crc failed with %s\n",
strerror(-ret));
+ uimage_close(data->os);
return ret;
}
}
@@ -79,6 +80,7 @@ static int bootm_open_os_uimage(struct image_data *data)
if (data->os->header.ih_arch != IH_ARCH) {
printf("Unsupported Architecture 0x%x\n",
data->os->header.ih_arch);
+ uimage_close(data->os);
return -EINVAL;
}
@@ -88,8 +90,10 @@ static int bootm_open_os_uimage(struct image_data *data)
if (data->os_address != UIMAGE_INVALID_ADDRESS) {
data->os_res = uimage_load_to_sdram(data->os, 0,
data->os_address);
- if (!data->os_res)
+ if (!data->os_res) {
+ uimage_close(data->os);
return -ENOMEM;
+ }
}
return 0;
--
1.7.12.2
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^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 08/14] uimage: improve transfer speed
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
` (6 preceding siblings ...)
2012-10-08 22:55 ` [PATCH 07/14] bootm: close open files Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-08 22:55 ` [PATCH 09/14] fs: improve robustness Vicente
` (6 subsequent siblings)
14 siblings, 0 replies; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
Signed-off-by: Vicente <vicencb@gmail.com>
---
common/uimage.c | 27 +++++++++++++++++++++++++--
1 file changed, 25 insertions(+), 2 deletions(-)
diff --git a/common/uimage.c b/common/uimage.c
index c72db41..8f8736f 100644
--- a/common/uimage.c
+++ b/common/uimage.c
@@ -28,6 +28,8 @@
#include <rtc.h>
#include <filetype.h>
#include <memory.h>
+#include <linux/stat.h>
+#include <sizes.h>
#ifdef CONFIG_UIMAGE_MULTI
static inline int uimage_is_multi_image(struct uimage_handle *handle)
@@ -380,15 +382,36 @@ struct resource *file_to_sdram(const char *filename, unsigned long adr)
struct resource *res;
size_t size = BUFSIZ;
size_t ofs = 0;
+ size_t now;
int fd;
+ struct stat s;
fd = open(filename, O_RDONLY);
if (fd < 0)
return NULL;
- while (1) {
- size_t now;
+ /* TODO: use fstat(fd, &s) when implemented and avoid reopening file */
+ if (stat(filename, &s) == 0 && s.st_size <= SZ_1G) {
+ /*
+ * As the file size is known we can read it at once and improve
+ * transfer speed.
+ */
+ size = s.st_size;
+ res = request_sdram_region("image", adr, size);
+ if (!res) {
+ printf("unable to request SDRAM 0x%08lx-0x%08lx\n",
+ adr, adr + size - 1);
+ goto out;
+ }
+ now = read_full(fd, (void *)(res->start), size);
+ if (now < size) {
+ release_sdram_region(res);
+ res = NULL;
+ }
+ goto out;
+ }
+ while (1) {
res = request_sdram_region("image", adr, size);
if (!res) {
printf("unable to request SDRAM 0x%08lx-0x%08lx\n",
--
1.7.12.2
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barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 09/14] fs: improve robustness
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
` (7 preceding siblings ...)
2012-10-08 22:55 ` [PATCH 08/14] uimage: improve transfer speed Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-08 22:55 ` [PATCH 10/14] omap4: add support for booting cpu from usb Vicente
` (5 subsequent siblings)
14 siblings, 0 replies; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
Signed-off-by: Vicente <vicencb@gmail.com>
---
fs/fs.c | 27 ++++++++++++++++++---------
1 file changed, 18 insertions(+), 9 deletions(-)
diff --git a/fs/fs.c b/fs/fs.c
index b9a1f17..dc3a6e3 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -715,12 +715,13 @@ int ioctl(int fd, int request, void *buf)
{
struct device_d *dev;
struct fs_driver_d *fsdrv;
- FILE *f = &files[fd];
+ FILE *f;
int ret;
if (check_fd(fd))
return -errno;
+ f = &files[fd];
dev = f->dev;
fsdrv = dev_to_fs_driver(dev);
@@ -738,12 +739,13 @@ int read(int fd, void *buf, size_t count)
{
struct device_d *dev;
struct fs_driver_d *fsdrv;
- FILE *f = &files[fd];
+ FILE *f;
int ret;
if (check_fd(fd))
return -errno;
+ f = &files[fd];
dev = f->dev;
fsdrv = dev_to_fs_driver(dev);
@@ -768,12 +770,13 @@ ssize_t write(int fd, const void *buf, size_t count)
{
struct device_d *dev;
struct fs_driver_d *fsdrv;
- FILE *f = &files[fd];
+ FILE *f;
int ret;
if (check_fd(fd))
return -errno;
+ f = &files[fd];
dev = f->dev;
fsdrv = dev_to_fs_driver(dev);
@@ -803,12 +806,13 @@ int flush(int fd)
{
struct device_d *dev;
struct fs_driver_d *fsdrv;
- FILE *f = &files[fd];
+ FILE *f;
int ret;
if (check_fd(fd))
return -errno;
+ f = &files[fd];
dev = f->dev;
fsdrv = dev_to_fs_driver(dev);
@@ -827,13 +831,14 @@ loff_t lseek(int fildes, loff_t offset, int whence)
{
struct device_d *dev;
struct fs_driver_d *fsdrv;
- FILE *f = &files[fildes];
+ FILE *f;
loff_t pos;
int ret;
if (check_fd(fildes))
return -1;
+ f = &files[fildes];
dev = f->dev;
fsdrv = dev_to_fs_driver(dev);
if (!fsdrv->lseek) {
@@ -877,11 +882,12 @@ int erase(int fd, size_t count, unsigned long offset)
{
struct device_d *dev;
struct fs_driver_d *fsdrv;
- FILE *f = &files[fd];
+ FILE *f;
int ret;
if (check_fd(fd))
return -errno;
+ f = &files[fd];
if (offset >= f->size)
return 0;
if (count > f->size - offset)
@@ -905,11 +911,12 @@ int protect(int fd, size_t count, unsigned long offset, int prot)
{
struct device_d *dev;
struct fs_driver_d *fsdrv;
- FILE *f = &files[fd];
+ FILE *f;
int ret;
if (check_fd(fd))
return -errno;
+ f = &files[fd];
if (offset >= f->size)
return 0;
if (count > f->size - offset)
@@ -948,13 +955,14 @@ void *memmap(int fd, int flags)
{
struct device_d *dev;
struct fs_driver_d *fsdrv;
- FILE *f = &files[fd];
+ FILE *f;
void *retp = (void *)-1;
int ret;
if (check_fd(fd))
return retp;
+ f = &files[fd];
dev = f->dev;
fsdrv = dev_to_fs_driver(dev);
@@ -975,12 +983,13 @@ int close(int fd)
{
struct device_d *dev;
struct fs_driver_d *fsdrv;
- FILE *f = &files[fd];
+ FILE *f;
int ret;
if (check_fd(fd))
return -errno;
+ f = &files[fd];
dev = f->dev;
fsdrv = dev_to_fs_driver(dev);
--
1.7.12.2
_______________________________________________
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^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 10/14] omap4: add support for booting cpu from usb
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
` (8 preceding siblings ...)
2012-10-08 22:55 ` [PATCH 09/14] fs: improve robustness Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-08 22:55 ` [PATCH 11/14] omap4: add serial communications over usb boot Vicente
` (4 subsequent siblings)
14 siblings, 0 replies; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
Signed-off-by: Vicente <vicencb@gmail.com>
---
Documentation/oamp4_usb_booting.txt | 27 ++
arch/arm/mach-omap/Kconfig | 9 +
arch/arm/mach-omap/Makefile | 1 +
arch/arm/mach-omap/include/mach/omap4_rom_usb.h | 141 ++++++++
arch/arm/mach-omap/omap4_generic.c | 23 +-
arch/arm/mach-omap/omap4_rom_usb.c | 198 +++++++++++
scripts/.gitignore | 1 +
scripts/Makefile | 4 +
scripts/omap4_usbboot.c | 415 ++++++++++++++++++++++++
scripts/usb.h | 61 ++++
scripts/usb_linux.c | 397 +++++++++++++++++++++++
11 files changed, 1270 insertions(+), 7 deletions(-)
create mode 100644 Documentation/oamp4_usb_booting.txt
create mode 100644 arch/arm/mach-omap/include/mach/omap4_rom_usb.h
create mode 100644 arch/arm/mach-omap/omap4_rom_usb.c
create mode 100644 scripts/omap4_usbboot.c
create mode 100644 scripts/usb.h
create mode 100644 scripts/usb_linux.c
diff --git a/Documentation/oamp4_usb_booting.txt b/Documentation/oamp4_usb_booting.txt
new file mode 100644
index 0000000..f0d45a2
--- /dev/null
+++ b/Documentation/oamp4_usb_booting.txt
@@ -0,0 +1,27 @@
+-------------- omap4_usb_booting --------------
+
+omap4 processors have support for booting from the usb port. To be able to fully
+use this feature you will need to enable the following:
+ OMAP4_USBBOOT
+ This CONFIG_ option adds the required infrastructure.
+ DRIVER_SERIAL_OMAP4_USBBOOT
+ This adds console support over the same usb port used for booting.
+ FS_OMAP4_USBBOOT
+ This adds filesystem support over the same usb port used for booting.
+
+To send the bootloader to the processor, execute the utility omap4_usbboot which
+can be found in the scripts subdirectory.
+omap4_usbboot takes two parameters:
+ the bootloader image
+ a directory name which will be the root for the guest system
+Once omap4_usbboot is running it will wait for enumeration of the omap4 cpu on
+the host usb subsystem. Then power on or reset the cpu with the correct sys_boot
+or SAR memory configuration.
+
+If everything works, barebox's first stage will boot and afterwards it will load
+the second stage found at "/barebox.bin".
+Barebox's second stage will still have access to the usb filesystem, so an
+initrd and a zImage can be loaded.
+
+Overall this procedure frees the developer of continously be changing the SD
+card or other boot media from host to target.
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index aa31633..b3dd6a4 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -82,6 +82,15 @@ config ARCH_TEXT_BASE
default 0x80e80000 if MACH_OMAP343xSDP
default 0x80e80000 if MACH_BEAGLE
+config OMAP4_USBBOOT
+ bool "enable booting from USB"
+ default n
+ depends on ARCH_OMAP4 && !MMU
+ help
+ Say Y here if you want to be able to boot an OMAP4 cpu from USB.
+ You need the utility program omap4_usbboot to boot from USB.
+ Please read oamp4_usb_booting.txt for more information.
+
config BOARDINFO
default "Texas Instrument's SDP343x" if MACH_OMAP343xSDP
default "Texas Instrument's Beagle" if MACH_BEAGLE
diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
index f752bc7..17d189d 100644
--- a/arch/arm/mach-omap/Makefile
+++ b/arch/arm/mach-omap/Makefile
@@ -26,4 +26,5 @@ obj-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o
obj-$(CONFIG_OMAP_GPMC) += gpmc.o devices-gpmc-nand.o
obj-$(CONFIG_SHELL_NONE) += xload.o
obj-$(CONFIG_I2C_TWL6030) += omap4_twl6030_mmc.o
+obj-$(CONFIG_OMAP4_USBBOOT) += omap4_rom_usb.o
obj-y += gpio.o
diff --git a/arch/arm/mach-omap/include/mach/omap4_rom_usb.h b/arch/arm/mach-omap/include/mach/omap4_rom_usb.h
new file mode 100644
index 0000000..50c359f
--- /dev/null
+++ b/arch/arm/mach-omap/include/mach/omap4_rom_usb.h
@@ -0,0 +1,141 @@
+/*
+ * Copyright (C) 2010 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _OMAP4_ROM_USB_H_
+#define _OMAP4_ROM_USB_H_
+
+/* public api */
+#define PUBLIC_API_BASE_4430 (0x28400)
+#define PUBLIC_API_BASE_4460 (0x30400)
+
+#define PUBLIC_GET_DRIVER_MEM_OFFSET (0x04)
+#define PUBLIC_GET_DRIVER_PER_OFFSET (0x08)
+#define PUBLIC_GET_DEVICE_MEM_OFFSET (0x80)
+#define PUBLIC_GET_DEVICE_PER_OFFSET (0x84)
+
+#define DEVICE_NULL 0x40
+#define DEVICE_UART1 0x41
+#define DEVICE_UART2 0x42
+#define DEVICE_UART3 0x43
+#define DEVICE_UART4 0x44
+#define DEVICE_USB 0x45
+#define DEVICE_USBEXT 0x46
+
+#define XFER_MODE_CPU 0
+#define XFER_MODE_DMA 1
+
+#define STATUS_OKAY 0
+#define STATUS_FAILED 1
+#define STATUS_TIMEOUT 2
+#define STATUS_BAD_PARAM 3
+#define STATUS_WAITING 4
+#define STATUS_NO_MEMORY 5
+#define STATUS_INVALID_PTR 6
+
+/* Memory ROM interface */
+struct read_desc {
+ u32 sector_start;
+ u32 sector_count;
+ void *destination;
+};
+
+struct mem_device {
+ u32 initialized;
+ u8 device_type;
+ u8 trials_count;
+ u32 xip_device;
+ u16 search_size;
+ u32 base_address;
+ u16 hs_toc_mask;
+ u16 gp_toc_mask;
+ void *device_data;
+ u16 *boot_options;
+};
+
+struct mem_driver {
+ int (*init)(struct mem_device *md);
+ int (*read)(struct mem_device *md, struct read_desc *rd);
+ int (*configure)(struct mem_device *md, void *config);
+};
+
+
+/* Peripheral ROM interface */
+struct per_handle {
+ void *set_to_null;
+ void (*callback)(struct per_handle *rh);
+ void *data;
+ u32 length;
+ u16 *options;
+ u32 xfer_mode;
+ u32 device_type;
+ u32 status;
+ u16 hs_toc_mask;
+ u16 gp_toc_mask;
+ u32 config_timeout;
+};
+
+struct per_driver {
+ int (*init)(struct per_handle *rh);
+ int (*read)(struct per_handle *rh);
+ int (*write)(struct per_handle *rh);
+ int (*close)(struct per_handle *rh);
+ int (*config)(struct per_handle *rh, void *x);
+};
+
+#define USB_SETCONFIGDESC_ATTRIBUTES (0)
+#define USB_SETCONFIGDESC_MAXPOWER (1)
+#define USB_SETSUSPEND_CALLBACK (2)
+struct per_usb_config {
+ u32 configid;
+ u32 value;
+};
+
+#define API(n) ((void *) (*((u32 *) (n))))
+/* ROM API End */
+
+struct omap4_usbboot {
+ struct per_handle dread;
+ struct per_handle dwrite;
+ struct per_driver *io;
+};
+
+void omap4_usbboot_close(void);
+
+void omap4_usbboot_queue_read(void *data, unsigned len);
+int omap4_usbboot_wait_read(void);
+int omap4_usbboot_is_read_waiting(void);
+int omap4_usbboot_is_read_ok(void);
+
+void omap4_usbboot_queue_write(void *data, unsigned len);
+int omap4_usbboot_wait_write(void);
+
+int omap4_usbboot_read(void *data, unsigned len);
+int omap4_usbboot_write(void *data, unsigned len);
+void omap4_usbboot_puts(const char *s);
+
+#endif
diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
index 6562268..5889109 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -8,6 +8,7 @@
#include <mach/xload.h>
#include <mach/gpmc.h>
#include <mach/gpio.h>
+#include <mach/omap4_rom_usb.h>
/*
* The following several lines are taken from U-Boot to support
@@ -459,13 +460,21 @@ late_initcall(watchdog_init);
static int omap_vector_init(void)
{
- __asm__ __volatile__ (
- "mov r0, #0;"
- "mcr p15, #0, r0, c12, c0, #0;"
- :
- :
- : "r0"
- );
+ /*
+ * omap4 usbboot interfaces with the omap4 ROM to reuse the USB port
+ * used for booting.
+ * The ROM code uses interrupts for the transfers, so do not modify the
+ * interrupt vectors in this case.
+ */
+ if (omap4_bootsrc() != OMAP_BOOTSRC_USB1) {
+ __asm__ __volatile__ (
+ "mov r0, #0;"
+ "mcr p15, #0, r0, c12, c0, #0;"
+ :
+ :
+ : "r0"
+ );
+ }
return 0;
}
diff --git a/arch/arm/mach-omap/omap4_rom_usb.c b/arch/arm/mach-omap/omap4_rom_usb.c
new file mode 100644
index 0000000..48d6433
--- /dev/null
+++ b/arch/arm/mach-omap/omap4_rom_usb.c
@@ -0,0 +1,198 @@
+/*
+ * This code is based on:
+ * git://github.com/swetland/omap4boot.git
+ */
+/*
+ * Copyright (C) 2010 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <common.h>
+#include <mach/omap4-silicon.h>
+#include <mach/omap4_rom_usb.h>
+#include <mach/xload.h>
+#include <init.h>
+
+static struct omap4_usbboot omap4_usbboot_pdata;
+
+static int omap4_usbboot_open(void)
+{
+ int (*rom_get_per_driver)(struct per_driver **io, u32 device_type);
+ int (*rom_get_per_device)(struct per_handle **rh);
+ struct per_handle *boot;
+ int n;
+ u32 base;
+
+ if (omap4_revision() >= OMAP4460_ES1_0)
+ base = PUBLIC_API_BASE_4460;
+ else
+ base = PUBLIC_API_BASE_4430;
+
+ rom_get_per_driver = API(base + PUBLIC_GET_DRIVER_PER_OFFSET);
+ rom_get_per_device = API(base + PUBLIC_GET_DEVICE_PER_OFFSET);
+
+ n = rom_get_per_device(&boot);
+ if (n)
+ return n;
+
+ if ((boot->device_type != DEVICE_USB) &&
+ (boot->device_type != DEVICE_USBEXT))
+ return -1;
+
+ memset(&omap4_usbboot_pdata, 0, sizeof(omap4_usbboot_pdata));
+ n = rom_get_per_driver(&omap4_usbboot_pdata.io, boot->device_type);
+ if (n)
+ return n;
+
+ omap4_usbboot_pdata.dread.status = -1;
+ omap4_usbboot_pdata.dread.xfer_mode = boot->xfer_mode;
+ omap4_usbboot_pdata.dread.options = boot->options;
+ omap4_usbboot_pdata.dread.device_type = boot->device_type;
+
+ omap4_usbboot_pdata.dwrite.status = -1;
+ omap4_usbboot_pdata.dwrite.xfer_mode = boot->xfer_mode;
+ omap4_usbboot_pdata.dwrite.options = boot->options;
+ omap4_usbboot_pdata.dwrite.device_type = boot->device_type;
+ __asm__ __volatile__ ("cpsie i\n");
+ return 0;
+}
+
+
+static void rom_read_callback(struct per_handle *rh)
+{
+ omap4_usbboot_pdata.dread.status = rh->status;
+ return;
+}
+
+void omap4_usbboot_queue_read(void *data, unsigned len)
+{
+ int n;
+ omap4_usbboot_pdata.dread.data = data;
+ omap4_usbboot_pdata.dread.length = len;
+ omap4_usbboot_pdata.dread.status = STATUS_WAITING;
+ omap4_usbboot_pdata.dread.xfer_mode = 1;
+ omap4_usbboot_pdata.dread.callback = rom_read_callback;
+ n = omap4_usbboot_pdata.io->read(&omap4_usbboot_pdata.dread);
+ if (n)
+ omap4_usbboot_pdata.dread.status = n;
+}
+
+int omap4_usbboot_wait_read(void)
+{
+ int ret;
+ while (omap4_usbboot_pdata.dread.status == STATUS_WAITING)
+ /* cpu_relax(); */
+ barrier();
+ ret = omap4_usbboot_pdata.dread.status;
+ omap4_usbboot_pdata.dread.status = -1;
+ return ret;
+}
+int omap4_usbboot_is_read_waiting(void)
+{
+ barrier();
+ return omap4_usbboot_pdata.dread.status == STATUS_WAITING;
+}
+int omap4_usbboot_is_read_ok(void)
+{
+ barrier();
+ return omap4_usbboot_pdata.dread.status == STATUS_OKAY;
+}
+
+static void rom_write_callback(struct per_handle *rh)
+{
+ omap4_usbboot_pdata.dwrite.status = rh->status;
+ return;
+}
+
+void omap4_usbboot_queue_write(void *data, unsigned len)
+{
+ int n;
+ omap4_usbboot_pdata.dwrite.data = data;
+ omap4_usbboot_pdata.dwrite.length = len;
+ omap4_usbboot_pdata.dwrite.status = STATUS_WAITING;
+ omap4_usbboot_pdata.dwrite.xfer_mode = 1;
+ omap4_usbboot_pdata.dwrite.callback = rom_write_callback;
+ n = omap4_usbboot_pdata.io->write(&omap4_usbboot_pdata.dwrite);
+ if (n)
+ omap4_usbboot_pdata.dwrite.status = n;
+}
+
+int omap4_usbboot_wait_write(void)
+{
+ int ret;
+ while (omap4_usbboot_pdata.dwrite.status == STATUS_WAITING)
+ /* cpu_relax(); */
+ barrier();
+ ret = omap4_usbboot_pdata.dwrite.status;
+ omap4_usbboot_pdata.dwrite.status = -1;
+ return ret;
+}
+
+#define USB_MAX_IO 65536
+int omap4_usbboot_read(void *data, unsigned len)
+{
+ unsigned xfer;
+ unsigned char *x = data;
+ int n;
+ while (len > 0) {
+ xfer = (len > USB_MAX_IO) ? USB_MAX_IO : len;
+ omap4_usbboot_queue_read(x, xfer);
+ n = omap4_usbboot_wait_read();
+ if (n)
+ return n;
+ x += xfer;
+ len -= xfer;
+ }
+ return 0;
+}
+
+int omap4_usbboot_write(void *data, unsigned len)
+{
+ omap4_usbboot_queue_write(data, len);
+ return omap4_usbboot_wait_write();
+}
+
+void omap4_usbboot_close(void)
+{
+ omap4_usbboot_pdata.io->close(&omap4_usbboot_pdata.dread);
+}
+
+void omap4_usbboot_puts(const char *s)
+{
+ u32 c;
+ while ((c = *s++))
+ omap4_usbboot_write(&c, 4);
+}
+
+static int omap4_usbboot_init(void)
+{
+ if (omap4_bootsrc() == OMAP_BOOTSRC_USB1) {
+ omap4_usbboot_open();
+ omap4_usbboot_puts("USB communications initialized\n");
+ }
+ return 0;
+}
+core_initcall(omap4_usbboot_init);
diff --git a/scripts/.gitignore b/scripts/.gitignore
index 3f1cbdb..1ca6603 100644
--- a/scripts/.gitignore
+++ b/scripts/.gitignore
@@ -6,3 +6,4 @@ mk-am35xx-spi-image
mkimage
mkublheader
omap_signGP
+omap4_usbboot
diff --git a/scripts/Makefile b/scripts/Makefile
index 55ccdac..08b325c 100644
--- a/scripts/Makefile
+++ b/scripts/Makefile
@@ -13,6 +13,10 @@ hostprogs-$(CONFIG_ARCH_OMAP) += omap_signGP mk-am35xx-spi-image
hostprogs-$(CONFIG_ARCH_S5PCxx) += s5p_cksum
hostprogs-$(CONFIG_ARCH_DAVINCI) += mkublheader
+HOSTLOADLIBES_omap4_usbboot = -lpthread
+omap4_usbboot-objs := usb_linux.o omap4_usbboot.o
+hostprogs-$(CONFIG_OMAP4_USBBOOT)+= omap4_usbboot
+
always := $(hostprogs-y) $(hostprogs-m)
subdir-y += mod
diff --git a/scripts/omap4_usbboot.c b/scripts/omap4_usbboot.c
new file mode 100644
index 0000000..a276c29
--- /dev/null
+++ b/scripts/omap4_usbboot.c
@@ -0,0 +1,415 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <sys/stat.h>
+#include <stdint.h>
+#include <fcntl.h>
+#include <string.h>
+#include <sys/mman.h>
+#include <pthread.h>
+#include <termios.h>
+
+#include "usb.h"
+
+#define USBBOOT_FS_MAGIC 0x5562464D
+#define USBBOOT_FS_CMD_OPEN 0x46530000
+#define USBBOOT_FS_CMD_CLOSE 0x46530001
+#define USBBOOT_FS_CMD_READ 0x46530002
+#define USBBOOT_FS_CMD_END 0x4653FFFF
+#define MAX_OPEN_FILES 128
+
+#define RESET 0
+#define BRIGHT 1
+#define WHITE 8
+#define RED 1
+#define BLACK 0
+#define FORMAT "%c[%d;%d;%dm"
+#define TARGET_FORMAT 0x1B, BRIGHT, RED+30, BLACK+40
+#define HOST_FORMAT 0x1B, RESET, WHITE+30, BLACK+40
+#define host_print(fmt, arg...) printf(FORMAT fmt FORMAT, \
+ HOST_FORMAT, ##arg, TARGET_FORMAT)
+
+struct thread_vars {
+ struct usb_handle *usb;
+ int hide;
+ struct termios to;
+};
+
+void *listenerTask(void *argument)
+{
+ struct thread_vars *vars = argument;
+ int c;
+ for (;;) {
+ c = getchar();
+ if (c == EOF)
+ return NULL;
+ while (vars->hide)
+ usleep(10000);
+ if (usb_write(vars->usb, &c, 4) != 4) {
+ host_print("could not send '%c' to target\n", c);
+ tcsetattr(STDIN_FILENO, TCSANOW, &vars->to);
+ exit(1);
+ }
+ }
+ return NULL;
+}
+
+int read_asic_id(struct usb_handle *usb)
+{
+#define LINEWIDTH 16
+ const uint32_t msg_getid = 0xF0030003;
+ int i, j, k, ret;
+ uint8_t id[81];
+ char line[LINEWIDTH*3+8];
+
+ printf("reading ASIC ID\n");
+ memset(id , 0xee, sizeof(id));
+ if (usb_write(usb, &msg_getid, sizeof(msg_getid)) !=
+ sizeof(msg_getid)
+ ) {
+ printf("Could not send msg_getid request\n");
+ return -1;
+ }
+ if (usb_read(usb, id, sizeof(id)) != sizeof(id)) {
+ printf("Could not read msg_getid answer\n");
+ return -1;
+ }
+ for (i = 0; i < sizeof(id); i += LINEWIDTH) {
+ sprintf(line, "%02X: ", i);
+ for (j = 0; j < LINEWIDTH && j < sizeof(id)-i; j++)
+ sprintf(line+4+j*3, "%02X ", id[i+j]);
+ line[4+j*3+0] = '\n';
+ line[4+j*3+1] = 0;
+ printf(line);
+ }
+ ret = 0;
+ for (i = 1, j = 0; i < sizeof(id) && j < id[0]; i += 2+id[i+1], j++) {
+ if (i+2+id[i+1] > sizeof(id)) {
+ printf("Truncated subblock\n");
+ ret++;
+ continue;
+ }
+ switch (id[i]) {
+ case 0x01: /* ID subblock */
+ if (id[i+1] != 0x05) {
+ printf("Unexpected ID subblock size\n");
+ ret++;
+ continue;
+ }
+ if (id[i+2] != 0x01)
+ printf("Unexpected fixed value\n");
+ k = (id[i+3]<<8) | id[i+4];
+ switch (k) {
+ case 0x4440:
+ printf("OMAP 4460 Device\n");
+ break;
+ default:
+ printf("Unknown Device\n");
+ break;
+ }
+ switch (id[i+5]) {
+ case 0x07:
+ printf("CH enabled (read from eFuse)\n");
+ break;
+ case 0x17:
+ printf("CH disabled (read from eFuse)\n");
+ break;
+ default:
+ printf("Unknown CH setting\n");
+ break;
+ }
+ printf("Rom version: %hhu\n", id[i+6]);
+ break;
+ case 0x15: /* Checksum subblock */
+ if (id[i+1] != 0x09) {
+ printf("Unexpected Checksum subblock size\n");
+ ret++;
+ continue;
+ }
+ if (id[i+2] != 0x01)
+ printf("Unexpected fixed value\n");
+ k = (id[i+3]<<24) | (id[i+4]<<16) |
+ (id[i+5]<<8) | id[i+6];
+ printf("Rom CRC: 0x%08X\n", k);
+ k = (id[i+7]<<24) | (id[i+8]<<16) |
+ (id[i+9]<<8) | id[i+10];
+ switch (k) {
+ case 0:
+ printf("A GP device\n");
+ break;
+ default:
+ printf("Unknown device\n");
+ break;
+ }
+ break;
+ }
+ }
+ if (i != sizeof(id) || j != id[0]) {
+ printf("Unexpected ASIC ID structure size.\n");
+ ret++;
+ }
+ return ret;
+}
+
+struct file_data {
+ size_t size;
+ void *data;
+};
+
+int process_file(
+ struct usb_handle *usb, const char *rootfs, struct file_data *fd_vector)
+{
+ uint32_t i, j, pos, size;
+ struct stat s;
+ int fd, ret;
+ char fname[256];
+
+ if (usb_read(usb, &i, 4) != 4) {
+ host_print("USB error\n");
+ exit(1);
+ }
+ ret = 0;
+ switch (i) {
+ case USBBOOT_FS_CMD_OPEN:
+ for (j = 0; rootfs[j]; j++)
+ fname[j] = rootfs[j];
+ for (;; j++) {
+ if (usb_read(usb, &i, 4) != 4) {
+ host_print("USB error\n");
+ exit(1);
+ }
+ if (i == USBBOOT_FS_CMD_END) {
+ fname[j] = 0;
+ break;
+ } else if (i > 0xFF) {
+ host_print("Error in filename\n");
+ ret++;
+ fname[j] = 0;
+ break;
+ } else
+ fname[j] = i;
+ }
+ for (i = 0; i < MAX_OPEN_FILES && fd_vector[i].data; i++)
+ ;
+ if (i >= MAX_OPEN_FILES) {
+ host_print("MAX_OPEN_FILES exceeded\n");
+ ret++;
+ goto open_error_1;
+ }
+ fd = open(fname, O_RDONLY);
+ if (fd < 0) {
+ host_print("cannot open '%s'\n", fname);
+ ret++;
+ goto open_error_1;
+ }
+ if (fstat(fd, &s)) {
+ host_print("cannot stat '%s'\n", fname);
+ ret++;
+ goto open_error_2;
+ }
+ fd_vector[i].data = mmap(NULL, s.st_size, PROT_READ,
+ MAP_PRIVATE, fd, 0);
+ if (fd_vector[i].data == MAP_FAILED) {
+ host_print("cannot mmap '%s'\n", fname);
+ ret++;
+ goto open_error_2;
+ }
+ close(fd);
+ fd_vector[i].size = size = s.st_size;
+ fd = i;
+ goto open_ok;
+
+open_error_2:
+ close(fd);
+open_error_1:
+ fd_vector[i].size = size = 0;
+ fd_vector[i].data = NULL;
+ fd = -1;
+open_ok:
+ if (usb_write(usb, &fd, 4) != 4 ||
+ usb_write(usb, &size, 4) != 4
+ ) {
+ host_print("could not send file size to target\n");
+ exit(1);
+ }
+ break;
+ case USBBOOT_FS_CMD_CLOSE:
+ if (usb_read(usb, &i, 4) != 4) {
+ host_print("USB error\n");
+ exit(1);
+ }
+ if (i >= MAX_OPEN_FILES || !fd_vector[i].data) {
+ host_print("invalid close index\n");
+ ret++;
+ break;
+ }
+ if (usb_read(usb, &j, 4) != 4) {
+ host_print("USB error\n");
+ exit(1);
+ }
+ if (j != USBBOOT_FS_CMD_END) {
+ host_print("invalid close\n");
+ ret++;
+ break;
+ }
+ munmap(fd_vector[i].data, fd_vector[i].size);
+ fd_vector[i].data = NULL;
+ break;
+ case USBBOOT_FS_CMD_READ:
+ if (usb_read(usb, &i, 4) != 4) {
+ host_print("USB error\n");
+ exit(1);
+ }
+ if (i >= MAX_OPEN_FILES || !fd_vector[i].data) {
+ host_print("invalid read index\n");
+ ret++;
+ break;
+ }
+ if (usb_read(usb, &pos, 4) != 4) {
+ host_print("USB error\n");
+ exit(1);
+ }
+ if (pos >= fd_vector[i].size) {
+ host_print("invalid read pos\n");
+ ret++;
+ break;
+ }
+ if (usb_read(usb, &size, 4) != 4) {
+ host_print("USB error\n");
+ exit(1);
+ }
+ if (pos+size > fd_vector[i].size) {
+ host_print("invalid read size\n");
+ ret++;
+ break;
+ }
+ if (usb_read(usb, &j, 4) != 4) {
+ host_print("USB error\n");
+ exit(1);
+ }
+ if (j != USBBOOT_FS_CMD_END) {
+ host_print("invalid read\n");
+ ret++;
+ break;
+ }
+ if (usb_write(usb, fd_vector[i].data+pos, size) != size) {
+ host_print("could not send file to target\n");
+ exit(1);
+ }
+ break;
+ case USBBOOT_FS_CMD_END:
+ default:
+ host_print("Unknown filesystem command\n");
+ ret++;
+ break;
+ }
+ return ret;
+}
+
+int usb_boot(
+ struct usb_handle *usb, void *data, unsigned sz, const char *rootfs)
+{
+ const uint32_t msg_boot = 0xF0030002;
+ uint32_t msg_size = sz;
+ int i;
+ pthread_t thread;
+ struct thread_vars vars;
+ struct termios tn;
+ struct file_data fd_vector[MAX_OPEN_FILES];
+
+ read_asic_id(usb);
+
+ printf("sending xload to target...\n");
+ usb_write(usb, &msg_boot, sizeof(msg_boot));
+ usb_write(usb, &msg_size, sizeof(msg_size));
+ usb_write(usb, data, sz);
+ munmap(data, msg_size);
+ for (i = 0; i < MAX_OPEN_FILES; i++)
+ fd_vector[i].data = NULL;
+
+ vars.usb = usb;
+ vars.hide = 0;
+ tcgetattr(STDIN_FILENO, &vars.to);
+ tn = vars.to;
+ tn.c_lflag &= ~(ICANON | ECHO);
+ printf(FORMAT, TARGET_FORMAT);
+ tcsetattr(STDIN_FILENO, TCSANOW, &tn);
+ if (pthread_create(&thread, NULL, listenerTask, &vars))
+ host_print("listenerTask failed\n");
+ for (;;) {
+ if (usb_read(usb, &i, 4) != 4)
+ break;
+ if (i == USBBOOT_FS_MAGIC) {
+ vars.hide = 1;
+ process_file(usb, rootfs, fd_vector);
+ vars.hide = 0;
+ continue;
+ }
+ printf("%c", i);
+ fflush(stdout);
+ }
+ tcsetattr(STDIN_FILENO, TCSANOW, &vars.to);
+ return 0;
+}
+
+int match_omap4_bootloader(struct usb_ifc_info *ifc)
+{
+ if (ifc->dev_vendor != 0x0451)
+ return -1;
+ if ((ifc->dev_product != 0xD010) && (ifc->dev_product != 0xD00F))
+ return -1;
+ return 0;
+}
+
+int main(int argc, char **argv)
+{
+ void *data;
+ unsigned sz;
+ struct stat s;
+ int fd;
+ struct usb_handle *usb;
+ int once;
+
+ if (argc != 3) {
+ printf("usage: %s <xloader> <rootfs>\n", argv[0]);
+ return 0;
+ }
+ argv++;
+ fd = open(argv[0], O_RDONLY);
+ if (fd < 0 || fstat(fd, &s)) {
+ printf("cannot open '%s'\n", argv[0]);
+ return -1;
+ }
+ data = mmap(NULL, s.st_size, PROT_READ, MAP_PRIVATE, fd, 0);
+ if (data == MAP_FAILED) {
+ printf("cannot mmap '%s'\n", argv[0]);
+ return -1;
+ }
+ sz = s.st_size;
+ close(fd);
+ argv++;
+ printf(FORMAT, HOST_FORMAT);
+ for (once = 1;;) {
+ usb = usb_open(match_omap4_bootloader);
+ if (usb)
+ return usb_boot(usb, data, sz, argv[0]);
+ if (once) {
+ once = 0;
+ printf("waiting for OMAP44xx device...\n");
+ }
+ usleep(250000);
+ }
+ return -1;
+}
diff --git a/scripts/usb.h b/scripts/usb.h
new file mode 100644
index 0000000..d50aa6a
--- /dev/null
+++ b/scripts/usb.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _USB_H_
+#define _USB_H_
+
+struct usb_ifc_info {
+ /* from device descriptor */
+ unsigned short dev_vendor;
+ unsigned short dev_product;
+
+ unsigned char dev_class;
+ unsigned char dev_subclass;
+ unsigned char dev_protocol;
+
+ unsigned char ifc_class;
+ unsigned char ifc_subclass;
+ unsigned char ifc_protocol;
+
+ unsigned char has_bulk_in;
+ unsigned char has_bulk_out;
+
+ unsigned char writable;
+
+ char serial_number[256];
+};
+
+typedef int (*ifc_match_func)(struct usb_ifc_info *ifc);
+
+struct usb_handle *usb_open(ifc_match_func callback);
+int usb_close(struct usb_handle *h);
+int usb_read(struct usb_handle *h, void *_data, int len);
+int usb_write(struct usb_handle *h, const void *_data, int len);
+
+
+#endif
diff --git a/scripts/usb_linux.c b/scripts/usb_linux.c
new file mode 100644
index 0000000..43529aa
--- /dev/null
+++ b/scripts/usb_linux.c
@@ -0,0 +1,397 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <string.h>
+
+#include <sys/ioctl.h>
+#include <sys/types.h>
+#include <dirent.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <pthread.h>
+#include <ctype.h>
+
+#include <linux/usbdevice_fs.h>
+#include <linux/usbdevice_fs.h>
+#include <linux/version.h>
+#include <linux/usb/ch9.h>
+#include <asm/byteorder.h>
+
+#include "usb.h"
+
+#define MAX_RETRIES 5
+
+#ifdef TRACE_USB
+#define DBG1(x...) fprintf(stderr, x)
+#define DBG(x...) fprintf(stderr, x)
+#else
+#define DBG(x...)
+#define DBG1(x...)
+#endif
+
+struct usb_handle {
+ char fname[64];
+ int desc;
+ unsigned char ep_in;
+ unsigned char ep_out;
+};
+
+static inline int badname(const char *name)
+{
+ while (*name) {
+ if (!isdigit(*name++))
+ return 1;
+ }
+ return 0;
+}
+
+static int check(void *_desc, int len, unsigned type, int size)
+{
+ unsigned char *desc = _desc;
+
+ if (len < size)
+ return -1;
+ if (desc[0] < size)
+ return -1;
+ if (desc[0] > len)
+ return -1;
+ if (desc[1] != type)
+ return -1;
+
+ return 0;
+}
+
+static int filter_usb_device(int fd, char *ptr, int len, int writable,
+ ifc_match_func callback, int *ept_in_id, int *ept_out_id, int *ifc_id)
+{
+ struct usb_device_descriptor *dev;
+ struct usb_config_descriptor *cfg;
+ struct usb_interface_descriptor *ifc;
+ struct usb_endpoint_descriptor *ept;
+ struct usb_ifc_info info;
+
+ int in, out;
+ unsigned i;
+ unsigned e;
+
+ if (check(ptr, len, USB_DT_DEVICE, USB_DT_DEVICE_SIZE))
+ return -1;
+ dev = (void *) ptr;
+ len -= dev->bLength;
+ ptr += dev->bLength;
+
+ if (check(ptr, len, USB_DT_CONFIG, USB_DT_CONFIG_SIZE))
+ return -1;
+ cfg = (void *) ptr;
+ len -= cfg->bLength;
+ ptr += cfg->bLength;
+
+ info.dev_vendor = dev->idVendor;
+ info.dev_product = dev->idProduct;
+ info.dev_class = dev->bDeviceClass;
+ info.dev_subclass = dev->bDeviceSubClass;
+ info.dev_protocol = dev->bDeviceProtocol;
+ info.writable = writable;
+
+ /* read device serial number (if there is one) */
+ info.serial_number[0] = 0;
+ if (dev->iSerialNumber) {
+ struct usbdevfs_ctrltransfer ctrl;
+ __u16 buffer[128];
+ int result;
+
+ memset(buffer, 0, sizeof(buffer));
+
+ ctrl.bRequestType = USB_DIR_IN|
+ USB_TYPE_STANDARD|USB_RECIP_DEVICE;
+ ctrl.bRequest = USB_REQ_GET_DESCRIPTOR;
+ ctrl.wValue = (USB_DT_STRING << 8) | dev->iSerialNumber;
+ ctrl.wIndex = 0;
+ ctrl.wLength = sizeof(buffer);
+ ctrl.data = buffer;
+ ctrl.timeout = 50;
+
+ result = ioctl(fd, USBDEVFS_CONTROL, &ctrl);
+ if (result > 0) {
+ int i;
+ /* skip first word, and copy the rest to the serial
+ string, changing shorts to bytes. */
+ result /= 2;
+ for (i = 1; i < result; i++)
+ info.serial_number[i - 1] = buffer[i];
+ info.serial_number[i - 1] = 0;
+ }
+ }
+
+ for (i = 0; i < cfg->bNumInterfaces; i++) {
+ if (check(ptr, len, USB_DT_INTERFACE, USB_DT_INTERFACE_SIZE))
+ return -1;
+ ifc = (void *) ptr;
+ len -= ifc->bLength;
+ ptr += ifc->bLength;
+
+ in = -1;
+ out = -1;
+ info.ifc_class = ifc->bInterfaceClass;
+ info.ifc_subclass = ifc->bInterfaceSubClass;
+ info.ifc_protocol = ifc->bInterfaceProtocol;
+
+ for (e = 0; e < ifc->bNumEndpoints; e++) {
+ if (check(ptr, len, USB_DT_ENDPOINT,
+ USB_DT_ENDPOINT_SIZE)
+ )
+ return -1;
+ ept = (void *) ptr;
+ len -= ept->bLength;
+ ptr += ept->bLength;
+
+ if ((ept->bmAttributes & 0x03) != 0x02)
+ continue;
+
+ if (ept->bEndpointAddress & 0x80)
+ in = ept->bEndpointAddress;
+ else
+ out = ept->bEndpointAddress;
+ }
+
+ info.has_bulk_in = (in != -1);
+ info.has_bulk_out = (out != -1);
+
+ if (callback(&info) == 0) {
+ *ept_in_id = in;
+ *ept_out_id = out;
+ *ifc_id = ifc->bInterfaceNumber;
+ return 0;
+ }
+ }
+
+ return -1;
+}
+
+static struct usb_handle *find_usb_device(
+ const char *base, ifc_match_func callback)
+{
+ struct usb_handle *usb = 0;
+ char busname[64], devname[64];
+ char desc[1024];
+ int n, in, out, ifc;
+
+ DIR *busdir, *devdir;
+ struct dirent *de;
+ int fd;
+ int writable;
+
+ busdir = opendir(base);
+ if (busdir == 0)
+ return 0;
+
+ while ((de = readdir(busdir)) && (usb == 0)) {
+ if (badname(de->d_name))
+ continue;
+
+ sprintf(busname, "%s/%s", base, de->d_name);
+ devdir = opendir(busname);
+ if (devdir == 0)
+ continue;
+
+ /* DBG("[ scanning %s ]\n", busname); */
+ while ((de = readdir(devdir)) && (usb == 0)) {
+
+ if (badname(de->d_name))
+ continue;
+ sprintf(devname, "%s/%s", busname, de->d_name);
+
+ /* DBG("[ scanning %s ]\n", devname); */
+ writable = 1;
+ fd = open(devname, O_RDWR);
+ if (fd < 0) {
+ /* Check if we have read-only access,
+ so we can give a helpful diagnostic
+ like "adb devices" does. */
+ writable = 0;
+ fd = open(devname, O_RDONLY);
+ if (fd < 0)
+ continue;
+ }
+
+ n = read(fd, desc, sizeof(desc));
+
+ if (filter_usb_device(fd, desc, n, writable,
+ callback, &in, &out, &ifc) == 0
+ ) {
+ usb = calloc(1, sizeof(struct usb_handle));
+ strcpy(usb->fname, devname);
+ usb->ep_in = in;
+ usb->ep_out = out;
+ usb->desc = fd;
+
+ n = ioctl(fd, USBDEVFS_CLAIMINTERFACE, &ifc);
+ if (n != 0) {
+ close(fd);
+ free(usb);
+ usb = 0;
+ continue;
+ }
+ } else
+ close(fd);
+ }
+ closedir(devdir);
+ }
+ closedir(busdir);
+
+ return usb;
+}
+
+int usb_write(struct usb_handle *h, const void *_data, int len)
+{
+ unsigned char *data = (unsigned char *) _data;
+ unsigned count = 0;
+ struct usbdevfs_bulktransfer bulk;
+ int n;
+
+ if (h->ep_out == 0)
+ return -1;
+
+ if (len == 0) {
+ bulk.ep = h->ep_out;
+ bulk.len = 0;
+ bulk.data = data;
+ bulk.timeout = 0;
+
+ n = ioctl(h->desc, USBDEVFS_BULK, &bulk);
+ if (n != 0) {
+ fprintf(stderr, "ERROR: n = %d, errno = %d (%s)\n",
+ n, errno, strerror(errno));
+ return -1;
+ }
+ return 0;
+ }
+
+ while (len > 0) {
+ int xfer;
+ xfer = (len > 4096) ? 4096 : len;
+
+ bulk.ep = h->ep_out;
+ bulk.len = xfer;
+ bulk.data = data;
+ bulk.timeout = 0;
+
+ n = ioctl(h->desc, USBDEVFS_BULK, &bulk);
+ if (n != xfer) {
+ DBG("ERROR: n = %d, errno = %d (%s)\n",
+ n, errno, strerror(errno));
+ return -1;
+ }
+
+ count += xfer;
+ len -= xfer;
+ data += xfer;
+ }
+
+ return count;
+}
+
+int usb_read(struct usb_handle *h, void *_data, int len)
+{
+ unsigned char *data = (unsigned char *) _data;
+ unsigned count = 0;
+ struct usbdevfs_bulktransfer bulk;
+ int n, retry;
+
+ if (h->ep_in == 0)
+ return -1;
+
+ while (len > 0) {
+ int xfer = (len > 4096) ? 4096 : len;
+
+ bulk.ep = h->ep_in;
+ bulk.len = xfer;
+ bulk.data = data;
+ bulk.timeout = 0;
+ retry = 0;
+
+ do {
+ DBG("[ usb read %d fd = %d], fname=%s\n",
+ xfer, h->desc, h->fname);
+ n = ioctl(h->desc, USBDEVFS_BULK, &bulk);
+ DBG("[ usb read %d ] = %d, fname=%s, Retry %d\n",
+ xfer, n, h->fname, retry);
+
+ if (n < 0) {
+ DBG1("ERROR: n = %d, errno = %d (%s)\n",
+ n, errno, strerror(errno));
+ if (++retry > MAX_RETRIES)
+ return -1;
+ sleep(1);
+ }
+ } while (n < 0);
+
+ count += n;
+ len -= n;
+ data += n;
+
+ if (n < xfer)
+ break;
+ }
+
+ return count;
+}
+
+void usb_kick(struct usb_handle *h)
+{
+ int fd;
+
+ fd = h->desc;
+ h->desc = -1;
+ if (fd >= 0) {
+ close(fd);
+ DBG("[ usb closed %d ]\n", fd);
+ }
+}
+
+int usb_close(struct usb_handle *h)
+{
+ int fd;
+
+ fd = h->desc;
+ h->desc = -1;
+ if (fd >= 0) {
+ close(fd);
+ DBG("[ usb closed %d ]\n", fd);
+ }
+
+ return 0;
+}
+
+struct usb_handle *usb_open(ifc_match_func callback)
+{
+ return find_usb_device("/dev/bus/usb", callback);
+}
--
1.7.12.2
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 11/14] omap4: add serial communications over usb boot
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
` (9 preceding siblings ...)
2012-10-08 22:55 ` [PATCH 10/14] omap4: add support for booting cpu from usb Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-08 22:55 ` [PATCH 12/14] omap4: add filesystem support " Vicente
` (3 subsequent siblings)
14 siblings, 0 replies; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
Signed-off-by: Vicente <vicencb@gmail.com>
---
drivers/serial/Kconfig | 7 +++
drivers/serial/Makefile | 1 +
drivers/serial/serial_omap4_usbboot.c | 83 +++++++++++++++++++++++++++++++++++
3 files changed, 91 insertions(+)
create mode 100644 drivers/serial/serial_omap4_usbboot.c
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 7eb96ed..0627b6e 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -100,4 +100,11 @@ config DRIVER_SERIAL_PXA
bool "PXA serial driver"
depends on ARCH_PXA
+config DRIVER_SERIAL_OMAP4_USBBOOT
+ bool "serial driver over omap4 usb"
+ default n
+ depends on OMAP4_USBBOOT
+ help
+ Enable this to get console support over the usb bus used to boot an OMAP4
+
endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index e2d56b9..ff99e72 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -19,3 +19,4 @@ obj-$(CONFIG_DRIVER_SERIAL_S3C) += serial_s3c.o
obj-$(CONFIG_DRIVER_SERIAL_ALTERA) += serial_altera.o
obj-$(CONFIG_DRIVER_SERIAL_ALTERA_JTAG) += serial_altera_jtag.o
obj-$(CONFIG_DRIVER_SERIAL_PXA) += serial_pxa.o
+obj-$(CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT) += serial_omap4_usbboot.o
diff --git a/drivers/serial/serial_omap4_usbboot.c b/drivers/serial/serial_omap4_usbboot.c
new file mode 100644
index 0000000..f0a2fd1
--- /dev/null
+++ b/drivers/serial/serial_omap4_usbboot.c
@@ -0,0 +1,83 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <malloc.h>
+#include <errno.h>
+#include <mach/omap4_rom_usb.h>
+
+struct serial_omap4_usbboot_priv {
+ struct console_device cdev;
+ u32 val;
+};
+
+static void serial_omap4_usbboot_putc(struct console_device *cdev, char c)
+{
+ unsigned b = c;
+ omap4_usbboot_write(&b, 4);
+}
+
+static int serial_omap4_usbboot_tstc(struct console_device *cdev)
+{
+ struct serial_omap4_usbboot_priv *priv =
+ container_of(cdev, struct serial_omap4_usbboot_priv, cdev);
+ if (omap4_usbboot_is_read_waiting())
+ return 0;
+ else if (omap4_usbboot_is_read_ok())
+ return 1;
+ omap4_usbboot_queue_read(&priv->val, 4);
+ udelay(100);
+ if (omap4_usbboot_is_read_waiting())
+ return 0;
+ else if (omap4_usbboot_is_read_ok())
+ return 1;
+ return 0;
+}
+
+static int serial_omap4_usbboot_getc(struct console_device *cdev)
+{
+ struct serial_omap4_usbboot_priv *priv =
+ container_of(cdev, struct serial_omap4_usbboot_priv, cdev);
+ if (omap4_usbboot_is_read_waiting() || omap4_usbboot_is_read_ok()) {
+ omap4_usbboot_wait_read();
+ return priv->val;
+ }
+ omap4_usbboot_read(&priv->val, 4);
+ return priv->val;
+}
+
+static int serial_omap4_usbboot_probe(struct device_d *dev)
+{
+ struct serial_omap4_usbboot_priv *priv;
+ priv = xzalloc(sizeof(*priv));
+
+ priv->cdev.dev = dev;
+ priv->cdev.f_caps = CONSOLE_STDIN | CONSOLE_STDOUT | CONSOLE_STDERR;
+ priv->cdev.tstc = serial_omap4_usbboot_tstc;
+ priv->cdev.putc = serial_omap4_usbboot_putc;
+ priv->cdev.getc = serial_omap4_usbboot_getc;
+ priv->cdev.setbrg = NULL;
+
+ return console_register(&priv->cdev);
+}
+
+static struct driver_d serial_omap4_usbboot_driver = {
+ .name = "serial_omap4_usbboot",
+ .probe = serial_omap4_usbboot_probe,
+};
+
+static int serial_omap4_usbboot_init(void)
+{
+ return platform_driver_register(&serial_omap4_usbboot_driver);
+}
+console_initcall(serial_omap4_usbboot_init);
--
1.7.12.2
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 12/14] omap4: add filesystem support over usb boot
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
` (10 preceding siblings ...)
2012-10-08 22:55 ` [PATCH 11/14] omap4: add serial communications over usb boot Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-08 22:55 ` [PATCH 13/14] omap4: add support for loading second stage from usb Vicente
` (2 subsequent siblings)
14 siblings, 0 replies; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
Signed-off-by: Vicente <vicencb@gmail.com>
---
fs/Kconfig | 5 ++
fs/Makefile | 1 +
fs/omap4_usbbootfs.c | 219 +++++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 225 insertions(+)
create mode 100644 fs/omap4_usbbootfs.c
diff --git a/fs/Kconfig b/fs/Kconfig
index 4c66543..0ab69d7 100644
--- a/fs/Kconfig
+++ b/fs/Kconfig
@@ -29,6 +29,11 @@ config FS_TFTP
prompt "tftp support"
depends on NET
+config FS_OMAP4_USBBOOT
+ bool
+ prompt "Filesystem over usb boot"
+ depends on OMAP4_USBBOOT
+
config FS_NFS
depends on NET
bool
diff --git a/fs/Makefile b/fs/Makefile
index 1b52bee..ad745d9 100644
--- a/fs/Makefile
+++ b/fs/Makefile
@@ -5,4 +5,5 @@ obj-$(CONFIG_FS_DEVFS) += devfs.o
obj-$(CONFIG_FS_FAT) += fat/
obj-y += fs.o
obj-$(CONFIG_FS_TFTP) += tftp.o
+obj-$(CONFIG_FS_OMAP4_USBBOOT) += omap4_usbbootfs.o
obj-$(CONFIG_FS_NFS) += nfs.o
diff --git a/fs/omap4_usbbootfs.c b/fs/omap4_usbbootfs.c
new file mode 100644
index 0000000..0dc7682
--- /dev/null
+++ b/fs/omap4_usbbootfs.c
@@ -0,0 +1,219 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <init.h>
+#include <linux/stat.h>
+#include <linux/err.h>
+#include <mach/omap4_rom_usb.h>
+
+#define OMAP4_USBBOOT_FS_MAGIC 0x5562464D
+#define OMAP4_USBBOOT_FS_CMD_OPEN 0x46530000
+#define OMAP4_USBBOOT_FS_CMD_CLOSE 0x46530001
+#define OMAP4_USBBOOT_FS_CMD_READ 0x46530002
+#define OMAP4_USBBOOT_FS_CMD_END 0x4653FFFF
+
+struct file_priv {
+ s32 id;
+ u32 size;
+};
+/*
+static int omap4_usbbootfs_create(
+ struct device_d *dev, const char *pathname, mode_t mode)
+{
+ return -ENOSYS;
+}
+
+static int omap4_usbbootfs_unlink(struct device_d *dev, const char *pathname)
+{
+ return -ENOSYS;
+}
+
+static int omap4_usbbootfs_mkdir(struct device_d *dev, const char *pathname)
+{
+ return -ENOSYS;
+}
+
+static int omap4_usbbootfs_rmdir(struct device_d *dev, const char *pathname)
+{
+ return -ENOSYS;
+}
+
+static int omap4_usbbootfs_write(
+ struct device_d *_dev, FILE *f, const void *inbuf, size_t size)
+{
+ return -ENOSYS;
+}
+
+static int omap4_usbbootfs_truncate(struct device_d *dev, FILE *f, ulong size)
+{
+ return -ENOSYS;
+}
+*/
+
+static struct file_priv *omap4_usbbootfs_do_open(
+ struct device_d *dev, int accmode, const char *filename)
+{
+ struct file_priv *priv;
+ u32 data;
+
+ if (accmode & O_ACCMODE)
+ return ERR_PTR(-ENOSYS);
+
+ priv = xzalloc(sizeof(*priv));
+ if (!priv)
+ return ERR_PTR(-ENOMEM);
+
+ data = OMAP4_USBBOOT_FS_MAGIC ; omap4_usbboot_write(&data, 4);
+ data = OMAP4_USBBOOT_FS_CMD_OPEN; omap4_usbboot_write(&data, 4);
+ omap4_usbboot_puts(filename);
+ data = OMAP4_USBBOOT_FS_CMD_END ; omap4_usbboot_write(&data, 4);
+
+ if (omap4_usbboot_read(&priv->id, 4) ||
+ omap4_usbboot_read(&priv->size, 4)
+ ) {
+ free(priv);
+ return ERR_PTR(-EIO);
+ }
+ if (priv->id < 0) {
+ free(priv);
+ return ERR_PTR(-ENOENT);
+ }
+
+ return priv;
+}
+
+static int omap4_usbbootfs_open(
+ struct device_d *dev, FILE *file, const char *filename)
+{
+ struct file_priv *priv;
+
+ priv = omap4_usbbootfs_do_open(dev, file->flags, filename);
+ if (IS_ERR(priv))
+ return PTR_ERR(priv);
+
+ file->inode = priv;
+ file->size = priv->size;
+
+ return 0;
+}
+
+static int omap4_usbbootfs_do_close(struct file_priv *priv)
+{
+ u32 data;
+ data = OMAP4_USBBOOT_FS_MAGIC ; omap4_usbboot_write(&data, 4);
+ data = OMAP4_USBBOOT_FS_CMD_CLOSE; omap4_usbboot_write(&data, 4);
+ omap4_usbboot_write(&priv->id, 4);
+ data = OMAP4_USBBOOT_FS_CMD_END ; omap4_usbboot_write(&data, 4);
+ free(priv);
+ return 0;
+}
+
+static int omap4_usbbootfs_close(struct device_d *dev, FILE *f)
+{
+ struct file_priv *priv = f->inode;
+ return omap4_usbbootfs_do_close(priv);
+}
+
+static int omap4_usbbootfs_read(
+ struct device_d *dev, FILE *f, void *buf, size_t size)
+{
+ struct file_priv *priv = f->inode;
+ u32 data;
+
+ if (size > priv->size - f->pos)
+ size = priv->size - f->pos;
+ if (!size)
+ return 0;
+
+ data = OMAP4_USBBOOT_FS_MAGIC ; omap4_usbboot_write(&data, 4);
+ data = OMAP4_USBBOOT_FS_CMD_READ; omap4_usbboot_write(&data, 4);
+ omap4_usbboot_write(&priv->id, 4);
+ omap4_usbboot_write(&f->pos, 4);
+ omap4_usbboot_write(&size, 4);
+ data = OMAP4_USBBOOT_FS_CMD_END ; omap4_usbboot_write(&data, 4);
+
+ if (omap4_usbboot_read(buf, size))
+ return -EIO;
+
+ return size;
+}
+
+static loff_t omap4_usbbootfs_lseek(struct device_d *dev, FILE *f, loff_t pos)
+{
+ f->pos = pos;
+ return pos;
+}
+
+static DIR *omap4_usbbootfs_opendir(struct device_d *dev, const char *pathname)
+{
+ return NULL;
+}
+
+static int omap4_usbbootfs_stat(
+ struct device_d *dev, const char *filename, struct stat *s)
+{
+ struct file_priv *priv;
+
+ priv = omap4_usbbootfs_do_open(dev, O_RDONLY, filename);
+ if (IS_ERR(priv))
+ return PTR_ERR(priv);
+
+ s->st_mode = S_IFREG |
+ S_IRUSR | S_IRGRP | S_IROTH |
+ S_IXUSR | S_IXGRP | S_IXOTH ;
+ s->st_size = priv->size;
+
+ omap4_usbbootfs_do_close(priv);
+
+ return 0;
+}
+
+static int omap4_usbbootfs_probe(struct device_d *dev)
+{
+ return 0;
+}
+static void omap4_usbbootfs_remove(struct device_d *dev)
+{
+}
+
+static struct fs_driver_d omap4_usbbootfs_driver = {
+ .open = omap4_usbbootfs_open,
+ .close = omap4_usbbootfs_close,
+ .read = omap4_usbbootfs_read,
+ .lseek = omap4_usbbootfs_lseek,
+ .opendir = omap4_usbbootfs_opendir,
+ .stat = omap4_usbbootfs_stat,
+/*
+ .create = omap4_usbbootfs_create,
+ .unlink = omap4_usbbootfs_unlink,
+ .mkdir = omap4_usbbootfs_mkdir,
+ .rmdir = omap4_usbbootfs_rmdir,
+ .write = omap4_usbbootfs_write,
+ .truncate= omap4_usbbootfs_truncate,
+*/
+ .flags = 0,
+ .drv = {
+ .probe = omap4_usbbootfs_probe,
+ .remove = omap4_usbbootfs_remove,
+ .name = "omap4_usbbootfs",
+ }
+};
+
+static int omap4_usbbootfs_init(void)
+{
+ return register_fs_driver(&omap4_usbbootfs_driver);
+}
+coredevice_initcall(omap4_usbbootfs_init);
--
1.7.12.2
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 13/14] omap4: add support for loading second stage from usb
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
` (11 preceding siblings ...)
2012-10-08 22:55 ` [PATCH 12/14] omap4: add filesystem support " Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-08 22:55 ` [PATCH 14/14] Add support for Archos G9 tablet Vicente
2012-10-10 7:40 ` [PATCH 00/14] archosg9: add support for tablet Sascha Hauer
14 siblings, 0 replies; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
Signed-off-by: Vicente <vicencb@gmail.com>
---
arch/arm/mach-omap/xload.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c
index 9fa8221..240d3ff 100644
--- a/arch/arm/mach-omap/xload.c
+++ b/arch/arm/mach-omap/xload.c
@@ -139,6 +139,24 @@ static void *omap_xload_boot_spi(int offset)
return to;
}
+static void *omap4_xload_boot_usb(void){
+ int ret;
+ void *buf;
+ int len;
+
+ ret = mount("omap4_usbboot", "omap4_usbbootfs", "/");
+ if (ret) {
+ printf("Unable to mount omap4_usbbootfs (%d)\n", ret);
+ return NULL;
+ }
+
+ buf = read_file("/barebox.bin", &len);
+ if (!buf)
+ printf("could not read barebox.bin from omap4_usbbootfs\n");
+
+ return buf;
+}
+
enum omap_boot_src omap_bootsrc(void)
{
#if defined(CONFIG_ARCH_OMAP3)
@@ -161,6 +179,14 @@ int run_shell(void)
printf("booting from MMC1\n");
func = omap_xload_boot_mmc();
break;
+ case OMAP_BOOTSRC_USB1:
+ if (IS_ENABLED(CONFIG_FS_OMAP4_USBBOOT)) {
+ printf("booting from USB1\n");
+ func = omap4_xload_boot_usb();
+ break;
+ } else {
+ printf("booting from usb1 not enabled\n");
+ }
case OMAP_BOOTSRC_UNKNOWN:
printf("unknown boot source. Fall back to nand\n");
case OMAP_BOOTSRC_NAND:
--
1.7.12.2
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 14/14] Add support for Archos G9 tablet
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
` (12 preceding siblings ...)
2012-10-08 22:55 ` [PATCH 13/14] omap4: add support for loading second stage from usb Vicente
@ 2012-10-08 22:55 ` Vicente
2012-10-19 11:10 ` Jan Weitzel
2012-10-10 7:40 ` [PATCH 00/14] archosg9: add support for tablet Sascha Hauer
14 siblings, 1 reply; 22+ messages in thread
From: Vicente @ 2012-10-08 22:55 UTC (permalink / raw)
To: barebox; +Cc: Vicente
Signed-off-by: Vicente <vicencb@gmail.com>
---
arch/arm/Makefile | 1 +
arch/arm/boards/archosg9/Makefile | 3 +
arch/arm/boards/archosg9/board.c | 71 +++++
arch/arm/boards/archosg9/config.h | 1 +
arch/arm/boards/archosg9/env/config | 1 +
arch/arm/boards/archosg9/env/init/usbboot | 5 +
arch/arm/boards/archosg9/lowlevel.c | 79 +++++
arch/arm/boards/archosg9/mux.c | 459 ++++++++++++++++++++++++++++++
arch/arm/boards/archosg9/mux.h | 6 +
arch/arm/configs/archosg9_defconfig | 70 +++++
arch/arm/configs/archosg9_xload_defconfig | 24 ++
arch/arm/mach-omap/Kconfig | 9 +
12 files changed, 729 insertions(+)
create mode 100644 arch/arm/boards/archosg9/Makefile
create mode 100644 arch/arm/boards/archosg9/board.c
create mode 100644 arch/arm/boards/archosg9/config.h
create mode 100644 arch/arm/boards/archosg9/env/config
create mode 100644 arch/arm/boards/archosg9/env/init/usbboot
create mode 100644 arch/arm/boards/archosg9/lowlevel.c
create mode 100644 arch/arm/boards/archosg9/mux.c
create mode 100644 arch/arm/boards/archosg9/mux.h
create mode 100644 arch/arm/configs/archosg9_defconfig
create mode 100644 arch/arm/configs/archosg9_xload_defconfig
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 855043a..de570d7 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -101,6 +101,7 @@ board-$(CONFIG_MACH_OMAP343xSDP) := omap343xdsp
board-$(CONFIG_MACH_BEAGLE) := beagle
board-$(CONFIG_MACH_OMAP3EVM) := omap3evm
board-$(CONFIG_MACH_PANDA) := panda
+board-$(CONFIG_MACH_ARCHOSG9) := archosg9
board-$(CONFIG_MACH_PCM049) := pcm049
board-$(CONFIG_MACH_PCA100) := phycard-i.MX27
board-$(CONFIG_MACH_PCAAL1) := phycard-a-l1
diff --git a/arch/arm/boards/archosg9/Makefile b/arch/arm/boards/archosg9/Makefile
new file mode 100644
index 0000000..256eaf6
--- /dev/null
+++ b/arch/arm/boards/archosg9/Makefile
@@ -0,0 +1,3 @@
+obj-y += board.o
+obj-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += lowlevel.o mux.o
+pbl-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += lowlevel.o mux.o
diff --git a/arch/arm/boards/archosg9/board.c b/arch/arm/boards/archosg9/board.c
new file mode 100644
index 0000000..7076c6f
--- /dev/null
+++ b/arch/arm/boards/archosg9/board.c
@@ -0,0 +1,71 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <ns16550.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <mach/silicon.h>
+#include <sizes.h>
+#include <i2c/i2c.h>
+#include <gpio.h>
+
+static struct NS16550_plat serial_plat = {
+ .clock = 48000000, /* 48MHz (APLL96/2) */
+ .shift = 2,
+};
+static int archosg9_console_init(void){
+ if (IS_ENABLED(CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT))
+ add_generic_device("serial_omap4_usbboot", DEVICE_ID_DYNAMIC
+ , NULL, 0, 0, 0, NULL);
+ if (IS_ENABLED(CONFIG_DRIVER_SERIAL_NS16550)) {
+ gpio_direction_output(41, 0); /* gps_disable */
+ gpio_direction_output(34, 1); /* 1v8_pwron */
+ add_ns16550_device(DEVICE_ID_DYNAMIC, OMAP44XX_UART1_BASE, 1024,
+ IORESOURCE_MEM_8BIT, &serial_plat);
+ }
+ return 0;
+}
+console_initcall(archosg9_console_init);
+
+static int archosg9_mem_init(void){
+ arm_add_mem_device("ram0", 0x80000000, SZ_1G);
+ return 0;
+}
+mem_initcall(archosg9_mem_init);
+
+static struct i2c_board_info i2c_devices[] = {
+ { I2C_BOARD_INFO("twl6030", 0x48), },
+};
+
+static int archosg9_devices_init(void){
+ i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
+ add_generic_device("i2c-omap" , DEVICE_ID_DYNAMIC, NULL,
+ OMAP44XX_I2C1_BASE, 0x100, IORESOURCE_MEM, NULL);
+ add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL,
+ OMAP44XX_MMC1_BASE, SZ_4K, IORESOURCE_MEM, NULL);
+ add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL,
+ OMAP44XX_MMC2_BASE, SZ_4K, IORESOURCE_MEM, NULL);
+
+ armlinux_set_bootparams((void *)0x80000100);
+ /*
+ * This should be:
+ * armlinux_set_architecture(MACH_TYPE_OMAP4_ARCHOSG9);
+ * But Archos has not registered it's board to arch/arm/tools/mach-types
+ * So here there is the hardcoded value
+ */
+ armlinux_set_architecture(5032);
+
+ return 0;
+}
+device_initcall(archosg9_devices_init);
diff --git a/arch/arm/boards/archosg9/config.h b/arch/arm/boards/archosg9/config.h
new file mode 100644
index 0000000..da84fa5
--- /dev/null
+++ b/arch/arm/boards/archosg9/config.h
@@ -0,0 +1 @@
+/* nothing */
diff --git a/arch/arm/boards/archosg9/env/config b/arch/arm/boards/archosg9/env/config
new file mode 100644
index 0000000..38fc51c
--- /dev/null
+++ b/arch/arm/boards/archosg9/env/config
@@ -0,0 +1 @@
+global.linux.bootargs.base="earlyprintk=serial console=ttyO1,1000000n8 keep_bootcon pm_disable initcall_debug ignore_loglevel no_console_suspend=1 root=/dev/ram0 init=/linuxrc"
diff --git a/arch/arm/boards/archosg9/env/init/usbboot b/arch/arm/boards/archosg9/env/init/usbboot
new file mode 100644
index 0000000..25536e2
--- /dev/null
+++ b/arch/arm/boards/archosg9/env/init/usbboot
@@ -0,0 +1,5 @@
+mkdir /usb
+mount -t omap4_usbbootfs omap4_usbboot /usb
+. /env/config
+. /usb/boot/config
+bootm -r /usb/boot/initrd /usb/boot/zImage
diff --git a/arch/arm/boards/archosg9/lowlevel.c b/arch/arm/boards/archosg9/lowlevel.c
new file mode 100644
index 0000000..fa5be1d
--- /dev/null
+++ b/arch/arm/boards/archosg9/lowlevel.c
@@ -0,0 +1,79 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <io.h>
+#include <init.h>
+#include <mach/omap4-mux.h>
+#include <mach/omap4-silicon.h>
+#include <mach/omap4-clock.h>
+#include <mach/syslib.h>
+#include <asm/barebox-arm.h>
+#include <asm/barebox-arm-head.h>
+#include "mux.h"
+
+#define TPS62361_VSEL0_GPIO 7
+
+static const struct ddr_regs ddr_regs_400_mhz_2cs = {
+ .tim1 = 0x10EB0662,
+ .tim2 = 0x20370DD2,
+ .tim3 = 0x00B1C33F,
+ .phy_ctrl_1 = 0x849FF408,
+ .ref_ctrl = 0x00000618,
+ .config_init = 0x80000EB9,
+ .config_final = 0x80001AB9,
+ .zq_config = 0xD00B3215,
+ .mr1 = 0x83,
+ .mr2 = 0x4
+};
+
+static noinline void archosg9_init_lowlevel(void)
+{
+ struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
+ struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU600;
+ struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
+ struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
+ struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
+ struct dpll_param usb = OMAP4_USB_DPLL_PARAM_19M2;
+
+ writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
+
+ /* Configure all DPLL's at 100% OPP */
+ omap4_configure_mpu_dpll(&mpu);
+ omap4_configure_iva_dpll(&iva);
+ omap4_configure_per_dpll(&per);
+ omap4_configure_abe_dpll(&abe);
+ omap4_configure_usb_dpll(&usb);
+
+ /* Enable all clocks */
+ omap4_enable_all_clocks();
+
+ set_muxconf_regs();
+
+ omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
+
+ /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
+ omap4_scale_vcores(TPS62361_VSEL0_GPIO);
+ board_init_lowlevel_return();
+}
+
+void __naked __bare_init reset(void)
+{
+ u32 r;
+
+ common_reset();
+
+ r = 0x4030D000;
+ __asm__ __volatile__("mov sp, %0" : : "r"(r));
+
+ archosg9_init_lowlevel();
+}
diff --git a/arch/arm/boards/archosg9/mux.c b/arch/arm/boards/archosg9/mux.c
new file mode 100644
index 0000000..7ca5057
--- /dev/null
+++ b/arch/arm/boards/archosg9/mux.c
@@ -0,0 +1,459 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <mach/omap4-silicon.h>
+#include <mach/omap4-mux.h>
+#include <mach/omap4-clock.h>
+#include "mux.h"
+
+static const struct pad_conf_entry core_padconf_array[] = {
+ /* sdmmc2_dat0 */ /* internal FLASH */
+ { GPMC_AD0 , IEN | PTU | M1 },
+ /* sdmmc2_dat1 */ /* internal FLASH */
+ { GPMC_AD1 , IEN | PTU | M1 },
+ /* sdmmc2_dat2 */ /* internal FLASH */
+ { GPMC_AD2 , IEN | PTU | M1 },
+ /* sdmmc2_dat3 */ /* internal FLASH */
+ { GPMC_AD3 , IEN | PTU | M1 },
+ /* sdmmc2_dat4 */ /* internal FLASH */
+ { GPMC_AD4 , IEN | PTU | M1 },
+ /* sdmmc2_dat5 */ /* internal FLASH */
+ { GPMC_AD5 , IEN | PTU | M1 },
+ /* sdmmc2_dat6 */ /* internal FLASH */
+ { GPMC_AD6 , IEN | PTU | M1 },
+ /* sdmmc2_dat7 */ /* internal FLASH */
+ { GPMC_AD7 , IEN | PTU | M1 },
+ /* gpio_32 */
+ { GPMC_AD8 , IEN | PTD | M3 },
+ /* gpmc_ad9 */
+ { GPMC_AD9 , IEN | PTU | M0 },
+ /* gpio_34 */ /* 1v8_pwron */
+ { GPMC_AD10 , IEN | PTU | M3 },
+ /* gpio_35 */ /* vcc_pwron */
+ { GPMC_AD11 , IEN | PTU | M3 },
+ /* gpio_36 */ /* 5v_pwron */
+ { GPMC_AD12 , IEN | M3 },
+ /* gpio_37 */ /* hdmi_pwr */
+ { GPMC_AD13 , IEN | M3 },
+ /* gpio_38 */ /* lcd_pwon */
+ { GPMC_AD14 , IEN | M3 },
+ /* gpio_39 */ /* lvds_en */
+ { GPMC_AD15 , IEN | M3 },
+ /* gpio_40 */ /* 3g_enable */
+ { GPMC_A16 , IEN | M3 },
+ /* gpio_41 */ /* gps_enable */
+ { GPMC_A17 , IEN | M3 },
+ /* gpio_42 */ /* ehci_enable */
+ { GPMC_A18 , IEN | M3 },
+ /* gpio_43 */ /* volume up */
+ { GPMC_A19 , IEN | M3 },
+ /* gpio_44 */ /* volume down */
+ { GPMC_A20 , IEN | M3 },
+ /* gpio_45 */ /* accel_int1 */
+ { GPMC_A21 , IEN | PTU | M3 },
+ /* kpd_col6 */
+ { GPMC_A22 , IEN | PTD | M1 },
+ /* kpd_col7 */
+ { GPMC_A23 , IEN | PTD | M1 },
+ /* gpio_48 */ /* vbus_detect */
+ { GPMC_A24 , IEN | M3 },
+ /* gpio_49 */ /* id */
+ { GPMC_A25 , IEN | PTU | M3 },
+ /* gpmc_ncs0 */
+ { GPMC_NCS0 , IEN | PTU | M0 },
+ /* gpio_51 */ /* compass_data_ready */
+ { GPMC_NCS1 , IEN | M3 },
+ /* safe_mode */
+ { GPMC_NCS2 , IEN | PTU | M7 },
+ /* gpio_53 */ /* lcd_rst */
+ { GPMC_NCS3 , IEN | M3 },
+ /* gpmc_nwp */
+ { GPMC_NWP , IEN | PTD | M0 },
+ /* gpmc_clk */
+ { GPMC_CLK , IEN | PTD | M0 },
+ /* gpmc_nadv_ale */
+ { GPMC_NADV_ALE , IEN | PTD | M0 },
+ /* sdmmc2_clk */ /* internal FLASH */
+ { GPMC_NOE , IEN | PTU | M1 },
+ /* sdmmc2_cmd */ /* internal FLASH */
+ { GPMC_NWE , IEN | PTU | M1 },
+ /* gpmc_nbe0_cle */
+ { GPMC_NBE0_CLE , IEN | PTD | M0 },
+ /* safe_mode */
+ { GPMC_NBE1 , IEN | PTD | M7 },
+ /* gpmc_wait0 */
+ { GPMC_WAIT0 , IEN | PTU | M0 },
+ /* gpio_62 */ /* camera_reset */
+ { GPMC_WAIT1 , IEN | M3 },
+ /* safe_mode */
+ { GPMC_WAIT2 , IEN | PTD | M7 },
+ /* gpio_101 */ /* lcd_stdby */
+ { GPMC_NCS4 , M3 },
+ /* gpio_102 */ /* wifi_irq */
+ { GPMC_NCS5 , IEN | M3 },
+ /* gpio_103 */ /* wifi_power */
+ { GPMC_NCS6 , M3 },
+ /* gpio_104 */ /* bt_power */
+ { GPMC_NCS7 , IEN | M3 },
+ /* gpio_63 */ /* hdmi_hpd ?? */
+ { GPIO63 , IEN | PTD | M3 },
+ /* */
+ { GPIO64 , IEN | M0 },
+ /* */
+ { GPIO65 , IEN | M0 },
+ /* */
+ { GPIO66 , IEN | M0 },
+ /* csi21_dx0 */
+ { CSI21_DX0 , IEN | M0 },
+ /* csi21_dy0 */
+ { CSI21_DY0 , IEN | M0 },
+ /* csi21_dx1 */
+ { CSI21_DX1 , IEN | M0 },
+ /* csi21_dy1 */
+ { CSI21_DY1 , IEN | M0 },
+ /* safe_mode */
+ { CSI21_DX2 , IEN | PTD | M7 },
+ /* safe_mode */
+ { CSI21_DY2 , IEN | PTD | M7 },
+ /* safe_mode */
+ { CSI21_DX3 , IEN | PTD | M7 },
+ /* safe_mode */
+ { CSI21_DY3 , IEN | PTD | M7 },
+ /* safe_mode */
+ { CSI21_DX4 , IEN | PTD | M7 },
+ /* safe_mode */
+ { CSI21_DY4 , IEN | PTD | M7 },
+ /* safe_mode */
+ { CSI22_DX0 , IEN | PTD | M7 },
+ /* safe_mode */
+ { CSI22_DY0 , IEN | PTD | M7 },
+ /* safe_mode */
+ { CSI22_DX1 , IEN | PTD | M7 },
+ /* safe_mode */
+ { CSI22_DY1 , IEN | PTD | M7 },
+ /* cam_shutter */
+ { CAM_SHUTTER , PTD | M0 },
+ /* cam_strobe */
+ { CAM_STROBE , PTD | M0 },
+ /* gpio_83 */
+ { CAM_GLOBALRESET , PTD | M3 },
+ /* usbb1_ulpiphy_clk */
+ { USBB1_ULPITLL_CLK , IEN | PTD | M4 },
+ /* usbb1_ulpiphy_stp */
+ { USBB1_ULPITLL_STP , M4 },
+ /* usbb1_ulpiphy_dir */
+ { USBB1_ULPITLL_DIR , IEN | PTD | M4 },
+ /* usbb1_ulpiphy_nxt */
+ { USBB1_ULPITLL_NXT , IEN | PTD | M4 },
+ /* usbb1_ulpiphy_dat0 */
+ { USBB1_ULPITLL_DAT0 , WAKEUP_EN | IEN | PTD | M4 },
+ /* usbb1_ulpiphy_dat1 */
+ { USBB1_ULPITLL_DAT1 , IEN | PTD | M4 },
+ /* usbb1_ulpiphy_dat2 */
+ { USBB1_ULPITLL_DAT2 , IEN | PTD | M4 },
+ /* usbb1_ulpiphy_dat3 */
+ { USBB1_ULPITLL_DAT3 , IEN | PTD | M4 },
+ /* usbb1_ulpiphy_dat4 */
+ { USBB1_ULPITLL_DAT4 , IEN | PTD | M4 },
+ /* usbb1_ulpiphy_dat5 */
+ { USBB1_ULPITLL_DAT5 , IEN | PTD | M4 },
+ /* usbb1_ulpiphy_dat6 */
+ { USBB1_ULPITLL_DAT6 , IEN | PTD | M4 },
+ /* usbb1_ulpiphy_dat7 */
+ { USBB1_ULPITLL_DAT7 , IEN | PTD | M4 },
+ /* usbb1_hsic_data */
+ { USBB1_HSIC_DATA , M0 },
+ /* usbb1_hsic_strobe */
+ { USBB1_HSIC_STROBE , M0 },
+ /* usbc1_icusb_dp */
+ { USBC1_ICUSB_DP , M0 },
+ /* usbc1_icusb_dm */
+ { USBC1_ICUSB_DM , M0 },
+ /* sdmmc1_clk */ /* SD card */
+ { SDMMC1_CLK , PTU | M0 },
+ /* sdmmc1_cmd */ /* SD card */
+ { SDMMC1_CMD , IEN | PTU | M0 },
+ /* sdmmc1_dat0 */ /* SD card */
+ { SDMMC1_DAT0 , IEN | PTU | M0 },
+ /* sdmmc1_dat1 */ /* SD card */
+ { SDMMC1_DAT1 , IEN | PTU | M0 },
+ /* sdmmc1_dat2 */ /* SD card */
+ { SDMMC1_DAT2 , IEN | PTU | M0 },
+ /* sdmmc1_dat3 */ /* SD card */
+ { SDMMC1_DAT3 , IEN | PTU | M0 },
+ /* sdmmc1_dat4 */ /* SD card */
+ { SDMMC1_DAT4 , IEN | PTU | M0 },
+ /* sdmmc1_dat5 */ /* SD card */
+ { SDMMC1_DAT5 , IEN | PTU | M0 },
+ /* sdmmc1_dat6 */ /* SD card */
+ { SDMMC1_DAT6 , IEN | PTU | M0 },
+ /* sdmmc1_dat7 */ /* SD card */
+ { SDMMC1_DAT7 , IEN | PTU | M0 },
+ /* gpio_110 */ /* tsp_pwr_gpio */
+ { ABE_MCBSP2_CLKX , M3 },
+ /* gpio_111 */ /* vbus_musb_pwron */
+ { ABE_MCBSP2_DR , IEN | M3 },
+ /* gpio_112 */ /* tsp_irq_gpio */
+ { ABE_MCBSP2_DX , WAKEUP_EN | IEN | PTU | M3 },
+ /* gpio_113 */ /* vbus_flag */
+ { ABE_MCBSP2_FSX , IEN | PTU | M3 },
+ /* safe_mode */
+ { ABE_MCBSP1_CLKX , IEN | PTD | M7 },
+ /* safe_mode */
+ { ABE_MCBSP1_DR , IEN | PTD | M7 },
+ /* abe_mcbsp1_dx */
+ { ABE_MCBSP1_DX , M0 },
+ /* abe_mcbsp1_fsx */
+ { ABE_MCBSP1_FSX , IEN | M0 },
+ /* abe_pdm_ul_data */
+ { ABE_PDM_UL_DATA , IEN | M0 },
+ /* abe_pdm_dl_data */
+ { ABE_PDM_DL_DATA , M0 },
+ /* abe_pdm_frame */
+ { ABE_PDM_FRAME , IEN | M0 },
+ /* abe_pdm_lb_clk */
+ { ABE_PDM_LB_CLK , IEN | M0 },
+ /* abe_clks */
+ { ABE_CLKS , IEN | M0 },
+ /* safe_mode */
+ { ABE_DMIC_CLK1 , IEN | PTD | M7 },
+ /* safe_mode */
+ { ABE_DMIC_DIN1 , IEN | PTD | M7 },
+ /* safe_mode */
+ { ABE_DMIC_DIN2 , IEN | PTD | M7 },
+ /* safe_mode */ /* bkl_en on gpio_122 ?? */
+ { ABE_DMIC_DIN3 , IEN | PTD | M7 },
+ /* uart2_cts */
+ { UART2_CTS , WAKEUP_EN | OFF_PU | OFF_IN | M0 },
+ /* safe_mode */
+ { UART2_RTS , OFF_PU | OFF_IN | M7 },
+ /* uart2_rx */
+ { UART2_RX , IEN | PTU | M0 },
+ /* uart2_tx */
+ { UART2_TX , M0 },
+ /* gpio_127 */ /* audio_power_on */
+ { HDQ_SIO , M3 },
+ /* i2c1_scl */
+ { I2C1_SCL , IEN | M0 },
+ /* i2c1_sda */
+ { I2C1_SDA , IEN | M0 },
+ /* i2c2_scl */
+ { I2C2_SCL , IEN | M0 },
+ /* i2c2_sda */
+ { I2C2_SDA , IEN | M0 },
+ /* i2c3_scl */
+ { I2C3_SCL , IEN | M0 },
+ /* i2c3_sda */
+ { I2C3_SDA , IEN | M0 },
+ /* i2c4_scl */
+ { I2C4_SCL , IEN | M0 },
+ /* i2c4_sda */
+ { I2C4_SDA , IEN | M0 },
+ /* mcspi1_clk */
+ { MCSPI1_CLK , IEN | M0 },
+ /* mcspi1_somi */
+ { MCSPI1_SOMI , IEN | M0 },
+ /* mcspi1_simo */
+ { MCSPI1_SIMO , IEN | M0 },
+ /* mcspi1_cs0 */
+ { MCSPI1_CS0 , IEN | PTD | M0 },
+ /* uart1_rx */
+ { MCSPI1_CS1 , WAKEUP_EN | IEN | M1 },
+ /* gpio_139 */
+ { MCSPI1_CS2 , M3 },
+ /* safe_mode */
+ { MCSPI1_CS3 , IEN | PTU | M7 },
+ /* uart1_tx */
+ { UART3_CTS_RCTX , M1 },
+ /* uart3_rts_sd */
+ { UART3_RTS_SD , M0 },
+ /* safe_mode */
+ { UART3_RX_IRRX , IEN | PTU | M7 },
+ /* safe_mode */
+ { UART3_TX_IRTX , IEN | PTD | M7 },
+ /* sdmmc5_clk */
+ { SDMMC5_CLK , PTU | M0 },
+ /* sdmmc5_cmd */
+ { SDMMC5_CMD , IEN | PTU | M0 },
+ /* sdmmc5_dat0 */
+ { SDMMC5_DAT0 , IEN | PTU | M0 },
+ /* sdmmc5_dat1 */
+ { SDMMC5_DAT1 , IEN | PTU | M0 },
+ /* sdmmc5_dat2 */
+ { SDMMC5_DAT2 , IEN | PTU | M0 },
+ /* sdmmc5_dat3 */
+ { SDMMC5_DAT3 , IEN | PTU | M0 },
+ /* sdmmc4_clk */
+ { MCSPI4_CLK , IEN | PTU | M1 },
+ /* sdmmc4_cmd */
+ { MCSPI4_SIMO , IEN | PTU | M1 },
+ /* sdmmc4_dat0 */
+ { MCSPI4_SOMI , IEN | PTU | M1 },
+ /* sdmmc4_dat3 */
+ { MCSPI4_CS0 , IEN | PTU | M1 },
+ /* sdmmc4_dat2 */
+ { UART4_RX , IEN | PTU | M1 },
+ /* sdmmc4_dat1 */
+ { UART4_TX , IEN | PTU | M1 },
+ /* gpio_157 */
+ { USBB2_ULPITLL_CLK , M3 },
+ /* dispc2_data23 */
+ { USBB2_ULPITLL_STP , M5 },
+ /* dispc2_data22 */
+ { USBB2_ULPITLL_DIR , M5 },
+ /* dispc2_data21 */
+ { USBB2_ULPITLL_NXT , M5 },
+ /* dispc2_data20 */
+ { USBB2_ULPITLL_DAT0 , M5 },
+ /* dispc2_data19 */
+ { USBB2_ULPITLL_DAT1 , M5 },
+ /* dispc2_data18 */
+ { USBB2_ULPITLL_DAT2 , M5 },
+ /* dispc2_data15 */
+ { USBB2_ULPITLL_DAT3 , M5 },
+ /* dispc2_data14 */
+ { USBB2_ULPITLL_DAT4 , M5 },
+ /* dispc2_data13 */
+ { USBB2_ULPITLL_DAT5 , M5 },
+ /* dispc2_data12 */
+ { USBB2_ULPITLL_DAT6 , M5 },
+ /* dispc2_data11 */
+ { USBB2_ULPITLL_DAT7 , M5 },
+ /* gpio_169 */
+ { USBB2_HSIC_DATA , M3 },
+ /* gpio_170 */
+ { USBB2_HSIC_STROBE , M3 },
+ /* kpd_col0 */
+ { KPD_COL3 , IEN | PTD | M1 },
+ /* kpd_col1 */
+ { KPD_COL4 , IEN | PTD | M1 },
+ /* kpd_col2 */
+ { KPD_COL5 , IEN | PTD | M1 },
+ /* gpio_174 */ /* accel_int2 */
+ { KPD_COL0 , IEN | PTU | M3 },
+ /* gpio_0 */ /* tsp_shtdwn_gpio */
+ { KPD_COL1 , IEN | PTD | M3 },
+ /* gpio_1 */
+ { KPD_COL2 , IEN | PTD | M3 },
+ /* kpd_row0 */
+ { KPD_ROW3 , IEN | PTD | M1 },
+ /* kpd_row1 */
+ { KPD_ROW4 , IEN | PTD | M1 },
+ /* kpd_row2 */
+ { KPD_ROW5 , IEN | PTD | M1 },
+ /* kpd_row3 */
+ { KPD_ROW0 , IEN | PTD | M1 },
+ /* kpd_row4 */
+ { KPD_ROW1 , IEN | PTD | M1 },
+ /* kpd_row5 */
+ { KPD_ROW2 , IEN | PTD | M1 },
+ /* usba0_otg_ce */
+ { USBA0_OTG_CE , PTU | M0 },
+ /* usba0_otg_dp */
+ { USBA0_OTG_DP , M0 },
+ /* usba0_otg_dm */
+ { USBA0_OTG_DM , M0 },
+ /* safe_mode */
+ { FREF_CLK1_OUT , IEN | PTD | M7 },
+ /* fref_clk2_out */
+ { FREF_CLK2_OUT , M0 },
+ /* sys_nirq1 */
+ { SYS_NIRQ1 , WAKEUP_EN | IEN | PTU | M0 },
+ /* sys_nirq2 */ /* audio_irq */
+ { SYS_NIRQ2 , IEN | PTU | M0 },
+ /* sys_boot0 */
+ { SYS_BOOT0 , IEN | PTD | M0 },
+ /* sys_boot1 */
+ { SYS_BOOT1 , IEN | PTD | M0 },
+ /* sys_boot2 */
+ { SYS_BOOT2 , IEN | PTD | M0 },
+ /* sys_boot3 */
+ { SYS_BOOT3 , IEN | PTD | M0 },
+ /* sys_boot4 */
+ { SYS_BOOT4 , IEN | PTD | M0 },
+ /* sys_boot5 */
+ { SYS_BOOT5 , IEN | PTD | M0 },
+ /* dpm_emu0 */
+ { DPM_EMU0 , IEN | PTU | M0 },
+ /* gpio_12 */ /* lcd_avdd_en */
+ { DPM_EMU1 , IEN | M3 },
+ /* safe_mode */
+ { DPM_EMU2 , IEN | PTD | M7 },
+ /* dispc2_data10 */
+ { DPM_EMU3 , M5 },
+ /* dispc2_data9 */
+ { DPM_EMU4 , M5 },
+ /* dispc2_data16 */
+ { DPM_EMU5 , M5 },
+ /* dispc2_data17 */
+ { DPM_EMU6 , M5 },
+ /* dispc2_hsync */
+ { DPM_EMU7 , M5 },
+ /* dispc2_pclk */
+ { DPM_EMU8 , M5 },
+ /* dispc2_vsync */
+ { DPM_EMU9 , M5 },
+ /* dispc2_de */
+ { DPM_EMU10 , M5 },
+ /* dispc2_data8 */
+ { DPM_EMU11 , M5 },
+ /* dispc2_data7 */
+ { DPM_EMU12 , M5 },
+ /* dispc2_data6 */
+ { DPM_EMU13 , M5 },
+ /* dispc2_data5 */
+ { DPM_EMU14 , M5 },
+ /* dispc2_data4 */
+ { DPM_EMU15 , M5 },
+ /* dispc2_data3 */
+ { DPM_EMU16 , M5 },
+ /* dispc2_data2 */
+ { DPM_EMU17 , M5 },
+ /* dispc2_data1 */
+ { DPM_EMU18 , M5 },
+ /* dispc2_data0 */
+ { DPM_EMU19 , M5 },
+ /* safe_mode */
+ { CSI22_DX2 , IEN | PTD | M7 },
+ /* safe_mode */
+ { CSI22_DY2 , IEN | PTD | M7 },
+};
+
+static const struct pad_conf_entry wkup_padconf_array[] = {
+ /* sr_scl */
+ { SR_SCL , IEN },
+ /* sr_sda */
+ { SR_SDA , IEN },
+ /* fref_clk0_out */
+ { FREF_CLK0_OUT , M0 },
+ /* gpio_wk30 */
+ { FREF_CLK3_REQ , M3 },
+ /* gpio_wk7 */ /* tps62361_vsel0 */
+ { FREF_CLK4_REQ , IEN | PTU | M3 },
+};
+
+void set_muxconf_regs(void){
+ omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_CORE,
+ core_padconf_array, ARRAY_SIZE(core_padconf_array));
+ omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP,
+ wkup_padconf_array, ARRAY_SIZE(wkup_padconf_array));
+
+ /* gpio_wk7 is used for controlling TPS on 4460 */
+ if (omap4_revision() >= OMAP4460_ES1_0) {
+ writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + FREF_CLK4_REQ);
+ /* Enable GPIO-1 clocks before TPS initialization */
+ omap4_enable_gpio1_wup_clocks();
+ }
+}
diff --git a/arch/arm/boards/archosg9/mux.h b/arch/arm/boards/archosg9/mux.h
new file mode 100644
index 0000000..97297b6
--- /dev/null
+++ b/arch/arm/boards/archosg9/mux.h
@@ -0,0 +1,6 @@
+#ifndef _MUX_H
+#define _MUX_H
+
+void set_muxconf_regs(void);
+
+#endif /* _MUX_H */
diff --git a/arch/arm/configs/archosg9_defconfig b/arch/arm/configs/archosg9_defconfig
new file mode 100644
index 0000000..e598258
--- /dev/null
+++ b/arch/arm/configs/archosg9_defconfig
@@ -0,0 +1,70 @@
+CONFIG_MACH_ARCHOSG9=y
+CONFIG_ARCH_OMAP=y
+CONFIG_ARCH_OMAP4=y
+CONFIG_AEABI=y
+# CONFIG_MACH_DO_LOWLEVEL_INIT is not set
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_ARM_UNWIND=y
+# CONFIG_MMU is not set
+CONFIG_OMAP4_USBBOOT=y
+CONFIG_TEXT_BASE=0xa0000000
+CONFIG_MALLOC_BASE=0x90000000
+CONFIG_MALLOC_SIZE=0x10000000
+CONFIG_KALLSYMS=y
+CONFIG_PROMPT="barebox> "
+CONFIG_LONGHELP=y
+CONFIG_GLOB=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+# CONFIG_TIMESTAMP is not set
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv-2 arch/arm/boards/archosg9/env"
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_SHA224SUM=y
+CONFIG_CMD_SHA256SUM=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_BOOTM_VERBOSE=y
+CONFIG_CMD_BOOTM_INITRD=y
+CONFIG_CMD_BOOTM_OFTREE=y
+CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
+CONFIG_CMD_BOOTM_AIMAGE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_I2C=y
+CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT=y
+CONFIG_DRIVER_SERIAL_NS16550=y
+CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
+CONFIG_BAUDRATE=1000000
+# CONFIG_SPI is not set
+CONFIG_I2C=y
+CONFIG_I2C_OMAP=y
+CONFIG_I2C_TWLCORE=y
+CONFIG_I2C_TWL6030=y
+CONFIG_MCI=y
+CONFIG_MCI_STARTUP=y
+CONFIG_MCI_OMAP_HSMMC=y
+CONFIG_FS_FAT=y
+CONFIG_FS_FAT_WRITE=y
+CONFIG_FS_FAT_LFN=y
+CONFIG_FS_OMAP4_USBBOOT=y
diff --git a/arch/arm/configs/archosg9_xload_defconfig b/arch/arm/configs/archosg9_xload_defconfig
new file mode 100644
index 0000000..6c6782f
--- /dev/null
+++ b/arch/arm/configs/archosg9_xload_defconfig
@@ -0,0 +1,24 @@
+CONFIG_MACH_ARCHOSG9=y
+CONFIG_ARCH_OMAP=y
+CONFIG_ARCH_OMAP4=y
+# CONFIG_OMAP_GPMC is not set
+CONFIG_OMAP_BUILD_IFT=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0xC000
+CONFIG_AEABI=y
+CONFIG_OMAP4_USBBOOT=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_TEXT_BASE=0x40300000
+CONFIG_MEMORY_LAYOUT_FIXED=y
+CONFIG_STACK_BASE=0x8f000000
+CONFIG_MALLOC_BASE=0x84000000
+CONFIG_MALLOC_SIZE=0x2000000
+CONFIG_SHELL_NONE=y
+# CONFIG_ERRNO_MESSAGES is not set
+# CONFIG_TIMESTAMP is not set
+# CONFIG_CONSOLE_FULL is not set
+# CONFIG_DEFAULT_ENVIRONMENT is not set
+CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT=y
+# CONFIG_SPI is not set
+# CONFIG_FS_RAMFS is not set
+# CONFIG_FS_DEVFS is not set
+CONFIG_FS_OMAP4_USBBOOT=y
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index b3dd6a4..da39530 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -92,6 +92,7 @@ config OMAP4_USBBOOT
Please read oamp4_usb_booting.txt for more information.
config BOARDINFO
+ default "Archos G9" if MACH_ARCHOSG9
default "Texas Instrument's SDP343x" if MACH_OMAP343xSDP
default "Texas Instrument's Beagle" if MACH_BEAGLE
default "Texas Instrument's OMAP3EVM" if MACH_OMAP3EVM
@@ -131,6 +132,14 @@ config MACH_PANDA
help
Say Y here if you are using OMAP4 Panda board
+config MACH_ARCHOSG9
+ bool "Archos G9 tablets"
+ select HAVE_NOSHELL
+ select MACH_HAS_LOWLEVEL_INIT
+ depends on ARCH_OMAP4
+ help
+ Say Y here if you are using OMAP4-based Archos G9 tablet
+
config MACH_PCM049
bool "Phytec phyCORE pcm049"
select HAVE_NOSHELL
--
1.7.12.2
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^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 14/14] Add support for Archos G9 tablet
2012-10-08 22:55 ` [PATCH 14/14] Add support for Archos G9 tablet Vicente
@ 2012-10-19 11:10 ` Jan Weitzel
2012-10-21 1:00 ` vj
0 siblings, 1 reply; 22+ messages in thread
From: Jan Weitzel @ 2012-10-19 11:10 UTC (permalink / raw)
To: Vicente; +Cc: barebox
> diff --git a/arch/arm/boards/archosg9/lowlevel.c b/arch/arm/boards/archosg9/lowlevel.c
> new file mode 100644
> index 0000000..fa5be1d
> --- /dev/null
> +++ b/arch/arm/boards/archosg9/lowlevel.c
> @@ -0,0 +1,79 @@
> +/*
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <common.h>
> +#include <io.h>
> +#include <init.h>
> +#include <mach/omap4-mux.h>
> +#include <mach/omap4-silicon.h>
> +#include <mach/omap4-clock.h>
> +#include <mach/syslib.h>
> +#include <asm/barebox-arm.h>
> +#include <asm/barebox-arm-head.h>
> +#include "mux.h"
> +
> +#define TPS62361_VSEL0_GPIO 7
> +
> +static const struct ddr_regs ddr_regs_400_mhz_2cs = {
> + .tim1 = 0x10EB0662,
> + .tim2 = 0x20370DD2,
> + .tim3 = 0x00B1C33F,
> + .phy_ctrl_1 = 0x849FF408,
> + .ref_ctrl = 0x00000618,
> + .config_init = 0x80000EB9,
> + .config_final = 0x80001AB9,
> + .zq_config = 0xD00B3215,
> + .mr1 = 0x83,
> + .mr2 = 0x4
> +};
> +
> +static noinline void archosg9_init_lowlevel(void)
> +{
> + struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
> + struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU600;
This if OPP100 for 4430, for 4460 OPP100 defines 700MHz.
> + struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
> + struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
> + struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
> + struct dpll_param usb = OMAP4_USB_DPLL_PARAM_19M2;
> +
> + writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
> +
> + /* Configure all DPLL's at 100% OPP */
> + omap4_configure_mpu_dpll(&mpu);
> + omap4_configure_iva_dpll(&iva);
> + omap4_configure_per_dpll(&per);
> + omap4_configure_abe_dpll(&abe);
> + omap4_configure_usb_dpll(&usb);
> +
> + /* Enable all clocks */
> + omap4_enable_all_clocks();
> +
> + set_muxconf_regs();
> +
> + omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
> +
> + /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
> + omap4_scale_vcores(TPS62361_VSEL0_GPIO);
According to TIs DM the sequence for going into a higher OPP is to first
raise the voltage. I saw this is also wrong on pandaboard.
They also say rise core freq before mpu freq so the order should be
omap4_scale_vcores
omap4_ddr_init
omap4_configure_mpu_dpll
I'll fix and test the order on PCM049
Jan
> + board_init_lowlevel_return();
> +}
> +
> +void __naked __bare_init reset(void)
> +{
> + u32 r;
> +
> + common_reset();
> +
> + r = 0x4030D000;
> + __asm__ __volatile__("mov sp, %0" : : "r"(r));
> +
> + archosg9_init_lowlevel();
> +}
> diff --git a/arch/arm/boards/archosg9/mux.c b/arch/arm/boards/archosg9/mux.c
> new file mode 100644
> index 0000000..7ca5057
> --- /dev/null
> +++ b/arch/arm/boards/archosg9/mux.c
> @@ -0,0 +1,459 @@
> +/*
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <common.h>
> +#include <init.h>
> +#include <io.h>
> +#include <mach/omap4-silicon.h>
> +#include <mach/omap4-mux.h>
> +#include <mach/omap4-clock.h>
> +#include "mux.h"
> +
> +static const struct pad_conf_entry core_padconf_array[] = {
> + /* sdmmc2_dat0 */ /* internal FLASH */
> + { GPMC_AD0 , IEN | PTU | M1 },
> + /* sdmmc2_dat1 */ /* internal FLASH */
> + { GPMC_AD1 , IEN | PTU | M1 },
> + /* sdmmc2_dat2 */ /* internal FLASH */
> + { GPMC_AD2 , IEN | PTU | M1 },
> + /* sdmmc2_dat3 */ /* internal FLASH */
> + { GPMC_AD3 , IEN | PTU | M1 },
> + /* sdmmc2_dat4 */ /* internal FLASH */
> + { GPMC_AD4 , IEN | PTU | M1 },
> + /* sdmmc2_dat5 */ /* internal FLASH */
> + { GPMC_AD5 , IEN | PTU | M1 },
> + /* sdmmc2_dat6 */ /* internal FLASH */
> + { GPMC_AD6 , IEN | PTU | M1 },
> + /* sdmmc2_dat7 */ /* internal FLASH */
> + { GPMC_AD7 , IEN | PTU | M1 },
> + /* gpio_32 */
> + { GPMC_AD8 , IEN | PTD | M3 },
> + /* gpmc_ad9 */
> + { GPMC_AD9 , IEN | PTU | M0 },
> + /* gpio_34 */ /* 1v8_pwron */
> + { GPMC_AD10 , IEN | PTU | M3 },
> + /* gpio_35 */ /* vcc_pwron */
> + { GPMC_AD11 , IEN | PTU | M3 },
> + /* gpio_36 */ /* 5v_pwron */
> + { GPMC_AD12 , IEN | M3 },
> + /* gpio_37 */ /* hdmi_pwr */
> + { GPMC_AD13 , IEN | M3 },
> + /* gpio_38 */ /* lcd_pwon */
> + { GPMC_AD14 , IEN | M3 },
> + /* gpio_39 */ /* lvds_en */
> + { GPMC_AD15 , IEN | M3 },
> + /* gpio_40 */ /* 3g_enable */
> + { GPMC_A16 , IEN | M3 },
> + /* gpio_41 */ /* gps_enable */
> + { GPMC_A17 , IEN | M3 },
> + /* gpio_42 */ /* ehci_enable */
> + { GPMC_A18 , IEN | M3 },
> + /* gpio_43 */ /* volume up */
> + { GPMC_A19 , IEN | M3 },
> + /* gpio_44 */ /* volume down */
> + { GPMC_A20 , IEN | M3 },
> + /* gpio_45 */ /* accel_int1 */
> + { GPMC_A21 , IEN | PTU | M3 },
> + /* kpd_col6 */
> + { GPMC_A22 , IEN | PTD | M1 },
> + /* kpd_col7 */
> + { GPMC_A23 , IEN | PTD | M1 },
> + /* gpio_48 */ /* vbus_detect */
> + { GPMC_A24 , IEN | M3 },
> + /* gpio_49 */ /* id */
> + { GPMC_A25 , IEN | PTU | M3 },
> + /* gpmc_ncs0 */
> + { GPMC_NCS0 , IEN | PTU | M0 },
> + /* gpio_51 */ /* compass_data_ready */
> + { GPMC_NCS1 , IEN | M3 },
> + /* safe_mode */
> + { GPMC_NCS2 , IEN | PTU | M7 },
> + /* gpio_53 */ /* lcd_rst */
> + { GPMC_NCS3 , IEN | M3 },
> + /* gpmc_nwp */
> + { GPMC_NWP , IEN | PTD | M0 },
> + /* gpmc_clk */
> + { GPMC_CLK , IEN | PTD | M0 },
> + /* gpmc_nadv_ale */
> + { GPMC_NADV_ALE , IEN | PTD | M0 },
> + /* sdmmc2_clk */ /* internal FLASH */
> + { GPMC_NOE , IEN | PTU | M1 },
> + /* sdmmc2_cmd */ /* internal FLASH */
> + { GPMC_NWE , IEN | PTU | M1 },
> + /* gpmc_nbe0_cle */
> + { GPMC_NBE0_CLE , IEN | PTD | M0 },
> + /* safe_mode */
> + { GPMC_NBE1 , IEN | PTD | M7 },
> + /* gpmc_wait0 */
> + { GPMC_WAIT0 , IEN | PTU | M0 },
> + /* gpio_62 */ /* camera_reset */
> + { GPMC_WAIT1 , IEN | M3 },
> + /* safe_mode */
> + { GPMC_WAIT2 , IEN | PTD | M7 },
> + /* gpio_101 */ /* lcd_stdby */
> + { GPMC_NCS4 , M3 },
> + /* gpio_102 */ /* wifi_irq */
> + { GPMC_NCS5 , IEN | M3 },
> + /* gpio_103 */ /* wifi_power */
> + { GPMC_NCS6 , M3 },
> + /* gpio_104 */ /* bt_power */
> + { GPMC_NCS7 , IEN | M3 },
> + /* gpio_63 */ /* hdmi_hpd ?? */
> + { GPIO63 , IEN | PTD | M3 },
> + /* */
> + { GPIO64 , IEN | M0 },
> + /* */
> + { GPIO65 , IEN | M0 },
> + /* */
> + { GPIO66 , IEN | M0 },
> + /* csi21_dx0 */
> + { CSI21_DX0 , IEN | M0 },
> + /* csi21_dy0 */
> + { CSI21_DY0 , IEN | M0 },
> + /* csi21_dx1 */
> + { CSI21_DX1 , IEN | M0 },
> + /* csi21_dy1 */
> + { CSI21_DY1 , IEN | M0 },
> + /* safe_mode */
> + { CSI21_DX2 , IEN | PTD | M7 },
> + /* safe_mode */
> + { CSI21_DY2 , IEN | PTD | M7 },
> + /* safe_mode */
> + { CSI21_DX3 , IEN | PTD | M7 },
> + /* safe_mode */
> + { CSI21_DY3 , IEN | PTD | M7 },
> + /* safe_mode */
> + { CSI21_DX4 , IEN | PTD | M7 },
> + /* safe_mode */
> + { CSI21_DY4 , IEN | PTD | M7 },
> + /* safe_mode */
> + { CSI22_DX0 , IEN | PTD | M7 },
> + /* safe_mode */
> + { CSI22_DY0 , IEN | PTD | M7 },
> + /* safe_mode */
> + { CSI22_DX1 , IEN | PTD | M7 },
> + /* safe_mode */
> + { CSI22_DY1 , IEN | PTD | M7 },
> + /* cam_shutter */
> + { CAM_SHUTTER , PTD | M0 },
> + /* cam_strobe */
> + { CAM_STROBE , PTD | M0 },
> + /* gpio_83 */
> + { CAM_GLOBALRESET , PTD | M3 },
> + /* usbb1_ulpiphy_clk */
> + { USBB1_ULPITLL_CLK , IEN | PTD | M4 },
> + /* usbb1_ulpiphy_stp */
> + { USBB1_ULPITLL_STP , M4 },
> + /* usbb1_ulpiphy_dir */
> + { USBB1_ULPITLL_DIR , IEN | PTD | M4 },
> + /* usbb1_ulpiphy_nxt */
> + { USBB1_ULPITLL_NXT , IEN | PTD | M4 },
> + /* usbb1_ulpiphy_dat0 */
> + { USBB1_ULPITLL_DAT0 , WAKEUP_EN | IEN | PTD | M4 },
> + /* usbb1_ulpiphy_dat1 */
> + { USBB1_ULPITLL_DAT1 , IEN | PTD | M4 },
> + /* usbb1_ulpiphy_dat2 */
> + { USBB1_ULPITLL_DAT2 , IEN | PTD | M4 },
> + /* usbb1_ulpiphy_dat3 */
> + { USBB1_ULPITLL_DAT3 , IEN | PTD | M4 },
> + /* usbb1_ulpiphy_dat4 */
> + { USBB1_ULPITLL_DAT4 , IEN | PTD | M4 },
> + /* usbb1_ulpiphy_dat5 */
> + { USBB1_ULPITLL_DAT5 , IEN | PTD | M4 },
> + /* usbb1_ulpiphy_dat6 */
> + { USBB1_ULPITLL_DAT6 , IEN | PTD | M4 },
> + /* usbb1_ulpiphy_dat7 */
> + { USBB1_ULPITLL_DAT7 , IEN | PTD | M4 },
> + /* usbb1_hsic_data */
> + { USBB1_HSIC_DATA , M0 },
> + /* usbb1_hsic_strobe */
> + { USBB1_HSIC_STROBE , M0 },
> + /* usbc1_icusb_dp */
> + { USBC1_ICUSB_DP , M0 },
> + /* usbc1_icusb_dm */
> + { USBC1_ICUSB_DM , M0 },
> + /* sdmmc1_clk */ /* SD card */
> + { SDMMC1_CLK , PTU | M0 },
> + /* sdmmc1_cmd */ /* SD card */
> + { SDMMC1_CMD , IEN | PTU | M0 },
> + /* sdmmc1_dat0 */ /* SD card */
> + { SDMMC1_DAT0 , IEN | PTU | M0 },
> + /* sdmmc1_dat1 */ /* SD card */
> + { SDMMC1_DAT1 , IEN | PTU | M0 },
> + /* sdmmc1_dat2 */ /* SD card */
> + { SDMMC1_DAT2 , IEN | PTU | M0 },
> + /* sdmmc1_dat3 */ /* SD card */
> + { SDMMC1_DAT3 , IEN | PTU | M0 },
> + /* sdmmc1_dat4 */ /* SD card */
> + { SDMMC1_DAT4 , IEN | PTU | M0 },
> + /* sdmmc1_dat5 */ /* SD card */
> + { SDMMC1_DAT5 , IEN | PTU | M0 },
> + /* sdmmc1_dat6 */ /* SD card */
> + { SDMMC1_DAT6 , IEN | PTU | M0 },
> + /* sdmmc1_dat7 */ /* SD card */
> + { SDMMC1_DAT7 , IEN | PTU | M0 },
> + /* gpio_110 */ /* tsp_pwr_gpio */
> + { ABE_MCBSP2_CLKX , M3 },
> + /* gpio_111 */ /* vbus_musb_pwron */
> + { ABE_MCBSP2_DR , IEN | M3 },
> + /* gpio_112 */ /* tsp_irq_gpio */
> + { ABE_MCBSP2_DX , WAKEUP_EN | IEN | PTU | M3 },
> + /* gpio_113 */ /* vbus_flag */
> + { ABE_MCBSP2_FSX , IEN | PTU | M3 },
> + /* safe_mode */
> + { ABE_MCBSP1_CLKX , IEN | PTD | M7 },
> + /* safe_mode */
> + { ABE_MCBSP1_DR , IEN | PTD | M7 },
> + /* abe_mcbsp1_dx */
> + { ABE_MCBSP1_DX , M0 },
> + /* abe_mcbsp1_fsx */
> + { ABE_MCBSP1_FSX , IEN | M0 },
> + /* abe_pdm_ul_data */
> + { ABE_PDM_UL_DATA , IEN | M0 },
> + /* abe_pdm_dl_data */
> + { ABE_PDM_DL_DATA , M0 },
> + /* abe_pdm_frame */
> + { ABE_PDM_FRAME , IEN | M0 },
> + /* abe_pdm_lb_clk */
> + { ABE_PDM_LB_CLK , IEN | M0 },
> + /* abe_clks */
> + { ABE_CLKS , IEN | M0 },
> + /* safe_mode */
> + { ABE_DMIC_CLK1 , IEN | PTD | M7 },
> + /* safe_mode */
> + { ABE_DMIC_DIN1 , IEN | PTD | M7 },
> + /* safe_mode */
> + { ABE_DMIC_DIN2 , IEN | PTD | M7 },
> + /* safe_mode */ /* bkl_en on gpio_122 ?? */
> + { ABE_DMIC_DIN3 , IEN | PTD | M7 },
> + /* uart2_cts */
> + { UART2_CTS , WAKEUP_EN | OFF_PU | OFF_IN | M0 },
> + /* safe_mode */
> + { UART2_RTS , OFF_PU | OFF_IN | M7 },
> + /* uart2_rx */
> + { UART2_RX , IEN | PTU | M0 },
> + /* uart2_tx */
> + { UART2_TX , M0 },
> + /* gpio_127 */ /* audio_power_on */
> + { HDQ_SIO , M3 },
> + /* i2c1_scl */
> + { I2C1_SCL , IEN | M0 },
> + /* i2c1_sda */
> + { I2C1_SDA , IEN | M0 },
> + /* i2c2_scl */
> + { I2C2_SCL , IEN | M0 },
> + /* i2c2_sda */
> + { I2C2_SDA , IEN | M0 },
> + /* i2c3_scl */
> + { I2C3_SCL , IEN | M0 },
> + /* i2c3_sda */
> + { I2C3_SDA , IEN | M0 },
> + /* i2c4_scl */
> + { I2C4_SCL , IEN | M0 },
> + /* i2c4_sda */
> + { I2C4_SDA , IEN | M0 },
> + /* mcspi1_clk */
> + { MCSPI1_CLK , IEN | M0 },
> + /* mcspi1_somi */
> + { MCSPI1_SOMI , IEN | M0 },
> + /* mcspi1_simo */
> + { MCSPI1_SIMO , IEN | M0 },
> + /* mcspi1_cs0 */
> + { MCSPI1_CS0 , IEN | PTD | M0 },
> + /* uart1_rx */
> + { MCSPI1_CS1 , WAKEUP_EN | IEN | M1 },
> + /* gpio_139 */
> + { MCSPI1_CS2 , M3 },
> + /* safe_mode */
> + { MCSPI1_CS3 , IEN | PTU | M7 },
> + /* uart1_tx */
> + { UART3_CTS_RCTX , M1 },
> + /* uart3_rts_sd */
> + { UART3_RTS_SD , M0 },
> + /* safe_mode */
> + { UART3_RX_IRRX , IEN | PTU | M7 },
> + /* safe_mode */
> + { UART3_TX_IRTX , IEN | PTD | M7 },
> + /* sdmmc5_clk */
> + { SDMMC5_CLK , PTU | M0 },
> + /* sdmmc5_cmd */
> + { SDMMC5_CMD , IEN | PTU | M0 },
> + /* sdmmc5_dat0 */
> + { SDMMC5_DAT0 , IEN | PTU | M0 },
> + /* sdmmc5_dat1 */
> + { SDMMC5_DAT1 , IEN | PTU | M0 },
> + /* sdmmc5_dat2 */
> + { SDMMC5_DAT2 , IEN | PTU | M0 },
> + /* sdmmc5_dat3 */
> + { SDMMC5_DAT3 , IEN | PTU | M0 },
> + /* sdmmc4_clk */
> + { MCSPI4_CLK , IEN | PTU | M1 },
> + /* sdmmc4_cmd */
> + { MCSPI4_SIMO , IEN | PTU | M1 },
> + /* sdmmc4_dat0 */
> + { MCSPI4_SOMI , IEN | PTU | M1 },
> + /* sdmmc4_dat3 */
> + { MCSPI4_CS0 , IEN | PTU | M1 },
> + /* sdmmc4_dat2 */
> + { UART4_RX , IEN | PTU | M1 },
> + /* sdmmc4_dat1 */
> + { UART4_TX , IEN | PTU | M1 },
> + /* gpio_157 */
> + { USBB2_ULPITLL_CLK , M3 },
> + /* dispc2_data23 */
> + { USBB2_ULPITLL_STP , M5 },
> + /* dispc2_data22 */
> + { USBB2_ULPITLL_DIR , M5 },
> + /* dispc2_data21 */
> + { USBB2_ULPITLL_NXT , M5 },
> + /* dispc2_data20 */
> + { USBB2_ULPITLL_DAT0 , M5 },
> + /* dispc2_data19 */
> + { USBB2_ULPITLL_DAT1 , M5 },
> + /* dispc2_data18 */
> + { USBB2_ULPITLL_DAT2 , M5 },
> + /* dispc2_data15 */
> + { USBB2_ULPITLL_DAT3 , M5 },
> + /* dispc2_data14 */
> + { USBB2_ULPITLL_DAT4 , M5 },
> + /* dispc2_data13 */
> + { USBB2_ULPITLL_DAT5 , M5 },
> + /* dispc2_data12 */
> + { USBB2_ULPITLL_DAT6 , M5 },
> + /* dispc2_data11 */
> + { USBB2_ULPITLL_DAT7 , M5 },
> + /* gpio_169 */
> + { USBB2_HSIC_DATA , M3 },
> + /* gpio_170 */
> + { USBB2_HSIC_STROBE , M3 },
> + /* kpd_col0 */
> + { KPD_COL3 , IEN | PTD | M1 },
> + /* kpd_col1 */
> + { KPD_COL4 , IEN | PTD | M1 },
> + /* kpd_col2 */
> + { KPD_COL5 , IEN | PTD | M1 },
> + /* gpio_174 */ /* accel_int2 */
> + { KPD_COL0 , IEN | PTU | M3 },
> + /* gpio_0 */ /* tsp_shtdwn_gpio */
> + { KPD_COL1 , IEN | PTD | M3 },
> + /* gpio_1 */
> + { KPD_COL2 , IEN | PTD | M3 },
> + /* kpd_row0 */
> + { KPD_ROW3 , IEN | PTD | M1 },
> + /* kpd_row1 */
> + { KPD_ROW4 , IEN | PTD | M1 },
> + /* kpd_row2 */
> + { KPD_ROW5 , IEN | PTD | M1 },
> + /* kpd_row3 */
> + { KPD_ROW0 , IEN | PTD | M1 },
> + /* kpd_row4 */
> + { KPD_ROW1 , IEN | PTD | M1 },
> + /* kpd_row5 */
> + { KPD_ROW2 , IEN | PTD | M1 },
> + /* usba0_otg_ce */
> + { USBA0_OTG_CE , PTU | M0 },
> + /* usba0_otg_dp */
> + { USBA0_OTG_DP , M0 },
> + /* usba0_otg_dm */
> + { USBA0_OTG_DM , M0 },
> + /* safe_mode */
> + { FREF_CLK1_OUT , IEN | PTD | M7 },
> + /* fref_clk2_out */
> + { FREF_CLK2_OUT , M0 },
> + /* sys_nirq1 */
> + { SYS_NIRQ1 , WAKEUP_EN | IEN | PTU | M0 },
> + /* sys_nirq2 */ /* audio_irq */
> + { SYS_NIRQ2 , IEN | PTU | M0 },
> + /* sys_boot0 */
> + { SYS_BOOT0 , IEN | PTD | M0 },
> + /* sys_boot1 */
> + { SYS_BOOT1 , IEN | PTD | M0 },
> + /* sys_boot2 */
> + { SYS_BOOT2 , IEN | PTD | M0 },
> + /* sys_boot3 */
> + { SYS_BOOT3 , IEN | PTD | M0 },
> + /* sys_boot4 */
> + { SYS_BOOT4 , IEN | PTD | M0 },
> + /* sys_boot5 */
> + { SYS_BOOT5 , IEN | PTD | M0 },
> + /* dpm_emu0 */
> + { DPM_EMU0 , IEN | PTU | M0 },
> + /* gpio_12 */ /* lcd_avdd_en */
> + { DPM_EMU1 , IEN | M3 },
> + /* safe_mode */
> + { DPM_EMU2 , IEN | PTD | M7 },
> + /* dispc2_data10 */
> + { DPM_EMU3 , M5 },
> + /* dispc2_data9 */
> + { DPM_EMU4 , M5 },
> + /* dispc2_data16 */
> + { DPM_EMU5 , M5 },
> + /* dispc2_data17 */
> + { DPM_EMU6 , M5 },
> + /* dispc2_hsync */
> + { DPM_EMU7 , M5 },
> + /* dispc2_pclk */
> + { DPM_EMU8 , M5 },
> + /* dispc2_vsync */
> + { DPM_EMU9 , M5 },
> + /* dispc2_de */
> + { DPM_EMU10 , M5 },
> + /* dispc2_data8 */
> + { DPM_EMU11 , M5 },
> + /* dispc2_data7 */
> + { DPM_EMU12 , M5 },
> + /* dispc2_data6 */
> + { DPM_EMU13 , M5 },
> + /* dispc2_data5 */
> + { DPM_EMU14 , M5 },
> + /* dispc2_data4 */
> + { DPM_EMU15 , M5 },
> + /* dispc2_data3 */
> + { DPM_EMU16 , M5 },
> + /* dispc2_data2 */
> + { DPM_EMU17 , M5 },
> + /* dispc2_data1 */
> + { DPM_EMU18 , M5 },
> + /* dispc2_data0 */
> + { DPM_EMU19 , M5 },
> + /* safe_mode */
> + { CSI22_DX2 , IEN | PTD | M7 },
> + /* safe_mode */
> + { CSI22_DY2 , IEN | PTD | M7 },
> +};
> +
> +static const struct pad_conf_entry wkup_padconf_array[] = {
> + /* sr_scl */
> + { SR_SCL , IEN },
> + /* sr_sda */
> + { SR_SDA , IEN },
> + /* fref_clk0_out */
> + { FREF_CLK0_OUT , M0 },
> + /* gpio_wk30 */
> + { FREF_CLK3_REQ , M3 },
> + /* gpio_wk7 */ /* tps62361_vsel0 */
> + { FREF_CLK4_REQ , IEN | PTU | M3 },
> +};
> +
> +void set_muxconf_regs(void){
> + omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_CORE,
> + core_padconf_array, ARRAY_SIZE(core_padconf_array));
> + omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP,
> + wkup_padconf_array, ARRAY_SIZE(wkup_padconf_array));
> +
> + /* gpio_wk7 is used for controlling TPS on 4460 */
> + if (omap4_revision() >= OMAP4460_ES1_0) {
> + writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + FREF_CLK4_REQ);
> + /* Enable GPIO-1 clocks before TPS initialization */
> + omap4_enable_gpio1_wup_clocks();
> + }
> +}
> diff --git a/arch/arm/boards/archosg9/mux.h b/arch/arm/boards/archosg9/mux.h
> new file mode 100644
> index 0000000..97297b6
> --- /dev/null
> +++ b/arch/arm/boards/archosg9/mux.h
> @@ -0,0 +1,6 @@
> +#ifndef _MUX_H
> +#define _MUX_H
> +
> +void set_muxconf_regs(void);
> +
> +#endif /* _MUX_H */
> diff --git a/arch/arm/configs/archosg9_defconfig b/arch/arm/configs/archosg9_defconfig
> new file mode 100644
> index 0000000..e598258
> --- /dev/null
> +++ b/arch/arm/configs/archosg9_defconfig
> @@ -0,0 +1,70 @@
> +CONFIG_MACH_ARCHOSG9=y
> +CONFIG_ARCH_OMAP=y
> +CONFIG_ARCH_OMAP4=y
> +CONFIG_AEABI=y
> +# CONFIG_MACH_DO_LOWLEVEL_INIT is not set
> +CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
> +CONFIG_ARM_UNWIND=y
> +# CONFIG_MMU is not set
> +CONFIG_OMAP4_USBBOOT=y
> +CONFIG_TEXT_BASE=0xa0000000
> +CONFIG_MALLOC_BASE=0x90000000
> +CONFIG_MALLOC_SIZE=0x10000000
> +CONFIG_KALLSYMS=y
> +CONFIG_PROMPT="barebox> "
> +CONFIG_LONGHELP=y
> +CONFIG_GLOB=y
> +CONFIG_HUSH_FANCY_PROMPT=y
> +CONFIG_CMDLINE_EDITING=y
> +CONFIG_AUTO_COMPLETE=y
> +# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
> +CONFIG_CONSOLE_ACTIVATE_ALL=y
> +# CONFIG_TIMESTAMP is not set
> +CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
> +CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv-2 arch/arm/boards/archosg9/env"
> +CONFIG_CMD_EDIT=y
> +CONFIG_CMD_SLEEP=y
> +CONFIG_CMD_SAVEENV=y
> +CONFIG_CMD_EXPORT=y
> +CONFIG_CMD_PRINTENV=y
> +CONFIG_CMD_READLINE=y
> +CONFIG_CMD_TIME=y
> +CONFIG_CMD_ECHO_E=y
> +CONFIG_CMD_LOADB=y
> +CONFIG_CMD_IOMEM=y
> +CONFIG_CMD_FLASH=y
> +CONFIG_CMD_MD5SUM=y
> +CONFIG_CMD_SHA1SUM=y
> +CONFIG_CMD_SHA224SUM=y
> +CONFIG_CMD_SHA256SUM=y
> +CONFIG_CMD_BOOTM_SHOW_TYPE=y
> +CONFIG_CMD_BOOTM_VERBOSE=y
> +CONFIG_CMD_BOOTM_INITRD=y
> +CONFIG_CMD_BOOTM_OFTREE=y
> +CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
> +CONFIG_CMD_BOOTM_AIMAGE=y
> +CONFIG_CMD_RESET=y
> +CONFIG_CMD_GO=y
> +CONFIG_CMD_TIMEOUT=y
> +CONFIG_CMD_PARTITION=y
> +CONFIG_CMD_MAGICVAR=y
> +CONFIG_CMD_MAGICVAR_HELP=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_UNCOMPRESS=y
> +CONFIG_CMD_I2C=y
> +CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT=y
> +CONFIG_DRIVER_SERIAL_NS16550=y
> +CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
> +CONFIG_BAUDRATE=1000000
> +# CONFIG_SPI is not set
> +CONFIG_I2C=y
> +CONFIG_I2C_OMAP=y
> +CONFIG_I2C_TWLCORE=y
> +CONFIG_I2C_TWL6030=y
> +CONFIG_MCI=y
> +CONFIG_MCI_STARTUP=y
> +CONFIG_MCI_OMAP_HSMMC=y
> +CONFIG_FS_FAT=y
> +CONFIG_FS_FAT_WRITE=y
> +CONFIG_FS_FAT_LFN=y
> +CONFIG_FS_OMAP4_USBBOOT=y
> diff --git a/arch/arm/configs/archosg9_xload_defconfig b/arch/arm/configs/archosg9_xload_defconfig
> new file mode 100644
> index 0000000..6c6782f
> --- /dev/null
> +++ b/arch/arm/configs/archosg9_xload_defconfig
> @@ -0,0 +1,24 @@
> +CONFIG_MACH_ARCHOSG9=y
> +CONFIG_ARCH_OMAP=y
> +CONFIG_ARCH_OMAP4=y
> +# CONFIG_OMAP_GPMC is not set
> +CONFIG_OMAP_BUILD_IFT=y
> +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0xC000
> +CONFIG_AEABI=y
> +CONFIG_OMAP4_USBBOOT=y
> +# CONFIG_CMD_ARM_CPUINFO is not set
> +CONFIG_TEXT_BASE=0x40300000
> +CONFIG_MEMORY_LAYOUT_FIXED=y
> +CONFIG_STACK_BASE=0x8f000000
> +CONFIG_MALLOC_BASE=0x84000000
> +CONFIG_MALLOC_SIZE=0x2000000
> +CONFIG_SHELL_NONE=y
> +# CONFIG_ERRNO_MESSAGES is not set
> +# CONFIG_TIMESTAMP is not set
> +# CONFIG_CONSOLE_FULL is not set
> +# CONFIG_DEFAULT_ENVIRONMENT is not set
> +CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT=y
> +# CONFIG_SPI is not set
> +# CONFIG_FS_RAMFS is not set
> +# CONFIG_FS_DEVFS is not set
> +CONFIG_FS_OMAP4_USBBOOT=y
> diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
> index b3dd6a4..da39530 100644
> --- a/arch/arm/mach-omap/Kconfig
> +++ b/arch/arm/mach-omap/Kconfig
> @@ -92,6 +92,7 @@ config OMAP4_USBBOOT
> Please read oamp4_usb_booting.txt for more information.
>
> config BOARDINFO
> + default "Archos G9" if MACH_ARCHOSG9
> default "Texas Instrument's SDP343x" if MACH_OMAP343xSDP
> default "Texas Instrument's Beagle" if MACH_BEAGLE
> default "Texas Instrument's OMAP3EVM" if MACH_OMAP3EVM
> @@ -131,6 +132,14 @@ config MACH_PANDA
> help
> Say Y here if you are using OMAP4 Panda board
>
> +config MACH_ARCHOSG9
> + bool "Archos G9 tablets"
> + select HAVE_NOSHELL
> + select MACH_HAS_LOWLEVEL_INIT
> + depends on ARCH_OMAP4
> + help
> + Say Y here if you are using OMAP4-based Archos G9 tablet
> +
> config MACH_PCM049
> bool "Phytec phyCORE pcm049"
> select HAVE_NOSHELL
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^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 14/14] Add support for Archos G9 tablet
2012-10-19 11:10 ` Jan Weitzel
@ 2012-10-21 1:00 ` vj
2012-10-22 6:50 ` Jan Weitzel
0 siblings, 1 reply; 22+ messages in thread
From: vj @ 2012-10-21 1:00 UTC (permalink / raw)
To: J.Weitzel; +Cc: barebox
On Fri, Oct 19, 2012 at 1:10 PM, Jan Weitzel <J.Weitzel@phytec.de> wrote:
>> diff --git a/arch/arm/boards/archosg9/lowlevel.c b/arch/arm/boards/archosg9/lowlevel.c
>> new file mode 100644
>> index 0000000..fa5be1d
>> --- /dev/null
>> +++ b/arch/arm/boards/archosg9/lowlevel.c
>> @@ -0,0 +1,79 @@
>> +/*
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <common.h>
>> +#include <io.h>
>> +#include <init.h>
>> +#include <mach/omap4-mux.h>
>> +#include <mach/omap4-silicon.h>
>> +#include <mach/omap4-clock.h>
>> +#include <mach/syslib.h>
>> +#include <asm/barebox-arm.h>
>> +#include <asm/barebox-arm-head.h>
>> +#include "mux.h"
>> +
>> +#define TPS62361_VSEL0_GPIO 7
>> +
>> +static const struct ddr_regs ddr_regs_400_mhz_2cs = {
>> + .tim1 = 0x10EB0662,
>> + .tim2 = 0x20370DD2,
>> + .tim3 = 0x00B1C33F,
>> + .phy_ctrl_1 = 0x849FF408,
>> + .ref_ctrl = 0x00000618,
>> + .config_init = 0x80000EB9,
>> + .config_final = 0x80001AB9,
>> + .zq_config = 0xD00B3215,
>> + .mr1 = 0x83,
>> + .mr2 = 0x4
>> +};
>> +
>> +static noinline void archosg9_init_lowlevel(void)
>> +{
>> + struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
>> + struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU600;
> This if OPP100 for 4430, for 4460 OPP100 defines 700MHz.
>> + struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
>> + struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
>> + struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
>> + struct dpll_param usb = OMAP4_USB_DPLL_PARAM_19M2;
>> +
>> + writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
>> +
>> + /* Configure all DPLL's at 100% OPP */
>> + omap4_configure_mpu_dpll(&mpu);
>> + omap4_configure_iva_dpll(&iva);
>> + omap4_configure_per_dpll(&per);
>> + omap4_configure_abe_dpll(&abe);
>> + omap4_configure_usb_dpll(&usb);
>> +
>> + /* Enable all clocks */
>> + omap4_enable_all_clocks();
>> +
>> + set_muxconf_regs();
>> +
>> + omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
>> +
>> + /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
>> + omap4_scale_vcores(TPS62361_VSEL0_GPIO);
> According to TIs DM the sequence for going into a higher OPP is to first
> raise the voltage. I saw this is also wrong on pandaboard.
> They also say rise core freq before mpu freq so the order should be
> omap4_scale_vcores
> omap4_ddr_init
> omap4_configure_mpu_dpll
>
> I'll fix and test the order on PCM049
>
> Jan
The only way I could make it work on archosG9 is with this order:
set_muxconf_regs();
writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
omap4_enable_all_clocks();
omap4_scale_vcores(TPS62361_VSEL0_GPIO);
omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
omap4_configure_mpu_dpll(&mpu);
...
Is this correct? That is, enable_all_clocks can be done before scale_vcores?
It will depend on the default clock frequencies, I think.
Vicente
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^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 14/14] Add support for Archos G9 tablet
2012-10-21 1:00 ` vj
@ 2012-10-22 6:50 ` Jan Weitzel
0 siblings, 0 replies; 22+ messages in thread
From: Jan Weitzel @ 2012-10-22 6:50 UTC (permalink / raw)
To: vj; +Cc: barebox
Am Sonntag, den 21.10.2012, 03:00 +0200 schrieb vj:
> On Fri, Oct 19, 2012 at 1:10 PM, Jan Weitzel <J.Weitzel@phytec.de> wrote:
> >> diff --git a/arch/arm/boards/archosg9/lowlevel.c b/arch/arm/boards/archosg9/lowlevel.c
> >> new file mode 100644
> >> index 0000000..fa5be1d
> >> --- /dev/null
> >> +++ b/arch/arm/boards/archosg9/lowlevel.c
> >> @@ -0,0 +1,79 @@
> >> +/*
> >> + * This program is free software; you can redistribute it and/or
> >> + * modify it under the terms of the GNU General Public License as
> >> + * published by the Free Software Foundation; either version 2 of
> >> + * the License, or (at your option) any later version.
> >> + *
> >> + * This program is distributed in the hope that it will be useful,
> >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> >> + * GNU General Public License for more details.
> >> + */
> >> +
> >> +#include <common.h>
> >> +#include <io.h>
> >> +#include <init.h>
> >> +#include <mach/omap4-mux.h>
> >> +#include <mach/omap4-silicon.h>
> >> +#include <mach/omap4-clock.h>
> >> +#include <mach/syslib.h>
> >> +#include <asm/barebox-arm.h>
> >> +#include <asm/barebox-arm-head.h>
> >> +#include "mux.h"
> >> +
> >> +#define TPS62361_VSEL0_GPIO 7
> >> +
> >> +static const struct ddr_regs ddr_regs_400_mhz_2cs = {
> >> + .tim1 = 0x10EB0662,
> >> + .tim2 = 0x20370DD2,
> >> + .tim3 = 0x00B1C33F,
> >> + .phy_ctrl_1 = 0x849FF408,
> >> + .ref_ctrl = 0x00000618,
> >> + .config_init = 0x80000EB9,
> >> + .config_final = 0x80001AB9,
> >> + .zq_config = 0xD00B3215,
> >> + .mr1 = 0x83,
> >> + .mr2 = 0x4
> >> +};
> >> +
> >> +static noinline void archosg9_init_lowlevel(void)
> >> +{
> >> + struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
> >> + struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU600;
> > This if OPP100 for 4430, for 4460 OPP100 defines 700MHz.
> >> + struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
> >> + struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
> >> + struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
> >> + struct dpll_param usb = OMAP4_USB_DPLL_PARAM_19M2;
> >> +
> >> + writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
> >> +
> >> + /* Configure all DPLL's at 100% OPP */
> >> + omap4_configure_mpu_dpll(&mpu);
> >> + omap4_configure_iva_dpll(&iva);
> >> + omap4_configure_per_dpll(&per);
> >> + omap4_configure_abe_dpll(&abe);
> >> + omap4_configure_usb_dpll(&usb);
> >> +
> >> + /* Enable all clocks */
> >> + omap4_enable_all_clocks();
> >> +
> >> + set_muxconf_regs();
> >> +
> >> + omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
> >> +
> >> + /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
> >> + omap4_scale_vcores(TPS62361_VSEL0_GPIO);
> > According to TIs DM the sequence for going into a higher OPP is to first
> > raise the voltage. I saw this is also wrong on pandaboard.
> > They also say rise core freq before mpu freq so the order should be
> > omap4_scale_vcores
> > omap4_ddr_init
> > omap4_configure_mpu_dpll
> >
> > I'll fix and test the order on PCM049
> >
> > Jan
>
> The only way I could make it work on archosG9 is with this order:
> set_muxconf_regs();
> writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
> omap4_enable_all_clocks();
> omap4_scale_vcores(TPS62361_VSEL0_GPIO);
> omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
> omap4_configure_mpu_dpll(&mpu);
> ...
I think you need al least omap4_enable_gpio1_wup_clocks for using TPS62361_VSEL0_GPIO.
Jan
> Is this correct? That is, enable_all_clocks can be done before scale_vcores?
> It will depend on the default clock frequencies, I think.
>
> Vicente
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^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 00/14] archosg9: add support for tablet
2012-10-08 22:55 [PATCH 00/14] archosg9: add support for tablet Vicente
` (13 preceding siblings ...)
2012-10-08 22:55 ` [PATCH 14/14] Add support for Archos G9 tablet Vicente
@ 2012-10-10 7:40 ` Sascha Hauer
[not found] ` <CAAMcf8D0Xn6aWztkD=8dnv3P1qxNgxSV-2Q37kGOaRsOQE7xVA@mail.gmail.com>
14 siblings, 1 reply; 22+ messages in thread
From: Sascha Hauer @ 2012-10-10 7:40 UTC (permalink / raw)
To: Vicente; +Cc: barebox
On Tue, Oct 09, 2012 at 12:55:10AM +0200, Vicente wrote:
> This patch series is the same as before except for:
> [PATCH 03/13] ARM: ensure irqs are disabled
> imported irq handling from linux
> [PATCH 07/13] uimage: improve transfer speed
> solved a compile warning
I applied most of this series, please check the result in the -next
branch.
>
> Vicente (14):
> twl6030: add debug info
> omap4: add rename definitions to match datasheet
> ARM: import irq handling from linux
> ARM: ensure irqs are disabled
I haven't applied these two. I don't think it's worth adding the linux
irq headers. I liked the last version better which only missed the
define for a flag.
I just posted a series making multiple ARM architectures possible, so
we would need a arm_architecture() around the call to disable the irqs,
not an ifdef. You could either change this in a new version or give
me some time until I do it.
> omap: revert gpiolib
Of course haven't applied this one
> omap4: add usb boot source
> bootm: close open files
> uimage: improve transfer speed
Haven't applied this one as you haven't answered my question how
much improvement (and on which media) we get.
> fs: improve robustness
> omap4: add support for booting cpu from usb
> omap4: add serial communications over usb boot
> omap4: add filesystem support over usb boot
> omap4: add support for loading second stage from usb
> Add support for Archos G9 tablet
Sascha
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^ permalink raw reply [flat|nested] 22+ messages in thread