[PATCH 0/8] atmtel: fix spi driver + rm9200

[PATCH 0/8] atmtel: fix spi driver + rm9200

[Jean-Christophe PLAGNIOL-VILLARD]

HI,

The following changes since commit d74bef2b04a3ccf7339ba916e56830bb2feae957:

  mount: add compatibility to old mount command (2012-11-02 21:26:29 +0100)

are available in the git repository at:

  git://git.jcrosoft.org/barebox.git tags/atmel_spi_fix

for you to fetch changes up to 7e7b7aa81cdf7e47a8f828818f1e453a27046c38:

  at91rm9200: fix spi cs support (2012-11-06 04:39:09 +0800)

----------------------------------------------------------------
atmel spi support fix

The current drivers for atmel have a lot of issues but we are lucky
enough if you use it one device + one master instance it will work on
most of the spi device

but this will not work on mmc spi or multi-master instance or multi-device

so now fix all those issues
 - fix the cs support
 - fix setup setup support
 - do not call setup before each transfert
 - add sanity check

now the atmel spi work on rm9200, mmc spi and at24, at45, eeprom

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

----------------------------------------------------------------
Jean-Christophe PLAGNIOL-VILLARD (8):
      atmel_spi: use device id as bus num
      atmel_spi: split transfert to atmel_spi_do_xfer
      atmel_spi: after setup the cs need to be disable
      atmel_spi: add sanity check in setup
      atmel_spi: fix cs support
      atmel_spi: drop setup during transfer
      atmel_spi: add cs change support
      at91rm9200: fix spi cs support

 arch/arm/mach-at91/at91rm9200_devices.c |    7 ++++++-
 drivers/spi/atmel_spi.c                 |  260 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------------------
 2 files changed, 196 insertions(+), 71 deletions(-)

Best Regards,
J.

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[PATCH 1/8] atmel_spi: use device id as bus num

[Jean-Christophe PLAGNIOL-VILLARD]

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 drivers/spi/atmel_spi.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 43aec8e..3375f81 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -265,6 +265,7 @@ static int atmel_spi_probe(struct device_d *dev)
 
 	master = &as->master;
 	master->dev = dev;
+	master->bus_num = dev->id;
 
 	as->clk = clk_get(dev, "spi_clk");
 	if (IS_ERR(as->clk)) {
-- 
1.7.10.4


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[PATCH 2/8] atmel_spi: split transfert to atmel_spi_do_xfer

[Jean-Christophe PLAGNIOL-VILLARD]

This make the code mre readable

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 drivers/spi/atmel_spi.c |   89 ++++++++++++++++++++++++++---------------------
 1 file changed, 49 insertions(+), 40 deletions(-)

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 3375f81..afbca9f 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -178,13 +178,54 @@ static int atmel_spi_xchg(struct atmel_spi *as, u32 tx_val)
 	return spi_readl(as, RDR) & 0xffff;
 }
 
+static int atmel_spi_do_xfer(struct spi_device *spi, struct atmel_spi *as,
+			     struct spi_transfer *t)
+{
+	unsigned int bits = spi->bits_per_word;
+	u32 tx_val;
+	int i = 0, rx_val;
+
+	if (bits <= 8) {
+		const u8 *txbuf = t->tx_buf;
+		u8 *rxbuf = t->rx_buf;
+
+		while (i < t->len) {
+			tx_val = txbuf ? txbuf[i] : 0;
+
+			rx_val = atmel_spi_xchg(as, tx_val);
+			if (rx_val < 0)
+				return rx_val;
+
+			if (rxbuf)
+				rxbuf[i] = rx_val;
+			i++;
+		}
+	} else if (bits <= 16) {
+		const u16 *txbuf = t->tx_buf;
+		u16 *rxbuf = t->rx_buf;
+
+		while (i < t->len >> 1) {
+			tx_val = txbuf ? txbuf[i] : 0;
+
+			rx_val = atmel_spi_xchg(as, tx_val);
+			if (rx_val < 0)
+				return rx_val;
+
+			if (rxbuf)
+				rxbuf[i] = rx_val;
+			i++;
+		}
+	}
+
+	return t->len;
+}
+
 static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *mesg)
 {
 	int ret;
 	struct spi_master *master	= spi->master;
 	struct atmel_spi *as		= to_atmel_spi(master);
 	struct spi_transfer *t		= NULL;
-	unsigned int bits		= spi->bits_per_word;
 
 	mesg->actual_length = 0;
 	ret = master->setup(spi);
@@ -203,47 +244,15 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *mesg)
 	}
 #endif
 	atmel_spi_chipselect(spi, as, 1);
+
 	list_for_each_entry(t, &mesg->transfers, transfer_list) {
-		u32 tx_val;
-		int i = 0, rx_val;
-
-		mesg->actual_length += t->len;
-		if (bits <= 8) {
-			const u8 *txbuf = t->tx_buf;
-			u8 *rxbuf = t->rx_buf;
-
-			while (i < t->len) {
-				tx_val = txbuf ? txbuf[i] : 0;
-
-				rx_val = atmel_spi_xchg(as, tx_val);
-				if (rx_val < 0) {
-					ret = rx_val;
-					goto out;
-				}
-
-				if (rxbuf)
-					rxbuf[i] = rx_val;
-				i++;
-			}
-		} else if (bits <= 16) {
-			const u16 *txbuf = t->tx_buf;
-			u16 *rxbuf = t->rx_buf;
-
-			while (i < t->len >> 1) {
-				tx_val = txbuf ? txbuf[i] : 0;
-
-				rx_val = atmel_spi_xchg(as, tx_val);
-				if (rx_val < 0) {
-					ret = rx_val;
-					goto out;
-				}
-
-				if (rxbuf)
-					rxbuf[i] = rx_val;
-				i++;
-			}
-		}
+
+		ret = atmel_spi_do_xfer(spi, as, t);
+		if (ret < 0)
+			goto out;
+		mesg->actual_length += ret;
 	}
+
 out:
 	atmel_spi_chipselect(spi, as, 0);
 	return ret;
-- 
1.7.10.4


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Re: [PATCH 2/8] atmel_spi: split transfert to atmel_spi_do_xfer

[Thomas Petazzoni]

Hello,

Just some stupid nitpicks:

atmel_spi: split transfert to atmel_spi_do_xfer

should probably be:

atmel_spi: move transfer code into a separate atmel_spi_do_xfer function

On Tue,  6 Nov 2012 20:33:30 +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
> This make the code mre readable

       makes         more

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

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[PATCH 3/8] atmel_spi: after setup the cs need to be disable

[Jean-Christophe PLAGNIOL-VILLARD]

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 drivers/spi/atmel_spi.c |   29 ++++++++++++++++-------------
 1 file changed, 16 insertions(+), 13 deletions(-)

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index afbca9f..dbf6af8 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -66,6 +66,18 @@ static inline bool atmel_spi_is_v2(void)
 	return !cpu_is_at91rm9200();
 }
 
+static void atmel_spi_chipselect(struct spi_device *spi, struct atmel_spi *as, int on)
+{
+	struct spi_master *master = &as->master;
+	int cs_pin;
+	int val = ((spi->mode & SPI_CS_HIGH) != 0) == on;
+
+	BUG_ON(spi->chip_select >= master->num_chipselect);
+	cs_pin = as->cs_pins[spi->chip_select];
+
+	gpio_direction_output(cs_pin, val);
+}
+
 static int atmel_spi_setup(struct spi_device *spi)
 {
 	struct spi_master	*master = spi->master;
@@ -78,7 +90,7 @@ static int atmel_spi_setup(struct spi_device *spi)
 	if (spi->controller_data) {
 		csr = (u32)spi->controller_data;
 		spi_writel(as, CSR0, csr);
-		return 0;
+		goto out;
 	}
 
 	dev_dbg(master->dev, "%s mode 0x%08x bits_per_word: %d speed: %d\n",
@@ -140,19 +152,10 @@ static int atmel_spi_setup(struct spi_device *spi)
 	if (bits > 0)
 		spi->controller_data = (void *)csr;
 
-	return 0;
-}
-
-static void atmel_spi_chipselect(struct spi_device *spi, struct atmel_spi *as, int on)
-{
-	struct spi_master *master = &as->master;
-	int cs_pin;
-	int val = ((spi->mode & SPI_CS_HIGH) != 0) == on;
-
-	BUG_ON(spi->chip_select >= master->num_chipselect);
-	cs_pin = as->cs_pins[spi->chip_select];
+out:
+	atmel_spi_chipselect(spi, as, 0);
 
-	gpio_direction_output(cs_pin, val);
+	return 0;
 }
 
 static int atmel_spi_xchg(struct atmel_spi *as, u32 tx_val)
-- 
1.7.10.4


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[PATCH 4/8] atmel_spi: add sanity check in setup

[Jean-Christophe PLAGNIOL-VILLARD]

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 drivers/spi/atmel_spi.c |   14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index dbf6af8..17b91eb 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -87,6 +87,20 @@ static int atmel_spi_setup(struct spi_device *spi)
 	unsigned int		bits = spi->bits_per_word;
 	unsigned long		bus_hz;
 
+	if (spi->chip_select > spi->master->num_chipselect) {
+		dev_dbg(&spi->dev,
+				"setup: invalid chipselect %u (%u defined)\n",
+				spi->chip_select, spi->master->num_chipselect);
+		return -EINVAL;
+	}
+
+	if (bits < 8 || bits > 16) {
+		dev_dbg(&spi->dev,
+				"setup: invalid bits_per_word %u (8 to 16)\n",
+				bits);
+		return -EINVAL;
+	}
+
 	if (spi->controller_data) {
 		csr = (u32)spi->controller_data;
 		spi_writel(as, CSR0, csr);
-- 
1.7.10.4


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[PATCH 5/8] atmel_spi: fix cs support

[Jean-Christophe PLAGNIOL-VILLARD]

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 drivers/spi/atmel_spi.c |  122 ++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 100 insertions(+), 22 deletions(-)

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 17b91eb..ba1e467 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -66,16 +66,104 @@ static inline bool atmel_spi_is_v2(void)
 	return !cpu_is_at91rm9200();
 }
 
-static void atmel_spi_chipselect(struct spi_device *spi, struct atmel_spi *as, int on)
+/*
+ * Earlier SPI controllers (e.g. on at91rm9200) have a design bug whereby
+ * they assume that spi slave device state will not change on deselect, so
+ * that automagic deselection is OK.  ("NPCSx rises if no data is to be
+ * transmitted")  Not so!  Workaround uses nCSx pins as GPIOs; or newer
+ * controllers have CSAAT and friends.
+ *
+ * Since the CSAAT functionality is a bit weird on newer controllers as
+ * well, we use GPIO to control nCSx pins on all controllers, updating
+ * MR.PCS to avoid confusing the controller.  Using GPIOs also lets us
+ * support active-high chipselects despite the controller's belief that
+ * only active-low devices/systems exists.
+ *
+ * However, at91rm9200 has a second erratum whereby nCS0 doesn't work
+ * right when driven with GPIO.  ("Mode Fault does not allow more than one
+ * Master on Chip Select 0.")  No workaround exists for that ... so for
+ * nCS0 on that chip, we (a) don't use the GPIO, (b) can't support CS_HIGH,
+ * and (c) will trigger that first erratum in some cases.
+ *
+ * TODO: Test if the atmel_spi_is_v2() branch below works on
+ * AT91RM9200 if we use some other register than CSR0. However, don't
+ * do this unconditionally since AP7000 has an errata where the BITS
+ * field in CSR0 overrides all other CSRs.
+ */
+
+static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
 {
 	struct spi_master *master = &as->master;
-	int cs_pin;
-	int val = ((spi->mode & SPI_CS_HIGH) != 0) == on;
+	int npcs_pin;
+	unsigned active = spi->mode & SPI_CS_HIGH;
+	u32 mr, csr;
 
 	BUG_ON(spi->chip_select >= master->num_chipselect);
-	cs_pin = as->cs_pins[spi->chip_select];
+	npcs_pin = as->cs_pins[spi->chip_select];
+
+	csr = (u32)spi->controller_data;
 
-	gpio_direction_output(cs_pin, val);
+	if (atmel_spi_is_v2()) {
+		/*
+		 * Always use CSR0. This ensures that the clock
+		 * switches to the correct idle polarity before we
+		 * toggle the CS.
+		 */
+		spi_writel(as, CSR0, csr);
+		spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(MODFDIS)
+				| SPI_BIT(MSTR));
+		mr = spi_readl(as, MR);
+		gpio_set_value(npcs_pin, active);
+	} else {
+		u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0;
+		int i;
+		u32 csr;
+
+		/* Make sure clock polarity is correct */
+		for (i = 0; i < spi->master->num_chipselect; i++) {
+			csr = spi_readl(as, CSR0 + 4 * i);
+			if ((csr ^ cpol) & SPI_BIT(CPOL))
+				spi_writel(as, CSR0 + 4 * i,
+						csr ^ SPI_BIT(CPOL));
+		}
+
+		mr = spi_readl(as, MR);
+		mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr);
+		if (npcs_pin != AT91_PIN_PA3)
+			gpio_set_value(npcs_pin, active);
+		spi_writel(as, MR, mr);
+	}
+
+	dev_dbg(&spi->dev, "activate %u%s, mr %08x\n",
+			npcs_pin, active ? " (high)" : "",
+			mr);
+}
+
+static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi)
+{
+	struct spi_master *master = &as->master;
+	int npcs_pin;
+	unsigned active = spi->mode & SPI_CS_HIGH;
+	u32 mr;
+
+	BUG_ON(spi->chip_select >= master->num_chipselect);
+	npcs_pin = as->cs_pins[spi->chip_select];
+
+	/* only deactivate *this* device; sometimes transfers to
+	 * another device may be active when this routine is called.
+	 */
+	mr = spi_readl(as, MR);
+	if (~SPI_BFEXT(PCS, mr) & (1 << spi->chip_select)) {
+		mr = SPI_BFINS(PCS, 0xf, mr);
+		spi_writel(as, MR, mr);
+	}
+
+	dev_dbg(&spi->dev, "DEactivate %u%s, mr %08x\n",
+			npcs_pin, active ? " (low)" : "",
+			mr);
+
+	if (atmel_spi_is_v2() || npcs_pin != AT91_PIN_PA3)
+		gpio_set_value(npcs_pin, !active);
 }
 
 static int atmel_spi_setup(struct spi_device *spi)
@@ -101,12 +189,6 @@ static int atmel_spi_setup(struct spi_device *spi)
 		return -EINVAL;
 	}
 
-	if (spi->controller_data) {
-		csr = (u32)spi->controller_data;
-		spi_writel(as, CSR0, csr);
-		goto out;
-	}
-
 	dev_dbg(master->dev, "%s mode 0x%08x bits_per_word: %d speed: %d\n",
 			__func__, spi->mode, spi->bits_per_word,
 			spi->max_speed_hz);
@@ -157,17 +239,12 @@ static int atmel_spi_setup(struct spi_device *spi)
 		"setup: %lu Hz bpw %u mode 0x%x -> csr%d %08x\n",
 		bus_hz / scbr, bits, spi->mode, spi->chip_select, csr);
 
-	spi_writel(as, CSR0, csr);
+	spi->controller_data = (void *)csr;
 
-	/*
-	 * store the csr-setting when bits are defined. This happens usually
-	 * after the specific spi_device driver has been probed.
-	 */
-	if (bits > 0)
-		spi->controller_data = (void *)csr;
+	cs_deactivate(as, spi);
 
-out:
-	atmel_spi_chipselect(spi, as, 0);
+	if (!atmel_spi_is_v2())
+		spi_writel(as, CSR0 + 4 * spi->chip_select, csr);
 
 	return 0;
 }
@@ -260,7 +337,8 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *mesg)
 			t, t->len, t->tx_buf, t->rx_buf);
 	}
 #endif
-	atmel_spi_chipselect(spi, as, 1);
+
+	cs_activate(as, spi);
 
 	list_for_each_entry(t, &mesg->transfers, transfer_list) {
 
@@ -271,7 +349,7 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *mesg)
 	}
 
 out:
-	atmel_spi_chipselect(spi, as, 0);
+	cs_deactivate(as, spi);
 	return ret;
 }
 
-- 
1.7.10.4


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[PATCH 6/8] atmel_spi: drop setup during transfer

[Jean-Christophe PLAGNIOL-VILLARD]

this need to be handle at framework and driver level

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 drivers/spi/atmel_spi.c |    5 -----
 1 file changed, 5 deletions(-)

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index ba1e467..ee0c4b4 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -322,11 +322,6 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *mesg)
 	struct spi_transfer *t		= NULL;
 
 	mesg->actual_length = 0;
-	ret = master->setup(spi);
-	if (ret < 0) {
-		dev_dbg(master->dev, "transfer: master setup failed\n");
-		return ret;
-	}
 
 	dev_dbg(master->dev, "  csr0: %08x\n", spi_readl(as, CSR0));
 
-- 
1.7.10.4


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[PATCH 7/8] atmel_spi: add cs change support

[Jean-Christophe PLAGNIOL-VILLARD]

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 drivers/spi/atmel_spi.c |   24 ++++++++++++++++++++++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index ee0c4b4..793933e 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -320,6 +320,7 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *mesg)
 	struct spi_master *master	= spi->master;
 	struct atmel_spi *as		= to_atmel_spi(master);
 	struct spi_transfer *t		= NULL;
+	unsigned int cs_change;
 
 	mesg->actual_length = 0;
 
@@ -335,15 +336,34 @@ static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *mesg)
 
 	cs_activate(as, spi);
 
+	cs_change = 0;
+
 	list_for_each_entry(t, &mesg->transfers, transfer_list) {
 
+		if (cs_change) {
+			udelay(1);
+			cs_deactivate(as, spi);
+			udelay(1);
+			cs_activate(as, spi);
+		}
+
+		cs_change = t->cs_change;
+
 		ret = atmel_spi_do_xfer(spi, as, t);
 		if (ret < 0)
-			goto out;
+			goto err;
 		mesg->actual_length += ret;
+
+		if (cs_change)
+			cs_activate(as, spi);
 	}
 
-out:
+	if (!cs_change)
+		cs_deactivate(as, spi);
+
+	return 0;
+
+err:
 	cs_deactivate(as, spi);
 	return ret;
 }
-- 
1.7.10.4


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[PATCH 8/8] at91rm9200: fix spi cs support

[Jean-Christophe PLAGNIOL-VILLARD]

the rm9200 have a errata the cs0 must be used via hw cs not gpio

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 arch/arm/mach-at91/at91rm9200_devices.c |    7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 8cb2f57..c9ceef9 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -182,7 +182,12 @@ void at91_add_device_spi(int spi_id, struct at91_spi_platform_data *pdata)
 		cs_pin = pdata->chipselect[i];
 
 		/* enable chip-select pin */
-		if (cs_pin > 0)
+		if (!gpio_is_valid(cs_pin))
+			continue;
+
+		if (cs_pin == AT91_PIN_PA3)
+			at91_set_A_periph(cs_pin, 0);
+		else
 			at91_set_gpio_output(cs_pin, 1);
 	}
 
-- 
1.7.10.4


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Re: [PATCH 0/8] atmtel: fix spi driver + rm9200

[Sascha Hauer]

On Tue, Nov 06, 2012 at 08:30:10PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> HI,
> 
> The following changes since commit d74bef2b04a3ccf7339ba916e56830bb2feae957:
> 
>   mount: add compatibility to old mount command (2012-11-02 21:26:29 +0100)
> 
> are available in the git repository at:
> 
>   git://git.jcrosoft.org/barebox.git tags/atmel_spi_fix
> 
> for you to fetch changes up to 7e7b7aa81cdf7e47a8f828818f1e453a27046c38:
> 
>   at91rm9200: fix spi cs support (2012-11-06 04:39:09 +0800)

Applied, thanks

Sascha

> 
> ----------------------------------------------------------------
> atmel spi support fix
> 
> The current drivers for atmel have a lot of issues but we are lucky
> enough if you use it one device + one master instance it will work on
> most of the spi device
> 
> but this will not work on mmc spi or multi-master instance or multi-device
> 
> so now fix all those issues
>  - fix the cs support
>  - fix setup setup support
>  - do not call setup before each transfert
>  - add sanity check
> 
> now the atmel spi work on rm9200, mmc spi and at24, at45, eeprom
> 
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> 
> ----------------------------------------------------------------
> Jean-Christophe PLAGNIOL-VILLARD (8):
>       atmel_spi: use device id as bus num
>       atmel_spi: split transfert to atmel_spi_do_xfer
>       atmel_spi: after setup the cs need to be disable
>       atmel_spi: add sanity check in setup
>       atmel_spi: fix cs support
>       atmel_spi: drop setup during transfer
>       atmel_spi: add cs change support
>       at91rm9200: fix spi cs support
> 
>  arch/arm/mach-at91/at91rm9200_devices.c |    7 ++++++-
>  drivers/spi/atmel_spi.c                 |  260 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------------------
>  2 files changed, 196 insertions(+), 71 deletions(-)
> 
> Best Regards,
> J.
> 
> _______________________________________________
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> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

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