* [PATCH] mtd: nand: mxs: reset BCH earlier to avoid NAND startup problems
@ 2012-12-05 14:53 Wolfram Sang
2012-12-05 18:37 ` Sascha Hauer
0 siblings, 1 reply; 6+ messages in thread
From: Wolfram Sang @ 2012-12-05 14:53 UTC (permalink / raw)
To: barebox; +Cc: Wolfram Sang
It could happen (1 out of 100 times) that NAND did not start up
correctly after warm rebooting, so barebox could not find its
environment or DMA timed out due to a stalled BCH. When resetting BCH
together with GPMI, the issue could not be observed anymore. We probably
need the consistent state already before sending commands to NAND.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
---
drivers/mtd/nand/nand_mxs.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
index 975a44f..c4509d3 100644
--- a/drivers/mtd/nand/nand_mxs.c
+++ b/drivers/mtd/nand/nand_mxs.c
@@ -1128,6 +1128,7 @@ int mxs_nand_alloc_buffers(struct mxs_nand_info *nand_info)
int mxs_nand_hw_init(struct mxs_nand_info *info)
{
void __iomem *gpmi_regs = (void *)MXS_GPMI_BASE;
+ void __iomem *bch_regs = (void __iomem *)MXS_BCH_BASE;
int i = 0, ret;
u32 val;
@@ -1153,6 +1154,15 @@ int mxs_nand_hw_init(struct mxs_nand_info *info)
if (ret)
return ret;
+ val = readl(gpmi_regs + GPMI_VERSION);
+ info->version = val >> GPMI_VERSION_MINOR_OFFSET;
+
+ /* Reset BCH. Don't use SFTRST on MX23 due to Errata #2847 */
+ ret = mxs_reset_block(bch_regs + BCH_CTRL,
+ info->version == GPMI_VERSION_TYPE_MX23);
+ if (ret)
+ return ret;
+
/*
* Choose NAND mode, set IRQ polarity, disable write protection and
* select BCH ECC.
@@ -1163,9 +1173,6 @@ int mxs_nand_hw_init(struct mxs_nand_info *info)
GPMI_CTRL1_BCH_MODE;
writel(val, gpmi_regs + GPMI_CTRL1);
- val = readl(gpmi_regs + GPMI_VERSION);
- info->version = val >> GPMI_VERSION_MINOR_OFFSET;
-
return 0;
err2:
--
1.7.10.4
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] mtd: nand: mxs: reset BCH earlier to avoid NAND startup problems
2012-12-05 14:53 [PATCH] mtd: nand: mxs: reset BCH earlier to avoid NAND startup problems Wolfram Sang
@ 2012-12-05 18:37 ` Sascha Hauer
2012-12-05 18:42 ` Wolfram Sang
0 siblings, 1 reply; 6+ messages in thread
From: Sascha Hauer @ 2012-12-05 18:37 UTC (permalink / raw)
To: Wolfram Sang; +Cc: barebox
On Wed, Dec 05, 2012 at 03:53:53PM +0100, Wolfram Sang wrote:
> It could happen (1 out of 100 times) that NAND did not start up
> correctly after warm rebooting, so barebox could not find its
> environment or DMA timed out due to a stalled BCH. When resetting BCH
> together with GPMI, the issue could not be observed anymore. We probably
> need the consistent state already before sending commands to NAND.
The subject suggests that the BCH engine is resetted earlier, but
instead of moving the reset this patch adds another reset. Is this
intended?
Sascha
>
> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
> ---
> drivers/mtd/nand/nand_mxs.c | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
> index 975a44f..c4509d3 100644
> --- a/drivers/mtd/nand/nand_mxs.c
> +++ b/drivers/mtd/nand/nand_mxs.c
> @@ -1128,6 +1128,7 @@ int mxs_nand_alloc_buffers(struct mxs_nand_info *nand_info)
> int mxs_nand_hw_init(struct mxs_nand_info *info)
> {
> void __iomem *gpmi_regs = (void *)MXS_GPMI_BASE;
> + void __iomem *bch_regs = (void __iomem *)MXS_BCH_BASE;
> int i = 0, ret;
> u32 val;
>
> @@ -1153,6 +1154,15 @@ int mxs_nand_hw_init(struct mxs_nand_info *info)
> if (ret)
> return ret;
>
> + val = readl(gpmi_regs + GPMI_VERSION);
> + info->version = val >> GPMI_VERSION_MINOR_OFFSET;
> +
> + /* Reset BCH. Don't use SFTRST on MX23 due to Errata #2847 */
> + ret = mxs_reset_block(bch_regs + BCH_CTRL,
> + info->version == GPMI_VERSION_TYPE_MX23);
> + if (ret)
> + return ret;
> +
> /*
> * Choose NAND mode, set IRQ polarity, disable write protection and
> * select BCH ECC.
> @@ -1163,9 +1173,6 @@ int mxs_nand_hw_init(struct mxs_nand_info *info)
> GPMI_CTRL1_BCH_MODE;
> writel(val, gpmi_regs + GPMI_CTRL1);
>
> - val = readl(gpmi_regs + GPMI_VERSION);
> - info->version = val >> GPMI_VERSION_MINOR_OFFSET;
> -
> return 0;
>
> err2:
> --
> 1.7.10.4
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] mtd: nand: mxs: reset BCH earlier to avoid NAND startup problems
2012-12-05 18:37 ` Sascha Hauer
@ 2012-12-05 18:42 ` Wolfram Sang
2012-12-05 18:50 ` Sascha Hauer
0 siblings, 1 reply; 6+ messages in thread
From: Wolfram Sang @ 2012-12-05 18:42 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
[-- Attachment #1.1: Type: text/plain, Size: 1038 bytes --]
On Wed, Dec 05, 2012 at 07:37:32PM +0100, Sascha Hauer wrote:
> On Wed, Dec 05, 2012 at 03:53:53PM +0100, Wolfram Sang wrote:
> > It could happen (1 out of 100 times) that NAND did not start up
> > correctly after warm rebooting, so barebox could not find its
> > environment or DMA timed out due to a stalled BCH. When resetting BCH
> > together with GPMI, the issue could not be observed anymore. We probably
> > need the consistent state already before sending commands to NAND.
>
> The subject suggests that the BCH engine is resetted earlier, but
> instead of moving the reset this patch adds another reset. Is this
> intended?
Yes, I wanted to keep resetting BCH before applying a new layout. Maybe
the subject should have been named "earlier, too,". I can drop the other
check and rerun my tests if this seems overcautios to you.
Thanks,
Wolfram
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] mtd: nand: mxs: reset BCH earlier to avoid NAND startup problems
2012-12-05 18:42 ` Wolfram Sang
@ 2012-12-05 18:50 ` Sascha Hauer
2012-12-05 19:02 ` [PATCH V2] mtd: nand: mxs: reset BCH earlier, too, " Wolfram Sang
0 siblings, 1 reply; 6+ messages in thread
From: Sascha Hauer @ 2012-12-05 18:50 UTC (permalink / raw)
To: Wolfram Sang; +Cc: barebox
On Wed, Dec 05, 2012 at 07:42:10PM +0100, Wolfram Sang wrote:
> On Wed, Dec 05, 2012 at 07:37:32PM +0100, Sascha Hauer wrote:
> > On Wed, Dec 05, 2012 at 03:53:53PM +0100, Wolfram Sang wrote:
> > > It could happen (1 out of 100 times) that NAND did not start up
> > > correctly after warm rebooting, so barebox could not find its
> > > environment or DMA timed out due to a stalled BCH. When resetting BCH
> > > together with GPMI, the issue could not be observed anymore. We probably
> > > need the consistent state already before sending commands to NAND.
> >
> > The subject suggests that the BCH engine is resetted earlier, but
> > instead of moving the reset this patch adds another reset. Is this
> > intended?
>
> Yes, I wanted to keep resetting BCH before applying a new layout. Maybe
> the subject should have been named "earlier, too,". I can drop the other
> check and rerun my tests if this seems overcautios to you.
change the patch or the subject, either way is fine with me.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH V2] mtd: nand: mxs: reset BCH earlier, too, to avoid NAND startup problems
2012-12-05 18:50 ` Sascha Hauer
@ 2012-12-05 19:02 ` Wolfram Sang
2012-12-06 7:43 ` Sascha Hauer
0 siblings, 1 reply; 6+ messages in thread
From: Wolfram Sang @ 2012-12-05 19:02 UTC (permalink / raw)
To: barebox; +Cc: Wolfram Sang
It could happen (1 out of 100 times) that NAND did not start up
correctly after warm rebooting, so barebox could not find its
environment or DMA timed out due to a stalled BCH. When resetting BCH
together with GPMI, the issue could not be observed anymore. We probably
need the consistent state already before sending commands to NAND.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
---
drivers/mtd/nand/nand_mxs.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
index 975a44f..c4509d3 100644
--- a/drivers/mtd/nand/nand_mxs.c
+++ b/drivers/mtd/nand/nand_mxs.c
@@ -1128,6 +1128,7 @@ int mxs_nand_alloc_buffers(struct mxs_nand_info *nand_info)
int mxs_nand_hw_init(struct mxs_nand_info *info)
{
void __iomem *gpmi_regs = (void *)MXS_GPMI_BASE;
+ void __iomem *bch_regs = (void __iomem *)MXS_BCH_BASE;
int i = 0, ret;
u32 val;
@@ -1153,6 +1154,15 @@ int mxs_nand_hw_init(struct mxs_nand_info *info)
if (ret)
return ret;
+ val = readl(gpmi_regs + GPMI_VERSION);
+ info->version = val >> GPMI_VERSION_MINOR_OFFSET;
+
+ /* Reset BCH. Don't use SFTRST on MX23 due to Errata #2847 */
+ ret = mxs_reset_block(bch_regs + BCH_CTRL,
+ info->version == GPMI_VERSION_TYPE_MX23);
+ if (ret)
+ return ret;
+
/*
* Choose NAND mode, set IRQ polarity, disable write protection and
* select BCH ECC.
@@ -1163,9 +1173,6 @@ int mxs_nand_hw_init(struct mxs_nand_info *info)
GPMI_CTRL1_BCH_MODE;
writel(val, gpmi_regs + GPMI_CTRL1);
- val = readl(gpmi_regs + GPMI_VERSION);
- info->version = val >> GPMI_VERSION_MINOR_OFFSET;
-
return 0;
err2:
--
1.7.10.4
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH V2] mtd: nand: mxs: reset BCH earlier, too, to avoid NAND startup problems
2012-12-05 19:02 ` [PATCH V2] mtd: nand: mxs: reset BCH earlier, too, " Wolfram Sang
@ 2012-12-06 7:43 ` Sascha Hauer
0 siblings, 0 replies; 6+ messages in thread
From: Sascha Hauer @ 2012-12-06 7:43 UTC (permalink / raw)
To: Wolfram Sang; +Cc: barebox
On Wed, Dec 05, 2012 at 08:02:47PM +0100, Wolfram Sang wrote:
> It could happen (1 out of 100 times) that NAND did not start up
> correctly after warm rebooting, so barebox could not find its
> environment or DMA timed out due to a stalled BCH. When resetting BCH
> together with GPMI, the issue could not be observed anymore. We probably
> need the consistent state already before sending commands to NAND.
>
> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Applied, thanks
Sascha
> ---
> drivers/mtd/nand/nand_mxs.c | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
> index 975a44f..c4509d3 100644
> --- a/drivers/mtd/nand/nand_mxs.c
> +++ b/drivers/mtd/nand/nand_mxs.c
> @@ -1128,6 +1128,7 @@ int mxs_nand_alloc_buffers(struct mxs_nand_info *nand_info)
> int mxs_nand_hw_init(struct mxs_nand_info *info)
> {
> void __iomem *gpmi_regs = (void *)MXS_GPMI_BASE;
> + void __iomem *bch_regs = (void __iomem *)MXS_BCH_BASE;
> int i = 0, ret;
> u32 val;
>
> @@ -1153,6 +1154,15 @@ int mxs_nand_hw_init(struct mxs_nand_info *info)
> if (ret)
> return ret;
>
> + val = readl(gpmi_regs + GPMI_VERSION);
> + info->version = val >> GPMI_VERSION_MINOR_OFFSET;
> +
> + /* Reset BCH. Don't use SFTRST on MX23 due to Errata #2847 */
> + ret = mxs_reset_block(bch_regs + BCH_CTRL,
> + info->version == GPMI_VERSION_TYPE_MX23);
> + if (ret)
> + return ret;
> +
> /*
> * Choose NAND mode, set IRQ polarity, disable write protection and
> * select BCH ECC.
> @@ -1163,9 +1173,6 @@ int mxs_nand_hw_init(struct mxs_nand_info *info)
> GPMI_CTRL1_BCH_MODE;
> writel(val, gpmi_regs + GPMI_CTRL1);
>
> - val = readl(gpmi_regs + GPMI_VERSION);
> - info->version = val >> GPMI_VERSION_MINOR_OFFSET;
> -
> return 0;
>
> err2:
> --
> 1.7.10.4
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2012-12-06 7:43 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2012-12-05 14:53 [PATCH] mtd: nand: mxs: reset BCH earlier to avoid NAND startup problems Wolfram Sang
2012-12-05 18:37 ` Sascha Hauer
2012-12-05 18:42 ` Wolfram Sang
2012-12-05 18:50 ` Sascha Hauer
2012-12-05 19:02 ` [PATCH V2] mtd: nand: mxs: reset BCH earlier, too, " Wolfram Sang
2012-12-06 7:43 ` Sascha Hauer
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