* [PATCH 0/4] MIPS: introduce ram0 regions register function
@ 2013-01-26 16:52 Antony Pavlov
2013-01-26 16:52 ` [PATCH 1/4] " Antony Pavlov
` (4 more replies)
0 siblings, 5 replies; 8+ messages in thread
From: Antony Pavlov @ 2013-01-26 16:52 UTC (permalink / raw)
To: barebox
[PATCH 1/4] MIPS: introduce ram0 regions register function
[PATCH 2/4] MIPS: qemu-malta: use mips_add_ram0()
[PATCH 3/4] MIPS: rzx50: use mips_add_ram0()
[PATCH 4/4] MIPS: dlink-dir-320: use mips_add_ram0()
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^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 1/4] MIPS: introduce ram0 regions register function 2013-01-26 16:52 [PATCH 0/4] MIPS: introduce ram0 regions register function Antony Pavlov @ 2013-01-26 16:52 ` Antony Pavlov 2013-01-27 11:23 ` Sascha Hauer 2013-01-26 16:52 ` [PATCH 2/4] MIPS: qemu-malta: use mips_add_ram0() Antony Pavlov ` (3 subsequent siblings) 4 siblings, 1 reply; 8+ messages in thread From: Antony Pavlov @ 2013-01-26 16:52 UTC (permalink / raw) To: barebox On MIPS there are two segments in CPU address space that can be used for untranslated memory access: KSEG0 and KSEG1. KSEG0 is used for cached access and KSEG1 is used for uncached one. The instroduced mips_add_ram0() function registers two address regions for memory access: one in KSEG0 and the other one in KSEG1. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> --- arch/mips/include/asm/memory.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 arch/mips/include/asm/memory.h diff --git a/arch/mips/include/asm/memory.h b/arch/mips/include/asm/memory.h new file mode 100644 index 0000000..2aa28b7 --- /dev/null +++ b/arch/mips/include/asm/memory.h @@ -0,0 +1,12 @@ +#ifndef __ASM_MIPS_MEMORY_H +#define __ASM_MIPS_MEMORY_H + +#include <memory.h> +#include <asm/addrspace.h> + +static inline void mips_add_ram0(resource_size_t size) +{ + barebox_add_memory_bank("kseg0_ram0", KSEG0, size); + barebox_add_memory_bank("kseg1_ram0", KSEG1, size); +} +#endif /* __ASM_MIPS_MEMORY_H */ -- 1.7.10.4 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/4] MIPS: introduce ram0 regions register function 2013-01-26 16:52 ` [PATCH 1/4] " Antony Pavlov @ 2013-01-27 11:23 ` Sascha Hauer [not found] ` <CAA4bVAFEMoEheftB=qJ7d1+yVOJDGMJG9+1xbGpPsQFTetWa_w@mail.gmail.com> 0 siblings, 1 reply; 8+ messages in thread From: Sascha Hauer @ 2013-01-27 11:23 UTC (permalink / raw) To: Antony Pavlov; +Cc: barebox On Sat, Jan 26, 2013 at 08:52:37PM +0400, Antony Pavlov wrote: > On MIPS there are two segments in CPU address space that > can be used for untranslated memory access: KSEG0 and KSEG1. > KSEG0 is used for cached access and KSEG1 is used for > uncached one. > > The instroduced mips_add_ram0() function registers two > address regions for memory access: one in KSEG0 and > the other one in KSEG1. > > Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> > --- > arch/mips/include/asm/memory.h | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > create mode 100644 arch/mips/include/asm/memory.h > > diff --git a/arch/mips/include/asm/memory.h b/arch/mips/include/asm/memory.h > new file mode 100644 > index 0000000..2aa28b7 > --- /dev/null > +++ b/arch/mips/include/asm/memory.h > @@ -0,0 +1,12 @@ > +#ifndef __ASM_MIPS_MEMORY_H > +#define __ASM_MIPS_MEMORY_H > + > +#include <memory.h> > +#include <asm/addrspace.h> > + > +static inline void mips_add_ram0(resource_size_t size) > +{ > + barebox_add_memory_bank("kseg0_ram0", KSEG0, size); > + barebox_add_memory_bank("kseg1_ram0", KSEG1, size); > +} Is kseg0/1 a common name under MIPS, or in other words, do users know what they have here? Why should I use the uncached RAM as a user? Is this for debugging or does it have apractical usecase? Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
[parent not found: <CAA4bVAFEMoEheftB=qJ7d1+yVOJDGMJG9+1xbGpPsQFTetWa_w@mail.gmail.com>]
* Fwd: [PATCH 1/4] MIPS: introduce ram0 regions register function [not found] ` <CAA4bVAFEMoEheftB=qJ7d1+yVOJDGMJG9+1xbGpPsQFTetWa_w@mail.gmail.com> @ 2013-01-28 9:10 ` Antony Pavlov 0 siblings, 0 replies; 8+ messages in thread From: Antony Pavlov @ 2013-01-28 9:10 UTC (permalink / raw) To: barebox Sorry, I have used "Reply-To" instead of "Reply-to-All". ---------- Forwarded message ---------- From: Antony Pavlov <antonynpavlov@gmail.com> Date: 27 January 2013 19:52 Subject: Re: [PATCH 1/4] MIPS: introduce ram0 regions register function To: Sascha Hauer <s.hauer@pengutronix.de> On 27 January 2013 15:23, Sascha Hauer <s.hauer@pengutronix.de> wrote: > On Sat, Jan 26, 2013 at 08:52:37PM +0400, Antony Pavlov wrote: >> On MIPS there are two segments in CPU address space that >> can be used for untranslated memory access: KSEG0 and KSEG1. >> KSEG0 is used for cached access and KSEG1 is used for >> uncached one. >> >> The instroduced mips_add_ram0() function registers two >> address regions for memory access: one in KSEG0 and >> the other one in KSEG1. >> >> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> >> --- >> arch/mips/include/asm/memory.h | 12 ++++++++++++ >> 1 file changed, 12 insertions(+) >> create mode 100644 arch/mips/include/asm/memory.h >> >> diff --git a/arch/mips/include/asm/memory.h b/arch/mips/include/asm/memory.h >> new file mode 100644 >> index 0000000..2aa28b7 >> --- /dev/null >> +++ b/arch/mips/include/asm/memory.h >> @@ -0,0 +1,12 @@ >> +#ifndef __ASM_MIPS_MEMORY_H >> +#define __ASM_MIPS_MEMORY_H >> + >> +#include <memory.h> >> +#include <asm/addrspace.h> >> + >> +static inline void mips_add_ram0(resource_size_t size) >> +{ >> + barebox_add_memory_bank("kseg0_ram0", KSEG0, size); >> + barebox_add_memory_bank("kseg1_ram0", KSEG1, size); >> +} > > Is kseg0/1 a common name under MIPS, or in other words, do users know > what they have here? The kseg0 and kseg1 are well-known names under MIPS. They are described in the official MIPS specification (see chapter 4.3 Virtual Address Spaces of the document MIPS Architecture For Programmers Volume III: The MIPS32 and microMIPS32 Privileged Resource Architecture Revision 3.12, April 28, 2011). > Why should I use the uncached RAM as a user? Is this for debugging or > does it have apractical usecase? Of cause kseg1 cached region is favourable for running program code and during normal work there is no need for user to know about uncached region; on the other hand kseg1 is usable for debugging. But just now MIPS barebox works in the kseg1 region. Adding barebox_add_memory_bank("kseg1_ram0", KSEG1, size); makes possible to know barebox link area by using iomem command. E.g. here is the iomem command output on MIPS qemu-malta barebox:/ iomem 0x00000000 - 0xffffffff (size 0x00000000) iomem 0x1e000000 - 0x1e3fffff (size 0x00400000) cfi_flash0 0x80000000 - 0x8fffffff (size 0x10000000) kseg0_ram0 0xa0000000 - 0xafffffff (size 0x10000000) kseg1_ram0 0xa03f9000 - 0xa03fffff (size 0x00007000) stack 0xa0400000 - 0xa07fffff (size 0x00400000) malloc space 0xa0800000 - 0xa0833cf0 (size 0x00033cf1) barebox 0xa08359d0 - 0xa083c438 (size 0x00006a69) bss 0xb00003f8 - 0xb00003ff (size 0x00000008) ns16550_serial0 We can switch to kseg0 cached region after adding cache support routines. I have done this for mips-malta, but I have not yet done it for others boards in the barebox git repository. -- Best regards, Antony Pavlov -- Best regards, Antony Pavlov _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/4] MIPS: qemu-malta: use mips_add_ram0() 2013-01-26 16:52 [PATCH 0/4] MIPS: introduce ram0 regions register function Antony Pavlov 2013-01-26 16:52 ` [PATCH 1/4] " Antony Pavlov @ 2013-01-26 16:52 ` Antony Pavlov 2013-01-26 16:52 ` [PATCH 3/4] MIPS: rzx50: " Antony Pavlov ` (2 subsequent siblings) 4 siblings, 0 replies; 8+ messages in thread From: Antony Pavlov @ 2013-01-26 16:52 UTC (permalink / raw) To: barebox Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> --- arch/mips/boards/qemu-malta/init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/boards/qemu-malta/init.c b/arch/mips/boards/qemu-malta/init.c index 28c23aa..fb4472f 100644 --- a/arch/mips/boards/qemu-malta/init.c +++ b/arch/mips/boards/qemu-malta/init.c @@ -20,7 +20,7 @@ #include <types.h> #include <driver.h> #include <init.h> -#include <memory.h> +#include <asm/memory.h> #include <ns16550.h> #include <mach/hardware.h> #include <io.h> @@ -30,7 +30,7 @@ static int malta_mem_init(void) { - barebox_add_memory_bank("ram0", 0xa0000000, SZ_256M); + mips_add_ram0(SZ_256M); return 0; } -- 1.7.10.4 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/4] MIPS: rzx50: use mips_add_ram0() 2013-01-26 16:52 [PATCH 0/4] MIPS: introduce ram0 regions register function Antony Pavlov 2013-01-26 16:52 ` [PATCH 1/4] " Antony Pavlov 2013-01-26 16:52 ` [PATCH 2/4] MIPS: qemu-malta: use mips_add_ram0() Antony Pavlov @ 2013-01-26 16:52 ` Antony Pavlov 2013-01-26 16:52 ` [PATCH 4/4] MIPS: dlink-dir-320: " Antony Pavlov 2013-01-28 7:30 ` [PATCH 0/4] MIPS: introduce ram0 regions register function Sascha Hauer 4 siblings, 0 replies; 8+ messages in thread From: Antony Pavlov @ 2013-01-26 16:52 UTC (permalink / raw) To: barebox Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> --- arch/mips/boards/rzx50/Makefile | 1 + arch/mips/boards/rzx50/board.c | 12 ++++++++++++ 2 files changed, 13 insertions(+) create mode 100644 arch/mips/boards/rzx50/board.c diff --git a/arch/mips/boards/rzx50/Makefile b/arch/mips/boards/rzx50/Makefile index ff1a655..9e14763 100644 --- a/arch/mips/boards/rzx50/Makefile +++ b/arch/mips/boards/rzx50/Makefile @@ -1 +1,2 @@ +obj-y += board.o obj-$(CONFIG_DRIVER_SERIAL_NS16550) += serial.o diff --git a/arch/mips/boards/rzx50/board.c b/arch/mips/boards/rzx50/board.c new file mode 100644 index 0000000..9e655ab --- /dev/null +++ b/arch/mips/boards/rzx50/board.c @@ -0,0 +1,12 @@ +#include <common.h> +#include <init.h> +#include <sizes.h> +#include <asm/memory.h> + +static int mem_init(void) +{ + mips_add_ram0(SZ_64M); + + return 0; +} +mem_initcall(mem_init); -- 1.7.10.4 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 4/4] MIPS: dlink-dir-320: use mips_add_ram0() 2013-01-26 16:52 [PATCH 0/4] MIPS: introduce ram0 regions register function Antony Pavlov ` (2 preceding siblings ...) 2013-01-26 16:52 ` [PATCH 3/4] MIPS: rzx50: " Antony Pavlov @ 2013-01-26 16:52 ` Antony Pavlov 2013-01-28 7:30 ` [PATCH 0/4] MIPS: introduce ram0 regions register function Sascha Hauer 4 siblings, 0 replies; 8+ messages in thread From: Antony Pavlov @ 2013-01-26 16:52 UTC (permalink / raw) To: barebox Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> --- arch/mips/boards/dlink-dir-320/Makefile | 1 + arch/mips/boards/dlink-dir-320/board.c | 12 ++++++++++++ 2 files changed, 13 insertions(+) create mode 100644 arch/mips/boards/dlink-dir-320/board.c diff --git a/arch/mips/boards/dlink-dir-320/Makefile b/arch/mips/boards/dlink-dir-320/Makefile index ff1a655..9e14763 100644 --- a/arch/mips/boards/dlink-dir-320/Makefile +++ b/arch/mips/boards/dlink-dir-320/Makefile @@ -1 +1,2 @@ +obj-y += board.o obj-$(CONFIG_DRIVER_SERIAL_NS16550) += serial.o diff --git a/arch/mips/boards/dlink-dir-320/board.c b/arch/mips/boards/dlink-dir-320/board.c new file mode 100644 index 0000000..3eed6f0 --- /dev/null +++ b/arch/mips/boards/dlink-dir-320/board.c @@ -0,0 +1,12 @@ +#include <common.h> +#include <init.h> +#include <sizes.h> +#include <asm/memory.h> + +static int mem_init(void) +{ + mips_add_ram0(SZ_32M); + + return 0; +} +mem_initcall(mem_init); -- 1.7.10.4 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 0/4] MIPS: introduce ram0 regions register function 2013-01-26 16:52 [PATCH 0/4] MIPS: introduce ram0 regions register function Antony Pavlov ` (3 preceding siblings ...) 2013-01-26 16:52 ` [PATCH 4/4] MIPS: dlink-dir-320: " Antony Pavlov @ 2013-01-28 7:30 ` Sascha Hauer 4 siblings, 0 replies; 8+ messages in thread From: Sascha Hauer @ 2013-01-28 7:30 UTC (permalink / raw) To: Antony Pavlov; +Cc: barebox On Sat, Jan 26, 2013 at 08:52:36PM +0400, Antony Pavlov wrote: > [PATCH 1/4] MIPS: introduce ram0 regions register function > [PATCH 2/4] MIPS: qemu-malta: use mips_add_ram0() > [PATCH 3/4] MIPS: rzx50: use mips_add_ram0() > [PATCH 4/4] MIPS: dlink-dir-320: use mips_add_ram0() Applied, thanks Sascha > > _______________________________________________ > barebox mailing list > barebox@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/barebox > -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
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2013-01-26 16:52 [PATCH 0/4] MIPS: introduce ram0 regions register function Antony Pavlov
2013-01-26 16:52 ` [PATCH 1/4] " Antony Pavlov
2013-01-27 11:23 ` Sascha Hauer
[not found] ` <CAA4bVAFEMoEheftB=qJ7d1+yVOJDGMJG9+1xbGpPsQFTetWa_w@mail.gmail.com>
2013-01-28 9:10 ` Fwd: " Antony Pavlov
2013-01-26 16:52 ` [PATCH 2/4] MIPS: qemu-malta: use mips_add_ram0() Antony Pavlov
2013-01-26 16:52 ` [PATCH 3/4] MIPS: rzx50: " Antony Pavlov
2013-01-26 16:52 ` [PATCH 4/4] MIPS: dlink-dir-320: " Antony Pavlov
2013-01-28 7:30 ` [PATCH 0/4] MIPS: introduce ram0 regions register function Sascha Hauer
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