[PATCH 1/2] ARM i.MX: Fix booting from NOR when external nand boot is enabled

[PATCH 1/2] ARM i.MX: Fix booting from NOR when external nand boot is enabled

[Sascha Hauer]

We cannot jump to SDRAM unconditionally in imx*_barebox_boot_nand_external.
When we really boot from NOR flash the binary is not yet copied to SDRAM.
Instead, let the return value of imx_barebox_boot_nand_external() indicate
whether we really boot from NAND and only jump to SDRAM in this case.
Otherwise just continue to the normal SoC specific entry.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-imx/external-nand-boot.c |   46 ++++++++++++++++++++------------
 1 file changed, 29 insertions(+), 17 deletions(-)

diff --git a/arch/arm/mach-imx/external-nand-boot.c b/arch/arm/mach-imx/external-nand-boot.c
index 2c353d7..73c4ccd 100644
--- a/arch/arm/mach-imx/external-nand-boot.c
+++ b/arch/arm/mach-imx/external-nand-boot.c
@@ -280,7 +280,7 @@ static __bare_init __naked void jump_sdram(unsigned long offset)
  * running inside the NFC address space. If not, barebox is started from the
  * currently running address without loading anything from NAND.
  */
-void __bare_init imx_barebox_boot_nand_external(unsigned long nfc_base)
+int __bare_init imx_barebox_boot_nand_external(unsigned long nfc_base)
 {
 	u32 r;
 	u32 *src, *trg;
@@ -289,7 +289,7 @@ void __bare_init imx_barebox_boot_nand_external(unsigned long nfc_base)
 	/* skip NAND boot if not running from NFC space */
 	r = get_pc();
 	if (r < nfc_base || r > nfc_base + 0x800)
-		return;
+		return 0;
 
 	src = (unsigned int *)nfc_base;
 	trg = (unsigned int *)_text;
@@ -297,6 +297,8 @@ void __bare_init imx_barebox_boot_nand_external(unsigned long nfc_base)
 	/* Move ourselves out of NFC SRAM */
 	for (i = 0; i < 0x800 / sizeof(int); i++)
 		*trg++ = *src++;
+
+	return 1;
 }
 
 /*
@@ -310,9 +312,11 @@ void __bare_init __noreturn imx21_barebox_boot_nand_external(void)
 {
 	unsigned long nfc_base = MX21_NFC_BASE_ADDR;
 
-	imx_barebox_boot_nand_external(nfc_base);
-	jump_sdram(nfc_base - (unsigned long)_text);
-	imx_nand_load_image((void *)_text, barebox_image_size);
+	if (imx_barebox_boot_nand_external(nfc_base)) {
+		jump_sdram(nfc_base - (unsigned long)_text);
+		imx_nand_load_image((void *)_text, barebox_image_size);
+	}
+
 	imx21_barebox_entry(0);
 }
 #endif
@@ -322,9 +326,11 @@ void __bare_init __noreturn imx25_barebox_boot_nand_external(void)
 {
 	unsigned long nfc_base = MX25_NFC_BASE_ADDR;
 
-	imx_barebox_boot_nand_external(nfc_base);
-	jump_sdram(nfc_base - (unsigned long)_text);
-	imx_nand_load_image((void *)_text, barebox_image_size);
+	if (imx_barebox_boot_nand_external(nfc_base)) {
+		jump_sdram(nfc_base - (unsigned long)_text);
+		imx_nand_load_image((void *)_text, barebox_image_size);
+	}
+
 	imx25_barebox_entry(0);
 }
 #endif
@@ -334,9 +340,11 @@ void __bare_init __noreturn imx27_barebox_boot_nand_external(void)
 {
 	unsigned long nfc_base = MX27_NFC_BASE_ADDR;
 
-	imx_barebox_boot_nand_external(nfc_base);
-	jump_sdram(nfc_base - (unsigned long)_text);
-	imx_nand_load_image((void *)_text, barebox_image_size);
+	if (imx_barebox_boot_nand_external(nfc_base)) {
+		jump_sdram(nfc_base - (unsigned long)_text);
+		imx_nand_load_image((void *)_text, barebox_image_size);
+	}
+
 	imx27_barebox_entry(0);
 }
 #endif
@@ -346,9 +354,11 @@ void __bare_init __noreturn imx31_barebox_boot_nand_external(void)
 {
 	unsigned long nfc_base = MX31_NFC_BASE_ADDR;
 
-	imx_barebox_boot_nand_external(nfc_base);
-	jump_sdram(nfc_base - (unsigned long)_text);
-	imx_nand_load_image((void *)_text, barebox_image_size);
+	if (imx_barebox_boot_nand_external(nfc_base)) {
+		jump_sdram(nfc_base - (unsigned long)_text);
+		imx_nand_load_image((void *)_text, barebox_image_size);
+	}
+
 	imx31_barebox_entry(0);
 }
 #endif
@@ -358,9 +368,11 @@ void __bare_init __noreturn imx35_barebox_boot_nand_external(void)
 {
 	unsigned long nfc_base = MX35_NFC_BASE_ADDR;
 
-	imx_barebox_boot_nand_external(nfc_base);
-	jump_sdram(nfc_base - (unsigned long)_text);
-	imx_nand_load_image((void *)_text, barebox_image_size);
+	if (imx_barebox_boot_nand_external(nfc_base)) {
+		jump_sdram(nfc_base - (unsigned long)_text);
+		imx_nand_load_image((void *)_text, barebox_image_size);
+	}
+
 	imx35_barebox_entry(0);
 }
 #endif
-- 
1.7.10.4


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[PATCH 2/2] ARM i.MX35: Let MAX clk be in run-mode-on

[Sascha Hauer]

The reset value for the MAX clk gate is 0b10, that is it is turned
on in CPU run mode and off in stop mode. Configure it that way during
startup.

The 0b11 value previously in this field causes some nasty behaviour in
the Linux kernel:

- The i.MX35 has two bits per clock gate which are decoded as follows:
  0b00 -> clock off
  0b01 -> clock is on in run mode, off in wait/doze
  0b10 -> clock is on in run/wait mode, off in doze
  0b11 -> clock is always on

The MAX clock is needed by the SoC, yet unused in the Kernel, so the
common clock framework will disable it during late init time. It will
only disable clocks though which it detects as being on. This detection
is made depending on the lower bit of the gate. So with the value of
0b11 the clock framework will detect the clock as turned on, yet unused,
hence it will turn it off and the system locks up.
With the value of 0b10 instead, the clock framework will detect the
clock as being disabled and will not try to turn it off, so the
system works.

The real bug is in the Linux clock framework. However, the value 0f 0b10
seems to be a sane default value, so restore it. This lets Linux work
again and gives time to fix the bug in Linux.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-imx/clk-imx35.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 5b5a9e7..f50c07d 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -99,7 +99,7 @@ static int imx35_ccm_probe(struct device_d *dev)
 
 	writel(0xffffffff, base + CCM_CGR0);
 	writel(0xffffffff, base + CCM_CGR1);
-	writel(0xffffffff, base + CCM_CGR2);
+	writel(0xfbffffff, base + CCM_CGR2);
 	writel(0xffffffff, base + CCM_CGR3);
 
 	pdr0 = __raw_readl(base + CCM_PDR0);
-- 
1.7.10.4


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