From: "Alexander Shiyan" <shc_work@mail.ru>
To: "Sascha Hauer" <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re[2]: [RFC only] ARM: i.MX: Fix SDRAM size detect
Date: Fri, 26 Apr 2013 15:12:56 +0400 [thread overview]
Message-ID: <1366974776.4890563@f83.mail.ru> (raw)
In-Reply-To: <20130426104806.GR32299@pengutronix.de>
> On Fri, Apr 26, 2013 at 02:21:54PM +0400, Alexander Shiyan wrote:
> > This is a trying to fix problem described in:
> > http://lists.infradead.org/pipermail/barebox/2013-April/014182.html
>
> Sorry, can you explain what the problem is and how this patch fixes
> that?
> How I understood it the problem was that your board had the second chip
> select enabled without having sdram connected there leading to a wrong
> size detection.
...
> > + arm_add_mem_device("ram0", MX51_CSD0_BASE_ADDR, size);
>
> With this patch you imply that imx_v3_sdram_size does not work which was
> never mentioned in the thread you reference.
>
> Can you please post:
>
> - Which values the sdram controller is programmed with
> - How much memory you really have
> - what barebox detects
Values for ESDCTL is programmed by DCD-data from flash_header.
Currently both channels are enabled and configured to 256M.
Barebox is NOT detect size of memory, it just a read back these values.
At least on every i.MX51 this is not works correctly. In any words:
How much we specify in flash_header, this is our "detected" size.
I have a two modules (256M and 512M), barebox works when I
manually disable second SDRAM bank and of course say me
256M on both modules.
In the patch I am just choose 128M as safe size, then add additional
banks. Of course this is wrong if we have repeated memory and/or
holes, but I cannot see any other way at now...
---
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
next prev parent reply other threads:[~2013-04-26 11:13 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-26 10:21 Alexander Shiyan
2013-04-26 10:48 ` Sascha Hauer
2013-04-26 11:12 ` Alexander Shiyan [this message]
2013-04-26 11:42 ` Sascha Hauer
2013-04-26 11:50 ` Re[2]: " Alexander Shiyan
2013-04-26 21:48 ` [PATCH] Fix ccxmx51 SDRAM size detection Sascha Hauer
2013-04-26 21:48 ` [PATCH 1/2] ARM: i.MX: Allow disabling SDRAM autodetection Sascha Hauer
2013-04-26 21:48 ` [PATCH 2/2] ARM: i.MX: ccxmx51: detect SDRAM size by board id Sascha Hauer
2013-05-07 11:45 ` Alexander Shiyan
2013-05-08 6:25 ` Sascha Hauer
2013-05-07 12:39 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-07 12:46 ` Re[2]: " Alexander Shiyan
2013-05-07 16:06 ` Jean-Christophe PLAGNIOL-VILLARD
2013-04-27 4:41 ` [PATCH] Fix ccxmx51 SDRAM size detection Alexander Shiyan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1366974776.4890563@f83.mail.ru \
--to=shc_work@mail.ru \
--cc=barebox@lists.infradead.org \
--cc=s.hauer@pengutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox