* [PATCH 01/11] arm: mvebu: add more visible SoC separators to Kconfig
2013-05-19 18:23 [PATCH 00/11] arm: mvebu: SoC consolidation Sebastian Hesselbarth
@ 2013-05-19 18:23 ` Sebastian Hesselbarth
2013-05-19 18:23 ` [PATCH 02/11] arm: mvebu: introduce common lowlevel and early init Sebastian Hesselbarth
` (11 subsequent siblings)
12 siblings, 0 replies; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-19 18:23 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
This just add more visible separators between each subconfig of the
supported Marvell EBU SoCs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
---
arch/arm/mach-mvebu/Kconfig | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 1d46f87..400e41b 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -40,6 +40,10 @@ config ARCH_KIRKWOOD
endchoice
+#
+# Armada 370 SoC boards
+#
+
if ARCH_ARMADA_370
choice
@@ -52,6 +56,10 @@ endchoice
endif # ARCH_ARMADA_370
+#
+# Armada XP SoC boards
+#
+
if ARCH_ARMADA_XP
choice
@@ -67,6 +75,10 @@ endchoice
endif # ARCH_ARMADA_XP
+#
+# Dove 88AP510 SoC boards
+#
+
if ARCH_DOVE
choice
@@ -79,6 +91,10 @@ endchoice
endif # ARCH_DOVE
+#
+# Kirkwood SoC boards
+#
+
if ARCH_KIRKWOOD
choice
--
1.7.10.4
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^ permalink raw reply [flat|nested] 23+ messages in thread* [PATCH 02/11] arm: mvebu: introduce common lowlevel and early init
2013-05-19 18:23 [PATCH 00/11] arm: mvebu: SoC consolidation Sebastian Hesselbarth
2013-05-19 18:23 ` [PATCH 01/11] arm: mvebu: add more visible SoC separators to Kconfig Sebastian Hesselbarth
@ 2013-05-19 18:23 ` Sebastian Hesselbarth
2013-05-19 18:23 ` [PATCH 03/11] arm: mvebu: introduce common console UART config Sebastian Hesselbarth
` (10 subsequent siblings)
12 siblings, 0 replies; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-19 18:23 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
At early stage after boot, all MVEBU SoCs are similar enough to have
a common lowlevel and barebox entry. We also remap the internal register
base address to 0xf100000 as it gives some 512M more of contiguous address
space. As we cannot determine real memory size that early, we start with
a default memory size of 64M and probe correct size later in SoC init.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
---
arch/arm/mach-mvebu/Makefile | 2 +
arch/arm/mach-mvebu/common.c | 57 +++++++++++++++++++++++++++
arch/arm/mach-mvebu/include/mach/common.h | 23 +++++++++++
arch/arm/mach-mvebu/include/mach/lowlevel.h | 23 +++++++++++
arch/arm/mach-mvebu/lowlevel.c | 28 +++++++++++++
5 files changed, 133 insertions(+)
create mode 100644 arch/arm/mach-mvebu/common.c
create mode 100644 arch/arm/mach-mvebu/include/mach/common.h
create mode 100644 arch/arm/mach-mvebu/include/mach/lowlevel.h
create mode 100644 arch/arm/mach-mvebu/lowlevel.c
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 8047725..80b3947 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -1,3 +1,5 @@
+lwl-y += lowlevel.o
+obj-y += common.o
obj-$(CONFIG_ARCH_ARMADA_370) += armada-370-xp.o
obj-$(CONFIG_ARCH_ARMADA_XP) += armada-370-xp.o
obj-$(CONFIG_ARCH_DOVE) += dove.o
diff --git a/arch/arm/mach-mvebu/common.c b/arch/arm/mach-mvebu/common.c
new file mode 100644
index 0000000..e2092c8
--- /dev/null
+++ b/arch/arm/mach-mvebu/common.c
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2013
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <io.h>
+#include <sizes.h>
+#include <asm/barebox-arm.h>
+#include <mach/common.h>
+
+/*
+ * All MVEBU SoCs start with internal registers at 0xd0000000.
+ * To get more contiguous address space and as Linux expects them
+ * there, we remap them early to 0xf1000000.
+ *
+ * There is no way to determine internal registers base address
+ * safely later on, as the remap register itself is within the
+ * internal registers.
+ */
+#define MVEBU_BOOTUP_INT_REG_BASE 0xd0000000
+#define MVEBU_BRIDGE_REG_BASE 0x20000
+#define DEVICE_INTERNAL_BASE_ADDR (MVEBU_BRIDGE_REG_BASE + 0x80)
+
+static void mvebu_remap_registers(void)
+{
+ writel(MVEBU_REMAP_INT_REG_BASE,
+ IOMEM(MVEBU_BOOTUP_INT_REG_BASE) + DEVICE_INTERNAL_BASE_ADDR);
+}
+
+/*
+ * Determining the actual memory size is highly SoC dependent,
+ * but for all SoCs RAM starts at 0x00000000. Therefore, we start
+ * with a minimal memory setup of 64M and probe correct memory size
+ * later.
+ */
+#define MVEBU_BOOTUP_MEMORY_BASE 0x00000000
+#define MVEBU_BOOTUP_MEMORY_SIZE SZ_64M
+
+void __naked __noreturn mvebu_barebox_entry(void)
+{
+ mvebu_remap_registers();
+ barebox_arm_entry(MVEBU_BOOTUP_MEMORY_BASE,
+ MVEBU_BOOTUP_MEMORY_SIZE, 0);
+}
diff --git a/arch/arm/mach-mvebu/include/mach/common.h b/arch/arm/mach-mvebu/include/mach/common.h
new file mode 100644
index 0000000..3cc1bf7
--- /dev/null
+++ b/arch/arm/mach-mvebu/include/mach/common.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2013
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MACH_COMMON_H__
+#define __MACH_COMMON_H__
+
+#define MVEBU_REMAP_INT_REG_BASE 0xf1000000
+
+#endif
diff --git a/arch/arm/mach-mvebu/include/mach/lowlevel.h b/arch/arm/mach-mvebu/include/mach/lowlevel.h
new file mode 100644
index 0000000..e86d928
--- /dev/null
+++ b/arch/arm/mach-mvebu/include/mach/lowlevel.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2013
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MACH_LOWLEVEL_H__
+#define __MACH_LOWLEVEL_H__
+
+void mvebu_barebox_entry(void);
+
+#endif
diff --git a/arch/arm/mach-mvebu/lowlevel.c b/arch/arm/mach-mvebu/lowlevel.c
new file mode 100644
index 0000000..3f64c4a
--- /dev/null
+++ b/arch/arm/mach-mvebu/lowlevel.c
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2013
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <sizes.h>
+#include <asm/barebox-arm.h>
+#include <asm/barebox-arm-head.h>
+#include <mach/lowlevel.h>
+
+void __naked barebox_arm_reset_vector(void)
+{
+ arm_cpu_lowlevel_init();
+ mvebu_barebox_entry();
+}
--
1.7.10.4
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^ permalink raw reply [flat|nested] 23+ messages in thread* [PATCH 03/11] arm: mvebu: introduce common console UART config
2013-05-19 18:23 [PATCH 00/11] arm: mvebu: SoC consolidation Sebastian Hesselbarth
2013-05-19 18:23 ` [PATCH 01/11] arm: mvebu: add more visible SoC separators to Kconfig Sebastian Hesselbarth
2013-05-19 18:23 ` [PATCH 02/11] arm: mvebu: introduce common lowlevel and early init Sebastian Hesselbarth
@ 2013-05-19 18:23 ` Sebastian Hesselbarth
2013-05-19 18:23 ` [PATCH 04/11] arm: mvebu: convert Dove to common init Sebastian Hesselbarth
` (9 subsequent siblings)
12 siblings, 0 replies; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-19 18:23 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
With all SoCs remapped to common internal register base address, we
also switch debug_ll to use the correct base address. This also adds
a config option to select the UART number the console will sit on
limited to the available controllers for each SoC.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
---
arch/arm/mach-mvebu/Kconfig | 14 ++++++++++++++
arch/arm/mach-mvebu/include/mach/debug_ll.h | 23 +++++++++++++----------
2 files changed, 27 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 400e41b..11e4550 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -107,4 +107,18 @@ endchoice
endif # ARCH_KIRKWOOD
+#
+# Common options
+#
+
+config MVEBU_CONSOLE_UART
+ int "UART number for console"
+ default 0
+ range 0 1 if ARCH_ARMADA_370
+ range 0 1 if ARCH_ARMADA_XP
+ range 0 3 if ARCH_DOVE
+ range 0 1 if ARCH_KIRKWOOD
+ help
+ Select the UART number the barebox console will sit on.
+
endif # ARCH_MVEBU
diff --git a/arch/arm/mach-mvebu/include/mach/debug_ll.h b/arch/arm/mach-mvebu/include/mach/debug_ll.h
index 2653573..1cf821e 100644
--- a/arch/arm/mach-mvebu/include/mach/debug_ll.h
+++ b/arch/arm/mach-mvebu/include/mach/debug_ll.h
@@ -1,5 +1,6 @@
/*
- * Copyright (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ * Copyright (C) 2013
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -18,23 +19,25 @@
#include <io.h>
-#define UART_BASE 0xd0012000
-#define UART_THR 0x0
-#define UART_LSR 0x14
-#define UART_LSR_THRE (1 << 5)
+#define UART_BASE 0xf1012000
+#define UARTn_BASE(n) (UART_BASE + ((n) * 0x100))
+#define UART_THR 0x00
+#define UART_LSR 0x14
+#define LSR_THRE BIT(5)
+
+#define EARLY_UART UARTn_BASE(CONFIG_MVEBU_CONSOLE_UART)
static inline void PUTC_LL(char c)
{
/* Wait until there is space in the FIFO */
- while (!(readl(UART_BASE + UART_LSR) & UART_LSR_THRE))
+ while (!(readl(EARLY_UART + UART_LSR) & LSR_THRE))
;
/* Send the character */
- writel(c, UART_BASE + UART_THR)
- ;
+ writel(c, EARLY_UART + UART_THR);
- /* Wait to make sure it hits the line, in case we die too soon. */
- while (!(readl(UART_BASE + UART_LSR) & UART_LSR_THRE))
+ /* Wait to make sure it hits the line */
+ while (!(readl(EARLY_UART + UART_LSR) & LSR_THRE))
;
}
#endif
--
1.7.10.4
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^ permalink raw reply [flat|nested] 23+ messages in thread* [PATCH 04/11] arm: mvebu: convert Dove to common init
2013-05-19 18:23 [PATCH 00/11] arm: mvebu: SoC consolidation Sebastian Hesselbarth
` (2 preceding siblings ...)
2013-05-19 18:23 ` [PATCH 03/11] arm: mvebu: introduce common console UART config Sebastian Hesselbarth
@ 2013-05-19 18:23 ` Sebastian Hesselbarth
2013-05-21 13:49 ` Sascha Hauer
2013-05-19 18:23 ` [PATCH 05/11] arm: mvebu: convert Armada 370/XP " Sebastian Hesselbarth
` (8 subsequent siblings)
12 siblings, 1 reply; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-19 18:23 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
This patch converts Marvell Dove SoC init to make use of common lowlevel
and init functions. Postcore initcall will now setup memory controller
base registers to match internal registers base, probe real memory size,
and setup UART console by config option.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
---
arch/arm/mach-mvebu/dove.c | 56 +++++++++-----------------
arch/arm/mach-mvebu/include/mach/dove-regs.h | 21 +++++-----
2 files changed, 32 insertions(+), 45 deletions(-)
diff --git a/arch/arm/mach-mvebu/dove.c b/arch/arm/mach-mvebu/dove.c
index f073596..6e8e113 100644
--- a/arch/arm/mach-mvebu/dove.c
+++ b/arch/arm/mach-mvebu/dove.c
@@ -17,38 +17,35 @@
#include <common.h>
#include <init.h>
#include <io.h>
+#include <ns16550.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
-#include <ns16550.h>
-#include <mach/dove-regs.h>
#include <asm/memory.h>
-#include <asm/barebox-arm.h>
+#include <mach/dove-regs.h>
+
+#define CONSOLE_UART_BASE DOVE_UARTn_BASE(CONFIG_MVEBU_CONSOLE_UART)
static struct clk *tclk;
-static inline void dove_remap_reg_base(uint32_t intbase,
- uint32_t mcbase)
+static inline void dove_remap_mc_regs(void)
{
+ void __iomem *mcboot = IOMEM(DOVE_BOOTUP_MC_REGS);
uint32_t val;
/* remap ahb slave base */
val = readl(DOVE_CPU_CTRL) & 0xffff0000;
- val |= (mcbase & 0xffff0000) >> 16;
+ val |= (DOVE_REMAP_MC_REGS & 0xffff0000) >> 16;
writel(val, DOVE_CPU_CTRL);
/* remap axi bridge address */
val = readl(DOVE_AXI_CTRL) & 0x007fffff;
- val |= mcbase & 0xff800000;
+ val |= DOVE_REMAP_MC_REGS & 0xff800000;
writel(val, DOVE_AXI_CTRL);
/* remap memory controller base address */
- val = readl(DOVE_SDRAM_BASE + SDRAM_REGS_BASE_DECODE) & 0x0000ffff;
- val |= mcbase & 0xffff0000;
- writel(val, DOVE_SDRAM_BASE + SDRAM_REGS_BASE_DECODE);
-
- /* remap internal register */
- val = intbase & 0xfff00000;
- writel(val, DOVE_BRIDGE_BASE + INT_REGS_BASE_MAP);
+ val = readl(mcboot + SDRAM_REGS_BASE_DECODE) & 0x0000ffff;
+ val |= DOVE_REMAP_MC_REGS & 0xffff0000;
+ writel(val, mcboot + SDRAM_REGS_BASE_DECODE);
}
static inline void dove_memory_find(unsigned long *phys_base,
@@ -77,32 +74,16 @@ static inline void dove_memory_find(unsigned long *phys_base,
}
}
-void __naked __noreturn dove_barebox_entry(void)
-{
- unsigned long phys_base, phys_size;
- dove_memory_find(&phys_base, &phys_size);
- barebox_arm_entry(phys_base, phys_size, 0);
-}
-
-static struct NS16550_plat uart_plat[] = {
- [0] = { .shift = 2, },
- [1] = { .shift = 2, },
- [2] = { .shift = 2, },
- [3] = { .shift = 2, },
+static struct NS16550_plat uart_plat = {
+ .shift = 2,
};
-int dove_add_uart(int num)
+static int dove_add_uart(void)
{
- struct NS16550_plat *plat;
-
- if (num < 0 || num > 4)
- return -EINVAL;
-
- plat = &uart_plat[num];
- plat->clock = clk_get_rate(tclk);
+ uart_plat.clock = clk_get_rate(tclk);
if (!add_ns16550_device(DEVICE_ID_DYNAMIC,
- (unsigned int)DOVE_UARTn_BASE(num),
- 32, IORESOURCE_MEM_32BIT, plat))
+ (unsigned int)CONSOLE_UART_BASE, 32,
+ IORESOURCE_MEM_32BIT, &uart_plat))
return -ENODEV;
return 0;
}
@@ -140,12 +121,15 @@ static int dove_init_soc(void)
{
unsigned long phys_base, phys_size;
+ dove_remap_mc_regs();
dove_init_clocks();
add_generic_device("orion-timer", DEVICE_ID_SINGLE, NULL,
(unsigned int)DOVE_TIMER_BASE, 0x30,
IORESOURCE_MEM, NULL);
dove_memory_find(&phys_base, &phys_size);
arm_add_mem_device("ram0", phys_base, phys_size);
+ dove_add_uart();
+
return 0;
}
postcore_initcall(dove_init_soc);
diff --git a/arch/arm/mach-mvebu/include/mach/dove-regs.h b/arch/arm/mach-mvebu/include/mach/dove-regs.h
index 5e20368..519457e 100644
--- a/arch/arm/mach-mvebu/include/mach/dove-regs.h
+++ b/arch/arm/mach-mvebu/include/mach/dove-regs.h
@@ -17,15 +17,18 @@
#ifndef __MACH_MVEBU_DOVE_REGS_H
#define __MACH_MVEBU_DOVE_REGS_H
-/* At Boot-up register base is at 0xd000000 */
-#define DOVE_INT_REGS_BOOTUP 0xd0000000
-#define DOVE_MC_REGS_BOOTUP 0xd0800000
-/* Linux wants it remapped to 0xf1000000 */
-#define DOVE_INT_REGS_REMAP 0xf1000000
-#define DOVE_MC_REGS_REMAP 0xf1800000
-
-#define DOVE_INT_REGS_BASE IOMEM(DOVE_INT_REGS_BOOTUP)
-#define DOVE_MC_REGS_BASE IOMEM(DOVE_MC_REGS_BOOTUP)
+#include <mach/common.h>
+
+/*
+ * Even after MVEBU SoC internal register base remap. Dove MC
+ * registers are still at 0xd0800000. We remap it right after
+ * internal registers to 0xf1800000.
+*/
+#define DOVE_BOOTUP_MC_REGS 0xd0800000
+#define DOVE_REMAP_MC_REGS 0xf1800000
+
+#define DOVE_INT_REGS_BASE IOMEM(MVEBU_REMAP_INT_REG_BASE)
+#define DOVE_MC_REGS_BASE IOMEM(DOVE_REMAP_MC_REGS)
#define DOVE_UART_BASE (DOVE_INT_REGS_BASE + 0x12000)
#define DOVE_UARTn_BASE(n) (DOVE_UART_BASE + ((n) * 0x100))
--
1.7.10.4
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^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [PATCH 04/11] arm: mvebu: convert Dove to common init
2013-05-19 18:23 ` [PATCH 04/11] arm: mvebu: convert Dove to common init Sebastian Hesselbarth
@ 2013-05-21 13:49 ` Sascha Hauer
2013-05-21 15:24 ` Sebastian Hesselbarth
0 siblings, 1 reply; 23+ messages in thread
From: Sascha Hauer @ 2013-05-21 13:49 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
On Sun, May 19, 2013 at 08:23:48PM +0200, Sebastian Hesselbarth wrote:
> This patch converts Marvell Dove SoC init to make use of common lowlevel
> and init functions. Postcore initcall will now setup memory controller
> base registers to match internal registers base, probe real memory size,
> and setup UART console by config option.
>
> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This patch breaks bisectibility:
config: arm globalscale_guruplug_defconfig
arch/arm/mach-mvebu/built-in.o: In function `barebox_arm_reset_vector':
lowlevel.c:(.text.barebox_arm_reset_vector+0x0): multiple definition of `barebox_arm_reset_vector'
arch/arm/boards/globalscale-guruplug/built-in.o:lowlevel.c:(.text.barebox_arm_reset_vector+0x0): first defined here
make: *** [barebox] Error 1
------------------------------------------------------------
config: arm globalscale_mirabox_defconfig
arch/arm/mach-mvebu/armada-370-xp.o: In function `mvebu_barebox_entry':
armada-370-xp.c:(.text.mvebu_barebox_entry+0x0): multiple definition of `mvebu_barebox_entry'
arch/arm/mach-mvebu/common.o:common.c:(.text.mvebu_barebox_entry+0x0): first defined here
make[1]: *** [arch/arm/mach-mvebu/built-in.o] Error 1
make: *** [arch/arm/mach-mvebu] Error 2
make: *** Waiting for unfinished jobs....
I'm fine with squashing the rest of this series together in a single
patch. Is this ok with you or do you want to look for a better solution?
Sascha
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^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 04/11] arm: mvebu: convert Dove to common init
2013-05-21 13:49 ` Sascha Hauer
@ 2013-05-21 15:24 ` Sebastian Hesselbarth
2013-05-21 17:49 ` Sascha Hauer
0 siblings, 1 reply; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-21 15:24 UTC (permalink / raw)
To: Sascha Hauer; +Cc: Thomas Petazzoni, barebox
On 05/21/13 15:49, Sascha Hauer wrote:
> On Sun, May 19, 2013 at 08:23:48PM +0200, Sebastian Hesselbarth wrote:
>> This patch converts Marvell Dove SoC init to make use of common lowlevel
>> and init functions. Postcore initcall will now setup memory controller
>> base registers to match internal registers base, probe real memory size,
>> and setup UART console by config option.
>>
>> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
>
> This patch breaks bisectibility:
>
> config: arm globalscale_guruplug_defconfig
> arch/arm/mach-mvebu/built-in.o: In function `barebox_arm_reset_vector':
> lowlevel.c:(.text.barebox_arm_reset_vector+0x0): multiple definition of `barebox_arm_reset_vector'
> arch/arm/boards/globalscale-guruplug/built-in.o:lowlevel.c:(.text.barebox_arm_reset_vector+0x0): first defined here
> make: *** [barebox] Error 1
> ------------------------------------------------------------
> config: arm globalscale_mirabox_defconfig
> arch/arm/mach-mvebu/armada-370-xp.o: In function `mvebu_barebox_entry':
> armada-370-xp.c:(.text.mvebu_barebox_entry+0x0): multiple definition of `mvebu_barebox_entry'
> arch/arm/mach-mvebu/common.o:common.c:(.text.mvebu_barebox_entry+0x0): first defined here
> make[1]: *** [arch/arm/mach-mvebu/built-in.o] Error 1
> make: *** [arch/arm/mach-mvebu] Error 2
> make: *** Waiting for unfinished jobs....
>
> I'm fine with squashing the rest of this series together in a single
> patch. Is this ok with you or do you want to look for a better solution?
Yeah, Thomas already mentioned it will break bisectibility. IIRC,
Thomas agreed on squashing if you are fine with it.
Sebastian
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^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 04/11] arm: mvebu: convert Dove to common init
2013-05-21 15:24 ` Sebastian Hesselbarth
@ 2013-05-21 17:49 ` Sascha Hauer
0 siblings, 0 replies; 23+ messages in thread
From: Sascha Hauer @ 2013-05-21 17:49 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
On Tue, May 21, 2013 at 05:24:21PM +0200, Sebastian Hesselbarth wrote:
> On 05/21/13 15:49, Sascha Hauer wrote:
> >On Sun, May 19, 2013 at 08:23:48PM +0200, Sebastian Hesselbarth wrote:
> >>This patch converts Marvell Dove SoC init to make use of common lowlevel
> >>and init functions. Postcore initcall will now setup memory controller
> >>base registers to match internal registers base, probe real memory size,
> >>and setup UART console by config option.
> >>
> >>Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> >
> >This patch breaks bisectibility:
> >
> > config: arm globalscale_guruplug_defconfig
> >arch/arm/mach-mvebu/built-in.o: In function `barebox_arm_reset_vector':
> >lowlevel.c:(.text.barebox_arm_reset_vector+0x0): multiple definition of `barebox_arm_reset_vector'
> >arch/arm/boards/globalscale-guruplug/built-in.o:lowlevel.c:(.text.barebox_arm_reset_vector+0x0): first defined here
> >make: *** [barebox] Error 1
> >------------------------------------------------------------
> > config: arm globalscale_mirabox_defconfig
> >arch/arm/mach-mvebu/armada-370-xp.o: In function `mvebu_barebox_entry':
> >armada-370-xp.c:(.text.mvebu_barebox_entry+0x0): multiple definition of `mvebu_barebox_entry'
> >arch/arm/mach-mvebu/common.o:common.c:(.text.mvebu_barebox_entry+0x0): first defined here
> >make[1]: *** [arch/arm/mach-mvebu/built-in.o] Error 1
> >make: *** [arch/arm/mach-mvebu] Error 2
> >make: *** Waiting for unfinished jobs....
> >
> >I'm fine with squashing the rest of this series together in a single
> >patch. Is this ok with you or do you want to look for a better solution?
>
> Yeah, Thomas already mentioned it will break bisectibility. IIRC,
> Thomas agreed on squashing if you are fine with it.
Ok, just did that.
Sascha
--
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^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH 05/11] arm: mvebu: convert Armada 370/XP to common init
2013-05-19 18:23 [PATCH 00/11] arm: mvebu: SoC consolidation Sebastian Hesselbarth
` (3 preceding siblings ...)
2013-05-19 18:23 ` [PATCH 04/11] arm: mvebu: convert Dove to common init Sebastian Hesselbarth
@ 2013-05-19 18:23 ` Sebastian Hesselbarth
2013-05-21 6:28 ` Sascha Hauer
2013-05-19 18:23 ` [PATCH 06/11] arm: mvebu: convert Kirkwood " Sebastian Hesselbarth
` (7 subsequent siblings)
12 siblings, 1 reply; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-19 18:23 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
This patch converts Marvell Armada 370/XP SoCs init to make use of common
lowlevel and init functions. Postcore initcall will now probe real memory
size, and setup UART console by config option. Also register definitions
are moved into a mach include and functions are named after SoC name.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
---
arch/arm/mach-mvebu/armada-370-xp.c | 103 ++++++++------------
.../mach-mvebu/include/mach/armada-370-xp-regs.h | 47 +++++++++
2 files changed, 88 insertions(+), 62 deletions(-)
create mode 100644 arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index f4672a3..2cdc3b0 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -1,5 +1,6 @@
/*
- * Copyright (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ * Copyright
+ * (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -16,49 +17,31 @@
#include <common.h>
#include <init.h>
#include <io.h>
+#include <ns16550.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
-#include <ns16550.h>
#include <asm/memory.h>
-#include <asm/barebox-arm.h>
-
-#define MVEBU_INT_REGS_BASE (0xd0000000)
-#define MVEBU_UART0_BASE (MVEBU_INT_REGS_BASE + 0x12000)
-#define MVEBU_SYSCTL_BASE (MVEBU_INT_REGS_BASE + 0x18200)
-#define MVEBU_SDRAM_WIN_BASE (MVEBU_INT_REGS_BASE + 0x20180)
-#define MVEBU_TIMER_BASE (MVEBU_INT_REGS_BASE + 0x20300)
-#define MVEBU_SAR_BASE (MVEBU_INT_REGS_BASE + 0x18230)
-
-#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3))
-#define DDR_BASE_CS_HIGH_MASK 0xf
-#define DDR_BASE_CS_LOW_MASK 0xff000000
-#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3))
-#define DDR_SIZE_ENABLED (1 << 0)
-#define DDR_SIZE_CS_MASK 0x1c
-#define DDR_SIZE_CS_SHIFT 2
-#define DDR_SIZE_MASK 0xff000000
-
-#define SAR_LOW_REG_OFF 0
-#define SAR_TCLK_FREQ_BIT 20
-#define SAR_HIGH_REG_OFF 0x4
+#include <mach/armada-370-xp-regs.h>
+
+#define CONSOLE_UART_BASE \
+ ARMADA_370_XP_UARTn_BASE(CONFIG_MVEBU_CONSOLE_UART)
static struct clk *tclk;
-static inline void mvebu_memory_find(unsigned long *phys_base,
- unsigned long *phys_size)
+static inline void armada_370_xp_memory_find(unsigned long *phys_base,
+ unsigned long *phys_size)
{
- void __iomem *sdram_win = IOMEM(MVEBU_SDRAM_WIN_BASE);
int cs;
*phys_base = ~0;
*phys_size = 0;
for (cs = 0; cs < 4; cs++) {
- uint32_t base = readl(sdram_win + DDR_BASE_CS_OFF(cs));
- uint32_t ctrl = readl(sdram_win + DDR_SIZE_CS_OFF(cs));
+ u32 base = readl(ARMADA_370_XP_SDRAM_BASE + DDR_BASE_CSn(cs));
+ u32 ctrl = readl(ARMADA_370_XP_SDRAM_BASE + DDR_SIZE_CSn(cs));
/* Skip non-enabled CS */
- if (! (ctrl & DDR_SIZE_ENABLED))
+ if ((ctrl & DDR_SIZE_ENABLED) != DDR_SIZE_ENABLED)
continue;
base &= DDR_BASE_CS_LOW_MASK;
@@ -68,74 +51,70 @@ static inline void mvebu_memory_find(unsigned long *phys_base,
}
}
-void __naked __noreturn mvebu_barebox_entry(void)
-{
- unsigned long phys_base, phys_size;
- mvebu_memory_find(&phys_base, &phys_size);
- barebox_arm_entry(phys_base, phys_size, 0);
-}
-
-static struct NS16550_plat uart0_plat = {
+static struct NS16550_plat uart_plat = {
.shift = 2,
};
-int mvebu_add_uart0(void)
+static int armada_370_xp_add_uart(void)
{
- uart0_plat.clock = clk_get_rate(tclk);
- add_ns16550_device(DEVICE_ID_DYNAMIC, MVEBU_UART0_BASE, 32,
- IORESOURCE_MEM_32BIT, &uart0_plat);
+ uart_plat.clock = clk_get_rate(tclk);
+ if (!add_ns16550_device(DEVICE_ID_DYNAMIC,
+ (unsigned int)CONSOLE_UART_BASE, 32,
+ IORESOURCE_MEM_32BIT, &uart_plat))
+ return -ENODEV;
return 0;
}
#if defined(CONFIG_ARCH_ARMADA_370)
-static int mvebu_init_clocks(void)
+static int armada_370_init_clocks(void)
{
- uint32_t val;
+ u32 val = readl(ARMADA_370_XP_SAR_BASE + SAR_LOW);
unsigned int rate;
- void __iomem *sar = IOMEM(MVEBU_SAR_BASE) + SAR_LOW_REG_OFF;
- val = readl(sar);
-
- /* On Armada 370, the TCLK frequency can be either 166 Mhz or
- * 200 Mhz */
- if (val & (1 << SAR_TCLK_FREQ_BIT))
- rate = 200 * 1000 * 1000;
+ /*
+ * On Armada 370, the TCLK frequency can be either
+ * 166 Mhz or 200 Mhz
+ */
+ if ((val & SAR_TCLK_FREQ) == SAR_TCLK_FREQ)
+ rate = 200000000;
else
- rate = 166 * 1000 * 1000;
+ rate = 166000000;
tclk = clk_fixed("tclk", rate);
return clk_register_clkdev(tclk, NULL, "mvebu-timer");
}
+#define armada_370_xp_init_clocks() armada_370_init_clocks()
#endif
#if defined(CONFIG_ARCH_ARMADA_XP)
-static int mvebu_init_clocks(void)
+static int armada_xp_init_clocks(void)
{
/* On Armada XP, the TCLK frequency is always 250 Mhz */
- tclk = clk_fixed("tclk", 250 * 1000 * 1000);
+ tclk = clk_fixed("tclk", 250000000);
return clk_register_clkdev(tclk, NULL, "mvebu-timer");
}
+#define armada_370_xp_init_clocks() armada_xp_init_clocks()
#endif
-static int mvebu_init_soc(void)
+static int armada_370_xp_init_soc(void)
{
unsigned long phys_base, phys_size;
- mvebu_init_clocks();
+ armada_370_xp_init_clocks();
add_generic_device("mvebu-timer", DEVICE_ID_SINGLE, NULL,
- MVEBU_TIMER_BASE, 0x30, IORESOURCE_MEM,
- NULL);
- mvebu_memory_find(&phys_base, &phys_size);
+ (unsigned int)ARMADA_370_XP_TIMER_BASE, 0x30,
+ IORESOURCE_MEM, NULL);
+ armada_370_xp_memory_find(&phys_base, &phys_size);
arm_add_mem_device("ram0", phys_base, phys_size);
+ armada_370_xp_add_uart();
return 0;
}
-
-postcore_initcall(mvebu_init_soc);
+postcore_initcall(armada_370_xp_init_soc);
void __noreturn reset_cpu(unsigned long addr)
{
- writel(0x1, MVEBU_SYSCTL_BASE + 0x60);
- writel(0x1, MVEBU_SYSCTL_BASE + 0x64);
+ writel(0x1, ARMADA_370_XP_SYSCTL_BASE + 0x60);
+ writel(0x1, ARMADA_370_XP_SYSCTL_BASE + 0x64);
while (1)
;
}
diff --git a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h
new file mode 100644
index 0000000..5fd16e5
--- /dev/null
+++ b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright
+ * (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MACH_MVEBU_ARMADA_370_XP_REGS_H
+#define __MACH_MVEBU_ARMADA_370_XP_REGS_H
+
+#include <mach/common.h>
+
+#define ARMADA_370_XP_INT_REGS_BASE IOMEM(MVEBU_REMAP_INT_REG_BASE)
+#define ARMADA_370_XP_UART_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x12000)
+#define ARMADA_370_XP_UARTn_BASE(n) \
+ (ARMADA_370_XP_UART_BASE + ((n) * 0x100))
+
+#define ARMADA_370_XP_SYSCTL_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x18200)
+#define ARMADA_370_XP_SAR_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x18230)
+#define SAR_LOW 0x00
+#define SAR_TCLK_FREQ BIT(20)
+#define SAR_HIGH 0x04
+
+#define ARMADA_370_XP_SDRAM_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x20000)
+#define DDR_BASE_CS 0x180
+#define DDR_BASE_CSn(n) (DDR_BASE_CS + ((n) * 0x8))
+#define DDR_BASE_CS_HIGH_MASK 0x0000000f
+#define DDR_BASE_CS_LOW_MASK 0xff000000
+#define DDR_SIZE_CS 0x184
+#define DDR_SIZE_CSn(n) (DDR_SIZE_CS + ((n) * 0x8))
+#define DDR_SIZE_ENABLED BIT(0)
+#define DDR_SIZE_CS_MASK 0x0000001c
+#define DDR_SIZE_CS_SHIFT 2
+#define DDR_SIZE_MASK 0xff000000
+
+#define ARMADA_370_XP_TIMER_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x20300)
+
+#endif /* __MACH_MVEBU_DOVE_REGS_H */
--
1.7.10.4
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^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [PATCH 05/11] arm: mvebu: convert Armada 370/XP to common init
2013-05-19 18:23 ` [PATCH 05/11] arm: mvebu: convert Armada 370/XP " Sebastian Hesselbarth
@ 2013-05-21 6:28 ` Sascha Hauer
2013-05-21 6:32 ` Sebastian Hesselbarth
2013-05-21 6:33 ` Sascha Hauer
0 siblings, 2 replies; 23+ messages in thread
From: Sascha Hauer @ 2013-05-21 6:28 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
Sebastian,
> +static int armada_370_xp_init_soc(void)
> {
> unsigned long phys_base, phys_size;
>
> - mvebu_init_clocks();
> + armada_370_xp_init_clocks();
> add_generic_device("mvebu-timer", DEVICE_ID_SINGLE, NULL,
> - MVEBU_TIMER_BASE, 0x30, IORESOURCE_MEM,
> - NULL);
> - mvebu_memory_find(&phys_base, &phys_size);
> + (unsigned int)ARMADA_370_XP_TIMER_BASE, 0x30,
> + IORESOURCE_MEM, NULL);
> + armada_370_xp_memory_find(&phys_base, &phys_size);
> arm_add_mem_device("ram0", phys_base, phys_size);
> + armada_370_xp_add_uart();
How do you want to support a board which uses another UART instead of
uart0 when you call this from SoC code?
I don't think this line should be here.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [PATCH 05/11] arm: mvebu: convert Armada 370/XP to common init
2013-05-21 6:28 ` Sascha Hauer
@ 2013-05-21 6:32 ` Sebastian Hesselbarth
2013-05-21 6:33 ` Sascha Hauer
1 sibling, 0 replies; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-21 6:32 UTC (permalink / raw)
To: Sascha Hauer; +Cc: Thomas Petazzoni, barebox
On 05/21/2013 08:28 AM, Sascha Hauer wrote:
> Sebastian,
>
>> +static int armada_370_xp_init_soc(void)
>> {
>> unsigned long phys_base, phys_size;
>>
>> - mvebu_init_clocks();
>> + armada_370_xp_init_clocks();
>> add_generic_device("mvebu-timer", DEVICE_ID_SINGLE, NULL,
>> - MVEBU_TIMER_BASE, 0x30, IORESOURCE_MEM,
>> - NULL);
>> - mvebu_memory_find(&phys_base,&phys_size);
>> + (unsigned int)ARMADA_370_XP_TIMER_BASE, 0x30,
>> + IORESOURCE_MEM, NULL);
>> + armada_370_xp_memory_find(&phys_base,&phys_size);
>> arm_add_mem_device("ram0", phys_base, phys_size);
>> + armada_370_xp_add_uart();
>
> How do you want to support a board which uses another UART instead of
> uart0 when you call this from SoC code?
>
> I don't think this line should be here.
Sascha,
there is a CONFIG_MVEBU_CONSOLE_UART introduced in patch 3. You can
select the debug console which defaults to 0 for all SoCs.
It is converted to the console uart above:
+#define CONSOLE_UART_BASE \
+ ARMADA_370_XP_UARTn_BASE(CONFIG_MVEBU_CONSOLE_UART)
Sebastian
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^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [PATCH 05/11] arm: mvebu: convert Armada 370/XP to common init
2013-05-21 6:28 ` Sascha Hauer
2013-05-21 6:32 ` Sebastian Hesselbarth
@ 2013-05-21 6:33 ` Sascha Hauer
2013-05-21 6:38 ` Sebastian Hesselbarth
1 sibling, 1 reply; 23+ messages in thread
From: Sascha Hauer @ 2013-05-21 6:33 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
On Tue, May 21, 2013 at 08:28:10AM +0200, Sascha Hauer wrote:
> Sebastian,
>
> > +static int armada_370_xp_init_soc(void)
> > {
> > unsigned long phys_base, phys_size;
> >
> > - mvebu_init_clocks();
> > + armada_370_xp_init_clocks();
> > add_generic_device("mvebu-timer", DEVICE_ID_SINGLE, NULL,
> > - MVEBU_TIMER_BASE, 0x30, IORESOURCE_MEM,
> > - NULL);
> > - mvebu_memory_find(&phys_base, &phys_size);
> > + (unsigned int)ARMADA_370_XP_TIMER_BASE, 0x30,
> > + IORESOURCE_MEM, NULL);
> > + armada_370_xp_memory_find(&phys_base, &phys_size);
> > arm_add_mem_device("ram0", phys_base, phys_size);
> > + armada_370_xp_add_uart();
>
> How do you want to support a board which uses another UART instead of
> uart0 when you call this from SoC code?
Ok, I see. You use CONFIG_MVEBU_CONSOLE_UART to determine an UART base.
What's the rationale for doing this? We don't want to have compile time
decisions for things we know at runtime.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [PATCH 05/11] arm: mvebu: convert Armada 370/XP to common init
2013-05-21 6:33 ` Sascha Hauer
@ 2013-05-21 6:38 ` Sebastian Hesselbarth
2013-05-21 6:47 ` Sascha Hauer
0 siblings, 1 reply; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-21 6:38 UTC (permalink / raw)
To: Sascha Hauer; +Cc: Thomas Petazzoni, barebox
On 05/21/2013 08:33 AM, Sascha Hauer wrote:
> On Tue, May 21, 2013 at 08:28:10AM +0200, Sascha Hauer wrote:
>> Sebastian,
>>
>>> +static int armada_370_xp_init_soc(void)
>>> {
>>> unsigned long phys_base, phys_size;
>>>
>>> - mvebu_init_clocks();
>>> + armada_370_xp_init_clocks();
>>> add_generic_device("mvebu-timer", DEVICE_ID_SINGLE, NULL,
>>> - MVEBU_TIMER_BASE, 0x30, IORESOURCE_MEM,
>>> - NULL);
>>> - mvebu_memory_find(&phys_base,&phys_size);
>>> + (unsigned int)ARMADA_370_XP_TIMER_BASE, 0x30,
>>> + IORESOURCE_MEM, NULL);
>>> + armada_370_xp_memory_find(&phys_base,&phys_size);
>>> arm_add_mem_device("ram0", phys_base, phys_size);
>>> + armada_370_xp_add_uart();
>>
>> How do you want to support a board which uses another UART instead of
>> uart0 when you call this from SoC code?
>
> Ok, I see. You use CONFIG_MVEBU_CONSOLE_UART to determine an UART base.
> What's the rationale for doing this? We don't want to have compile time
> decisions for things we know at runtime.
How do you know the UART console by runtime? It can be on any UART
possible. Anyway, as we are moving to DT with the next patches, all
enabled uarts will be registered.
But leaves the question, how to get the correct UART for console?
Sebastian
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^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [PATCH 05/11] arm: mvebu: convert Armada 370/XP to common init
2013-05-21 6:38 ` Sebastian Hesselbarth
@ 2013-05-21 6:47 ` Sascha Hauer
2013-05-21 7:16 ` Sebastian Hesselbarth
0 siblings, 1 reply; 23+ messages in thread
From: Sascha Hauer @ 2013-05-21 6:47 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
On Tue, May 21, 2013 at 08:38:26AM +0200, Sebastian Hesselbarth wrote:
> On 05/21/2013 08:33 AM, Sascha Hauer wrote:
> >On Tue, May 21, 2013 at 08:28:10AM +0200, Sascha Hauer wrote:
> >>Sebastian,
> >>
> >>>+static int armada_370_xp_init_soc(void)
> >>> {
> >>> unsigned long phys_base, phys_size;
> >>>
> >>>- mvebu_init_clocks();
> >>>+ armada_370_xp_init_clocks();
> >>> add_generic_device("mvebu-timer", DEVICE_ID_SINGLE, NULL,
> >>>- MVEBU_TIMER_BASE, 0x30, IORESOURCE_MEM,
> >>>- NULL);
> >>>- mvebu_memory_find(&phys_base,&phys_size);
> >>>+ (unsigned int)ARMADA_370_XP_TIMER_BASE, 0x30,
> >>>+ IORESOURCE_MEM, NULL);
> >>>+ armada_370_xp_memory_find(&phys_base,&phys_size);
> >>> arm_add_mem_device("ram0", phys_base, phys_size);
> >>>+ armada_370_xp_add_uart();
> >>
> >>How do you want to support a board which uses another UART instead of
> >>uart0 when you call this from SoC code?
> >
> >Ok, I see. You use CONFIG_MVEBU_CONSOLE_UART to determine an UART base.
> >What's the rationale for doing this? We don't want to have compile time
> >decisions for things we know at runtime.
>
> How do you know the UART console by runtime? It can be on any UART
> possible.
Well ok, you can't really know it at runtime, but you could use multiple
consoles or maybe you could register a specific uart based on a
configuration option in the environment or some bootstrap pin. These
are all not very common examples, but I think you shouldn't prevent them
in your SoC code.
> Anyway, as we are moving to DT with the next patches, all
> enabled uarts will be registered.
>
> But leaves the question, how to get the correct UART for console?
Using the linux,stdout-path property in the chosen node.
Sascha
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^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [PATCH 05/11] arm: mvebu: convert Armada 370/XP to common init
2013-05-21 6:47 ` Sascha Hauer
@ 2013-05-21 7:16 ` Sebastian Hesselbarth
0 siblings, 0 replies; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-21 7:16 UTC (permalink / raw)
To: Sascha Hauer; +Cc: Thomas Petazzoni, barebox
On 05/21/2013 08:47 AM, Sascha Hauer wrote:
> On Tue, May 21, 2013 at 08:38:26AM +0200, Sebastian Hesselbarth wrote:
>> On 05/21/2013 08:33 AM, Sascha Hauer wrote:
>>> On Tue, May 21, 2013 at 08:28:10AM +0200, Sascha Hauer wrote:
>>>>> + armada_370_xp_add_uart();
>>>>
>>>> How do you want to support a board which uses another UART instead of
>>>> uart0 when you call this from SoC code?
>>>
>>> Ok, I see. You use CONFIG_MVEBU_CONSOLE_UART to determine an UART base.
>>> What's the rationale for doing this? We don't want to have compile time
>>> decisions for things we know at runtime.
>>
>> How do you know the UART console by runtime? It can be on any UART
>> possible.
>
> Well ok, you can't really know it at runtime, but you could use multiple
> consoles or maybe you could register a specific uart based on a
> configuration option in the environment or some bootstrap pin. These
> are all not very common examples, but I think you shouldn't prevent them
> in your SoC code.
>
>> Anyway, as we are moving to DT with the next patches, all
>> enabled uarts will be registered.
>>
>> But leaves the question, how to get the correct UART for console?
>
> Using the linux,stdout-path property in the chosen node.
Well, okay then consider the above a temporary compile time config
option that will be removed as soon as DT patches come. ;)
Sebastian
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^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH 06/11] arm: mvebu: convert Kirkwood to common init
2013-05-19 18:23 [PATCH 00/11] arm: mvebu: SoC consolidation Sebastian Hesselbarth
` (4 preceding siblings ...)
2013-05-19 18:23 ` [PATCH 05/11] arm: mvebu: convert Armada 370/XP " Sebastian Hesselbarth
@ 2013-05-19 18:23 ` Sebastian Hesselbarth
2013-05-19 18:23 ` [PATCH 07/11] arm: mvebu: convert SolidRun CuBox " Sebastian Hesselbarth
` (6 subsequent siblings)
12 siblings, 0 replies; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-19 18:23 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
This patch converts Marvell Kirkwood SoC init to make use of common
lowlevel and init functions. Postcore initcall will now probe real memory
size, and setup UART console by config option.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
---
arch/arm/mach-mvebu/include/mach/kirkwood-regs.h | 45 ++++++++++++++--------
arch/arm/mach-mvebu/kirkwood.c | 44 ++++++++++-----------
2 files changed, 49 insertions(+), 40 deletions(-)
diff --git a/arch/arm/mach-mvebu/include/mach/kirkwood-regs.h b/arch/arm/mach-mvebu/include/mach/kirkwood-regs.h
index 23e221b..39fa379 100644
--- a/arch/arm/mach-mvebu/include/mach/kirkwood-regs.h
+++ b/arch/arm/mach-mvebu/include/mach/kirkwood-regs.h
@@ -17,21 +17,34 @@
#ifndef __MACH_MVEBU_KIRKWOOD_REGS_H
#define __MACH_MVEBU_KIRKWOOD_REGS_H
-#define KIRKWOOD_INT_REGS_BASE IOMEM(0xd0000000)
-
-#define KIRKWOOD_SDRAM_WIN_BASE (KIRKWOOD_INT_REGS_BASE + 0x1500)
-#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3))
-#define DDR_BASE_CS_HIGH_MASK 0xf
-#define DDR_BASE_CS_LOW_MASK 0xff000000
-#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3))
-#define DDR_SIZE_ENABLED (1 << 0)
-#define DDR_SIZE_CS_MASK 0x1c
-#define DDR_SIZE_CS_SHIFT 2
-#define DDR_SIZE_MASK 0xff000000
-#define KIRKWOOD_SAR_BASE (KIRKWOOD_INT_REGS_BASE + 0x10030)
-#define KIRKWOOD_TCLK_BIT 21
-#define KIRKWOOD_UART_BASE (KIRKWOOD_INT_REGS_BASE + 0x12000)
-#define KIRKWOOD_CPUCTRL_BASE (KIRKWOOD_INT_REGS_BASE + 0x20100)
-#define KIRKWOOD_TIMER_BASE (KIRKWOOD_INT_REGS_BASE + 0x20300)
+#include <mach/common.h>
+
+#define KIRKWOOD_INT_REGS_BASE IOMEM(MVEBU_REMAP_INT_REG_BASE)
+
+#define KIRKWOOD_SDRAM_BASE (KIRKWOOD_INT_REGS_BASE + 0x00000)
+#define DDR_BASE_CS 0x1500
+#define DDR_BASE_CSn(n) (DDR_BASE_CS + ((n) * 0x8))
+#define DDR_BASE_CS_HIGH_MASK 0x0000000f
+#define DDR_BASE_CS_LOW_MASK 0xff000000
+#define DDR_SIZE_CS 0x1504
+#define DDR_SIZE_CSn(n) (DDR_SIZE_CS + ((n) * 0x8))
+#define DDR_SIZE_ENABLED BIT(0)
+#define DDR_SIZE_CS_MASK 0x1c
+#define DDR_SIZE_CS_SHIFT 2
+#define DDR_SIZE_MASK 0xff000000
+
+#define KIRKWOOD_SAR_BASE (KIRKWOOD_INT_REGS_BASE + 0x10030)
+#define SAR_TCLK_FREQ BIT(21)
+
+#define KIRKWOOD_UART_BASE (KIRKWOOD_INT_REGS_BASE + 0x12000)
+#define KIRKWOOD_UARTn_BASE(n) (KIRKWOOD_UART_BASE + ((n) * 0x100))
+
+#define KIRKWOOD_BRIDGE_BASE (KIRKWOOD_INT_REGS_BASE + 0x20000)
+#define BRIDGE_RSTOUT_MASK 0x108
+#define SOFT_RESET_OUT_EN BIT(2)
+#define BRIDGE_SYS_SOFT_RESET 0x10c
+#define SOFT_RESET_EN BIT(0)
+
+#define KIRKWOOD_TIMER_BASE (KIRKWOOD_INT_REGS_BASE + 0x20300)
#endif /* __MACH_MVEBU_KIRKWOOD_REGS_H */
diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c
index b5b6aaf..3e16f41 100644
--- a/arch/arm/mach-mvebu/kirkwood.c
+++ b/arch/arm/mach-mvebu/kirkwood.c
@@ -16,30 +16,30 @@
#include <common.h>
#include <init.h>
#include <io.h>
+#include <ns16550.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
-#include <ns16550.h>
-#include <mach/kirkwood-regs.h>
#include <asm/memory.h>
-#include <asm/barebox-arm.h>
+#include <mach/kirkwood-regs.h>
+
+#define CONSOLE_UART_BASE KIRKWOOD_UARTn_BASE(CONFIG_MVEBU_CONSOLE_UART)
static struct clk *tclk;
static inline void kirkwood_memory_find(unsigned long *phys_base,
- unsigned long *phys_size)
+ unsigned long *phys_size)
{
- void __iomem *sdram_win = IOMEM(KIRKWOOD_SDRAM_WIN_BASE);
int cs;
*phys_base = ~0;
*phys_size = 0;
for (cs = 0; cs < 4; cs++) {
- uint32_t base = readl(sdram_win + DDR_BASE_CS_OFF(cs));
- uint32_t ctrl = readl(sdram_win + DDR_SIZE_CS_OFF(cs));
+ u32 base = readl(KIRKWOOD_SDRAM_BASE + DDR_BASE_CSn(cs));
+ u32 ctrl = readl(KIRKWOOD_SDRAM_BASE + DDR_SIZE_CSn(cs));
/* Skip non-enabled CS */
- if (! (ctrl & DDR_SIZE_ENABLED))
+ if ((ctrl & DDR_SIZE_ENABLED) != DDR_SIZE_ENABLED)
continue;
base &= DDR_BASE_CS_LOW_MASK;
@@ -49,34 +49,30 @@ static inline void kirkwood_memory_find(unsigned long *phys_base,
}
}
-void __naked __noreturn kirkwood_barebox_entry(void)
-{
- unsigned long phys_base, phys_size;
- kirkwood_memory_find(&phys_base, &phys_size);
- writel('E', 0xD0012000);
- barebox_arm_entry(phys_base, phys_size, 0);
-}
-
static struct NS16550_plat uart_plat = {
.shift = 2,
};
-int kirkwood_add_uart0(void)
+static int kirkwood_add_uart(void)
{
uart_plat.clock = clk_get_rate(tclk);
if (!add_ns16550_device(DEVICE_ID_DYNAMIC,
- (unsigned int)KIRKWOOD_UART_BASE,
- 32, IORESOURCE_MEM_32BIT, &uart_plat))
+ (unsigned int)CONSOLE_UART_BASE, 32,
+ IORESOURCE_MEM_32BIT, &uart_plat))
return -ENODEV;
return 0;
}
static int kirkwood_init_clocks(void)
{
- uint32_t sar = readl(KIRKWOOD_SAR_BASE);
+ u32 val = readl(KIRKWOOD_SAR_BASE);
unsigned int rate;
- if (sar & (1 << KIRKWOOD_TCLK_BIT))
+ /*
+ * On Kirkwood, the TCLK frequency can be either
+ * 166 Mhz or 200 Mhz
+ */
+ if ((val & SAR_TCLK_FREQ) == SAR_TCLK_FREQ)
rate = 166666667;
else
rate = 200000000;
@@ -95,16 +91,16 @@ static int kirkwood_init_soc(void)
IORESOURCE_MEM, NULL);
kirkwood_memory_find(&phys_base, &phys_size);
arm_add_mem_device("ram0", phys_base, phys_size);
+ kirkwood_add_uart();
return 0;
}
-
postcore_initcall(kirkwood_init_soc);
void __noreturn reset_cpu(unsigned long addr)
{
- writel(0x4, KIRKWOOD_CPUCTRL_BASE + 0x8);
- writel(0x1, KIRKWOOD_CPUCTRL_BASE + 0xC);
+ writel(SOFT_RESET_OUT_EN, KIRKWOOD_BRIDGE_BASE + BRIDGE_RSTOUT_MASK);
+ writel(SOFT_RESET_EN, KIRKWOOD_BRIDGE_BASE + BRIDGE_SYS_SOFT_RESET);
for(;;)
;
}
--
1.7.10.4
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^ permalink raw reply [flat|nested] 23+ messages in thread* [PATCH 07/11] arm: mvebu: convert SolidRun CuBox to common init
2013-05-19 18:23 [PATCH 00/11] arm: mvebu: SoC consolidation Sebastian Hesselbarth
` (5 preceding siblings ...)
2013-05-19 18:23 ` [PATCH 06/11] arm: mvebu: convert Kirkwood " Sebastian Hesselbarth
@ 2013-05-19 18:23 ` Sebastian Hesselbarth
2013-05-19 18:23 ` [PATCH 08/11] arm: mvebu: convert Globalscale Mirabox " Sebastian Hesselbarth
` (5 subsequent siblings)
12 siblings, 0 replies; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-19 18:23 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
With Marvell Dove converted to common SoC init, board specific lowlevel
and init code can be removed. This patch leaves an empty board source
file to allow to have board specific quirks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
---
arch/arm/boards/solidrun-cubox/Makefile | 3 +--
.../solidrun-cubox/{solidrun-cubox.c => board.c} | 14 +++--------
arch/arm/boards/solidrun-cubox/lowlevel.c | 26 --------------------
3 files changed, 4 insertions(+), 39 deletions(-)
rename arch/arm/boards/solidrun-cubox/{solidrun-cubox.c => board.c} (66%)
delete mode 100644 arch/arm/boards/solidrun-cubox/lowlevel.c
diff --git a/arch/arm/boards/solidrun-cubox/Makefile b/arch/arm/boards/solidrun-cubox/Makefile
index 6dfe2c8..9320510 100644
--- a/arch/arm/boards/solidrun-cubox/Makefile
+++ b/arch/arm/boards/solidrun-cubox/Makefile
@@ -1,2 +1 @@
-obj-y = solidrun-cubox.o
-lwl-y += lowlevel.o
+obj-y += board.c
diff --git a/arch/arm/boards/solidrun-cubox/solidrun-cubox.c b/arch/arm/boards/solidrun-cubox/board.c
similarity index 66%
rename from arch/arm/boards/solidrun-cubox/solidrun-cubox.c
rename to arch/arm/boards/solidrun-cubox/board.c
index 1abce2f..a28f419 100644
--- a/arch/arm/boards/solidrun-cubox/solidrun-cubox.c
+++ b/arch/arm/boards/solidrun-cubox/board.c
@@ -1,6 +1,6 @@
/*
- * Copyright
- * (C) 2013 Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ * Copyright (C) 2013
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -14,12 +14,4 @@
*
*/
-#include <common.h>
-#include <init.h>
-#include <mach/dove.h>
-
-static int solidrun_cubox_console_init(void)
-{
- return dove_add_uart(0);
-}
-console_initcall(solidrun_cubox_console_init);
+/* empty */
diff --git a/arch/arm/boards/solidrun-cubox/lowlevel.c b/arch/arm/boards/solidrun-cubox/lowlevel.c
deleted file mode 100644
index 8a06cbc..0000000
--- a/arch/arm/boards/solidrun-cubox/lowlevel.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright
- * (C) 2013 Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <common.h>
-#include <mach/dove.h>
-#include <asm/barebox-arm.h>
-#include <asm/barebox-arm-head.h>
-
-void __naked barebox_arm_reset_vector(void)
-{
- arm_cpu_lowlevel_init();
- dove_barebox_entry();
-}
--
1.7.10.4
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^ permalink raw reply [flat|nested] 23+ messages in thread* [PATCH 08/11] arm: mvebu: convert Globalscale Mirabox to common init
2013-05-19 18:23 [PATCH 00/11] arm: mvebu: SoC consolidation Sebastian Hesselbarth
` (6 preceding siblings ...)
2013-05-19 18:23 ` [PATCH 07/11] arm: mvebu: convert SolidRun CuBox " Sebastian Hesselbarth
@ 2013-05-19 18:23 ` Sebastian Hesselbarth
2013-05-19 18:23 ` [PATCH 09/11] arm: mvebu: convert PlatHome OpenBlocks AX3 " Sebastian Hesselbarth
` (4 subsequent siblings)
12 siblings, 0 replies; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-19 18:23 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
With Marvell Armada 370 converted to common SoC init, board specific
lowlevel and init code can be removed. This patch leaves an empty board
source file to allow to have board specific quirks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
---
arch/arm/boards/globalscale-mirabox/Makefile | 3 +--
.../{globalscale-mirabox.c => board.c} | 15 +++--------
arch/arm/boards/globalscale-mirabox/lowlevel.c | 26 --------------------
3 files changed, 4 insertions(+), 40 deletions(-)
rename arch/arm/boards/globalscale-mirabox/{globalscale-mirabox.c => board.c} (63%)
delete mode 100644 arch/arm/boards/globalscale-mirabox/lowlevel.c
diff --git a/arch/arm/boards/globalscale-mirabox/Makefile b/arch/arm/boards/globalscale-mirabox/Makefile
index bd5d47e..9320510 100644
--- a/arch/arm/boards/globalscale-mirabox/Makefile
+++ b/arch/arm/boards/globalscale-mirabox/Makefile
@@ -1,2 +1 @@
-obj-y = globalscale-mirabox.o
-lwl-y += lowlevel.o
+obj-y += board.c
diff --git a/arch/arm/boards/globalscale-mirabox/globalscale-mirabox.c b/arch/arm/boards/globalscale-mirabox/board.c
similarity index 63%
rename from arch/arm/boards/globalscale-mirabox/globalscale-mirabox.c
rename to arch/arm/boards/globalscale-mirabox/board.c
index b8f4bff..9c800c5 100644
--- a/arch/arm/boards/globalscale-mirabox/globalscale-mirabox.c
+++ b/arch/arm/boards/globalscale-mirabox/board.c
@@ -1,5 +1,6 @@
/*
- * Copyright (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ * Copyright
+ * (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -13,14 +14,4 @@
*
*/
-#include <common.h>
-#include <init.h>
-#include <sizes.h>
-#include <mach/mvebu.h>
-
-static int globalscale_mirabox_console_init(void)
-{
- return mvebu_add_uart0();
-}
-
-console_initcall(globalscale_mirabox_console_init);
+/* empty */
diff --git a/arch/arm/boards/globalscale-mirabox/lowlevel.c b/arch/arm/boards/globalscale-mirabox/lowlevel.c
deleted file mode 100644
index 3ca202e..0000000
--- a/arch/arm/boards/globalscale-mirabox/lowlevel.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <common.h>
-#include <sizes.h>
-#include <asm/barebox-arm.h>
-#include <asm/barebox-arm-head.h>
-#include <mach/mvebu.h>
-
-void __naked barebox_arm_reset_vector(void)
-{
- arm_cpu_lowlevel_init();
- mvebu_barebox_entry();
-}
--
1.7.10.4
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^ permalink raw reply [flat|nested] 23+ messages in thread* [PATCH 09/11] arm: mvebu: convert PlatHome OpenBlocks AX3 to common init
2013-05-19 18:23 [PATCH 00/11] arm: mvebu: SoC consolidation Sebastian Hesselbarth
` (7 preceding siblings ...)
2013-05-19 18:23 ` [PATCH 08/11] arm: mvebu: convert Globalscale Mirabox " Sebastian Hesselbarth
@ 2013-05-19 18:23 ` Sebastian Hesselbarth
2013-05-19 18:23 ` [PATCH 10/11] arm: mvebu: convert Marvell Armada XP GP board " Sebastian Hesselbarth
` (3 subsequent siblings)
12 siblings, 0 replies; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-19 18:23 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
With Marvell Armada XP converted to common SoC init, board specific
lowlevel and init code can be removed. This patch leaves an empty board
source file to allow to have board specific quirks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
---
arch/arm/boards/plathome-openblocks-ax3/Makefile | 3 +--
.../{plathome-openblocks-ax3.c => board.c} | 14 +++--------
arch/arm/boards/plathome-openblocks-ax3/lowlevel.c | 25 --------------------
3 files changed, 4 insertions(+), 38 deletions(-)
rename arch/arm/boards/plathome-openblocks-ax3/{plathome-openblocks-ax3.c => board.c} (64%)
delete mode 100644 arch/arm/boards/plathome-openblocks-ax3/lowlevel.c
diff --git a/arch/arm/boards/plathome-openblocks-ax3/Makefile b/arch/arm/boards/plathome-openblocks-ax3/Makefile
index 91dc764..dcfc293 100644
--- a/arch/arm/boards/plathome-openblocks-ax3/Makefile
+++ b/arch/arm/boards/plathome-openblocks-ax3/Makefile
@@ -1,2 +1 @@
-obj-y = plathome-openblocks-ax3.o
-lwl-y += lowlevel.o
+obj-y += board.o
diff --git a/arch/arm/boards/plathome-openblocks-ax3/plathome-openblocks-ax3.c b/arch/arm/boards/plathome-openblocks-ax3/board.c
similarity index 64%
rename from arch/arm/boards/plathome-openblocks-ax3/plathome-openblocks-ax3.c
rename to arch/arm/boards/plathome-openblocks-ax3/board.c
index 9daf020..9c800c5 100644
--- a/arch/arm/boards/plathome-openblocks-ax3/plathome-openblocks-ax3.c
+++ b/arch/arm/boards/plathome-openblocks-ax3/board.c
@@ -1,5 +1,6 @@
/*
- * Copyright (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ * Copyright
+ * (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -13,13 +14,4 @@
*
*/
-#include <common.h>
-#include <init.h>
-#include <mach/mvebu.h>
-
-static int plathome_openblocks_ax3_console_init(void)
-{
- return mvebu_add_uart0();
-}
-
-console_initcall(plathome_openblocks_ax3_console_init);
+/* empty */
diff --git a/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c b/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c
deleted file mode 100644
index e9b2e30..0000000
--- a/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * Copyright (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <common.h>
-#include <mach/mvebu.h>
-#include <asm/barebox-arm.h>
-#include <asm/barebox-arm-head.h>
-
-void __naked barebox_arm_reset_vector(void)
-{
- arm_cpu_lowlevel_init();
- mvebu_barebox_entry();
-}
--
1.7.10.4
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barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 23+ messages in thread* [PATCH 10/11] arm: mvebu: convert Marvell Armada XP GP board to common init
2013-05-19 18:23 [PATCH 00/11] arm: mvebu: SoC consolidation Sebastian Hesselbarth
` (8 preceding siblings ...)
2013-05-19 18:23 ` [PATCH 09/11] arm: mvebu: convert PlatHome OpenBlocks AX3 " Sebastian Hesselbarth
@ 2013-05-19 18:23 ` Sebastian Hesselbarth
2013-05-19 18:23 ` [PATCH 11/11] arm: mvebu: convert Globalscale Guruplug " Sebastian Hesselbarth
` (2 subsequent siblings)
12 siblings, 0 replies; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-19 18:23 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
With Marvell Armada XP converted to common SoC init, board specific
lowlevel and init code can be removed. This patch leaves an empty board
source file to allow to have board specific quirks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
---
arch/arm/boards/marvell-armada-xp-gp/Makefile | 3 +--
.../{marvell-armada-xp-gp.c => board.c} | 14 +++--------
arch/arm/boards/marvell-armada-xp-gp/lowlevel.c | 25 --------------------
3 files changed, 4 insertions(+), 38 deletions(-)
rename arch/arm/boards/marvell-armada-xp-gp/{marvell-armada-xp-gp.c => board.c} (65%)
delete mode 100644 arch/arm/boards/marvell-armada-xp-gp/lowlevel.c
diff --git a/arch/arm/boards/marvell-armada-xp-gp/Makefile b/arch/arm/boards/marvell-armada-xp-gp/Makefile
index ea89963..dcfc293 100644
--- a/arch/arm/boards/marvell-armada-xp-gp/Makefile
+++ b/arch/arm/boards/marvell-armada-xp-gp/Makefile
@@ -1,2 +1 @@
-obj-y = marvell-armada-xp-gp.o
-lwl-y += lowlevel.o
+obj-y += board.o
diff --git a/arch/arm/boards/marvell-armada-xp-gp/marvell-armada-xp-gp.c b/arch/arm/boards/marvell-armada-xp-gp/board.c
similarity index 65%
rename from arch/arm/boards/marvell-armada-xp-gp/marvell-armada-xp-gp.c
rename to arch/arm/boards/marvell-armada-xp-gp/board.c
index 7351329..9c800c5 100644
--- a/arch/arm/boards/marvell-armada-xp-gp/marvell-armada-xp-gp.c
+++ b/arch/arm/boards/marvell-armada-xp-gp/board.c
@@ -1,5 +1,6 @@
/*
- * Copyright (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ * Copyright
+ * (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -13,13 +14,4 @@
*
*/
-#include <common.h>
-#include <init.h>
-#include <mach/mvebu.h>
-
-static int marvell_armada_xp_gp_console_init(void)
-{
- return mvebu_add_uart0();
-}
-
-console_initcall(marvell_armada_xp_gp_console_init);
+/* empty */
diff --git a/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c b/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c
deleted file mode 100644
index e9b2e30..0000000
--- a/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * Copyright (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <common.h>
-#include <mach/mvebu.h>
-#include <asm/barebox-arm.h>
-#include <asm/barebox-arm-head.h>
-
-void __naked barebox_arm_reset_vector(void)
-{
- arm_cpu_lowlevel_init();
- mvebu_barebox_entry();
-}
--
1.7.10.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 23+ messages in thread* [PATCH 11/11] arm: mvebu: convert Globalscale Guruplug to common init
2013-05-19 18:23 [PATCH 00/11] arm: mvebu: SoC consolidation Sebastian Hesselbarth
` (9 preceding siblings ...)
2013-05-19 18:23 ` [PATCH 10/11] arm: mvebu: convert Marvell Armada XP GP board " Sebastian Hesselbarth
@ 2013-05-19 18:23 ` Sebastian Hesselbarth
2013-05-19 18:41 ` [PATCH 00/11] arm: mvebu: SoC consolidation Thomas Petazzoni
2013-05-19 18:42 ` Thomas Petazzoni
12 siblings, 0 replies; 23+ messages in thread
From: Sebastian Hesselbarth @ 2013-05-19 18:23 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: Thomas Petazzoni, barebox
With Marvell Kirkwood converted to common SoC init, board specific
lowlevel and init code can be removed. This patch leaves an empty board
source file to allow to have board specific quirks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
---
arch/arm/boards/globalscale-guruplug/Makefile | 3 +--
.../{globalscale-guruplug.c => board.c} | 15 +++--------
arch/arm/boards/globalscale-guruplug/lowlevel.c | 26 --------------------
3 files changed, 4 insertions(+), 40 deletions(-)
rename arch/arm/boards/globalscale-guruplug/{globalscale-guruplug.c => board.c} (63%)
delete mode 100644 arch/arm/boards/globalscale-guruplug/lowlevel.c
diff --git a/arch/arm/boards/globalscale-guruplug/Makefile b/arch/arm/boards/globalscale-guruplug/Makefile
index 3b48b32..dcfc293 100644
--- a/arch/arm/boards/globalscale-guruplug/Makefile
+++ b/arch/arm/boards/globalscale-guruplug/Makefile
@@ -1,2 +1 @@
-obj-y = globalscale-guruplug.o
-lwl-y += lowlevel.o
+obj-y += board.o
diff --git a/arch/arm/boards/globalscale-guruplug/globalscale-guruplug.c b/arch/arm/boards/globalscale-guruplug/board.c
similarity index 63%
rename from arch/arm/boards/globalscale-guruplug/globalscale-guruplug.c
rename to arch/arm/boards/globalscale-guruplug/board.c
index dfc1d1a..9c800c5 100644
--- a/arch/arm/boards/globalscale-guruplug/globalscale-guruplug.c
+++ b/arch/arm/boards/globalscale-guruplug/board.c
@@ -1,5 +1,6 @@
/*
- * Copyright (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ * Copyright
+ * (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -13,14 +14,4 @@
*
*/
-#include <common.h>
-#include <init.h>
-#include <sizes.h>
-#include <mach/kirkwood.h>
-
-static int globalscale_guruplug_console_init(void)
-{
- return kirkwood_add_uart0();
-}
-
-console_initcall(globalscale_guruplug_console_init);
+/* empty */
diff --git a/arch/arm/boards/globalscale-guruplug/lowlevel.c b/arch/arm/boards/globalscale-guruplug/lowlevel.c
deleted file mode 100644
index d270cda..0000000
--- a/arch/arm/boards/globalscale-guruplug/lowlevel.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <common.h>
-#include <sizes.h>
-#include <asm/barebox-arm.h>
-#include <asm/barebox-arm-head.h>
-#include <mach/kirkwood.h>
-
-void __naked barebox_arm_reset_vector(void)
-{
- arm_cpu_lowlevel_init();
- kirkwood_barebox_entry();
-}
--
1.7.10.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [PATCH 00/11] arm: mvebu: SoC consolidation
2013-05-19 18:23 [PATCH 00/11] arm: mvebu: SoC consolidation Sebastian Hesselbarth
` (10 preceding siblings ...)
2013-05-19 18:23 ` [PATCH 11/11] arm: mvebu: convert Globalscale Guruplug " Sebastian Hesselbarth
@ 2013-05-19 18:41 ` Thomas Petazzoni
2013-05-19 18:42 ` Thomas Petazzoni
12 siblings, 0 replies; 23+ messages in thread
From: Thomas Petazzoni @ 2013-05-19 18:41 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: barebox
Dear Sebastian Hesselbarth,
On Sun, 19 May 2013 20:23:44 +0200, Sebastian Hesselbarth wrote:
> After power-up, Marvell EBU SoCs are common enough to justify common
> init code. All SoCs start up with internal registers mapped at 0xd0000000
> and Linux wants them remapped to 0xf1000000 which gives ~512M contiguous
> address space. As internal registers base address is remapped from within
> internal registers itself, we do this remap as soon as possible.
>
> This patch set consolidates lowlevel init for all MVEBU SoCs which is
> currently performed on every board supported. Also common console UART
> is created. Then Dove, Armada 370/XP, and Kirkwood are moved to use
> common init functions, and finally all board specific init is removed
> to its bare minimum.
>
> The patch set has been tested on CuBox (Dove), Guruplug (Kirkwood),
> Mirabox and OpenBlocks AX3 (Armada 370) by either me or Thomas Petazzoni.
Minor comment: OpenBlocks AX3 is an Armada XP machine.
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [PATCH 00/11] arm: mvebu: SoC consolidation
2013-05-19 18:23 [PATCH 00/11] arm: mvebu: SoC consolidation Sebastian Hesselbarth
` (11 preceding siblings ...)
2013-05-19 18:41 ` [PATCH 00/11] arm: mvebu: SoC consolidation Thomas Petazzoni
@ 2013-05-19 18:42 ` Thomas Petazzoni
12 siblings, 0 replies; 23+ messages in thread
From: Thomas Petazzoni @ 2013-05-19 18:42 UTC (permalink / raw)
To: Sebastian Hesselbarth; +Cc: barebox
Dear Sebastian Hesselbarth,
On Sun, 19 May 2013 20:23:44 +0200, Sebastian Hesselbarth wrote:
> After power-up, Marvell EBU SoCs are common enough to justify common
> init code. All SoCs start up with internal registers mapped at 0xd0000000
> and Linux wants them remapped to 0xf1000000 which gives ~512M contiguous
> address space. As internal registers base address is remapped from within
> internal registers itself, we do this remap as soon as possible.
>
> This patch set consolidates lowlevel init for all MVEBU SoCs which is
> currently performed on every board supported. Also common console UART
> is created. Then Dove, Armada 370/XP, and Kirkwood are moved to use
> common init functions, and finally all board specific init is removed
> to its bare minimum.
>
> The patch set has been tested on CuBox (Dove), Guruplug (Kirkwood),
> Mirabox and OpenBlocks AX3 (Armada 370) by either me or Thomas Petazzoni.
>
> Sebastian Hesselbarth (11):
> arm: mvebu: add more visible SoC separators to Kconfig
> arm: mvebu: introduce common lowlevel and early init
> arm: mvebu: introduce common console UART config
> arm: mvebu: convert Dove to common init
> arm: mvebu: convert Armada 370/XP to common init
> arm: mvebu: convert Kirkwood to common init
> arm: mvebu: convert SolidRun CuBox to common init
> arm: mvebu: convert Globalscale Mirabox to common init
> arm: mvebu: convert PlatHome OpenBlocks AX3 to common init
> arm: mvebu: convert Marvell Armada XP GP board to common init
> arm: mvebu: convert Globalscale Guruplug to common init
For the entire series:
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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^ permalink raw reply [flat|nested] 23+ messages in thread