* [PATCH] ARM: invalidate data caches during early init
@ 2013-05-17 8:35 Sascha Hauer
2013-05-17 19:06 ` Lucas Stach
0 siblings, 1 reply; 4+ messages in thread
From: Sascha Hauer @ 2013-05-17 8:35 UTC (permalink / raw)
To: barebox; +Cc: Enrico Scholz
Some SoCs come up with invalid entries in the data cache. This can
lead to memory corruption when we enable them later, so invalidate
the caches early.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CC: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
---
This is based on the patches Enrico recently sent. Enrico, I hope
this fixes your data cache issues in a way that you do not have
to add this to your board code.
arch/arm/cpu/cache.c | 21 +++++++++++++++++++++
arch/arm/cpu/start-pbl.c | 2 ++
arch/arm/cpu/start.c | 2 ++
arch/arm/include/asm/cache.h | 5 +++++
4 files changed, 30 insertions(+)
diff --git a/arch/arm/cpu/cache.c b/arch/arm/cpu/cache.c
index 95c8338..7aab55b 100644
--- a/arch/arm/cpu/cache.c
+++ b/arch/arm/cpu/cache.c
@@ -134,3 +134,24 @@ void arm_early_mmu_cache_flush(void)
#endif
}
}
+
+void v7_mmu_cache_invalidate(void);
+
+void arm_early_mmu_cache_invalidate(void)
+{
+ switch (arm_early_get_cpu_architecture()) {
+ case CPU_ARCH_ARMv4T:
+ case CPU_ARCH_ARMv5:
+ case CPU_ARCH_ARMv5T:
+ case CPU_ARCH_ARMv5TE:
+ case CPU_ARCH_ARMv5TEJ:
+ case CPU_ARCH_ARMv6:
+ asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0));
+ return;
+#ifdef CONFIG_CPU_32v7
+ case CPU_ARCH_ARMv7:
+ v7_mmu_cache_invalidate();
+ return;
+#endif
+ }
+}
diff --git a/arch/arm/cpu/start-pbl.c b/arch/arm/cpu/start-pbl.c
index 6f03c4a..3ef0118 100644
--- a/arch/arm/cpu/start-pbl.c
+++ b/arch/arm/cpu/start-pbl.c
@@ -59,6 +59,8 @@ static noinline __noreturn void __barebox_arm_entry(uint32_t membase,
endmem -= STACK_SIZE; /* stack */
+ arm_early_mmu_cache_invalidate();
+
if (IS_ENABLED(CONFIG_PBL_RELOCATABLE))
relocate_to_current_adr();
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 580c1fe..5a3c629 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -124,6 +124,8 @@ void __naked __noreturn barebox_arm_entry(uint32_t membase, uint32_t memsize,
{
arm_setup_stack(membase + memsize - 16);
+ arm_early_mmu_cache_invalidate();
+
__start(membase, memsize, boarddata);
}
#else
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index e5621eb..f5f8bf3 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -10,10 +10,15 @@ int arm_set_cache_functions(void);
#ifdef CONFIG_MMU
void arm_early_mmu_cache_flush(void);
+void arm_early_mmu_cache_invalidate(void);
#else
static inline void arm_early_mmu_cache_flush(void)
{
}
+
+static inline void arm_early_mmu_cache_invalidate(void)
+{
+}
#endif
#endif
--
1.8.2.rc2
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^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] ARM: invalidate data caches during early init
2013-05-17 8:35 [PATCH] ARM: invalidate data caches during early init Sascha Hauer
@ 2013-05-17 19:06 ` Lucas Stach
2013-05-18 9:11 ` Sascha Hauer
0 siblings, 1 reply; 4+ messages in thread
From: Lucas Stach @ 2013-05-17 19:06 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox, Enrico Scholz
[-- Attachment #1.1: Type: text/plain, Size: 3001 bytes --]
Am Freitag, den 17.05.2013, 10:35 +0200 schrieb Sascha Hauer:
> Some SoCs come up with invalid entries in the data cache. This can
> lead to memory corruption when we enable them later, so invalidate
> the caches early.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> CC: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Lucas Stach <l.stach@pengutronix.de>
> ---
>
> This is based on the patches Enrico recently sent. Enrico, I hope
> this fixes your data cache issues in a way that you do not have
> to add this to your board code.
>
> arch/arm/cpu/cache.c | 21 +++++++++++++++++++++
> arch/arm/cpu/start-pbl.c | 2 ++
> arch/arm/cpu/start.c | 2 ++
> arch/arm/include/asm/cache.h | 5 +++++
> 4 files changed, 30 insertions(+)
>
> diff --git a/arch/arm/cpu/cache.c b/arch/arm/cpu/cache.c
> index 95c8338..7aab55b 100644
> --- a/arch/arm/cpu/cache.c
> +++ b/arch/arm/cpu/cache.c
> @@ -134,3 +134,24 @@ void arm_early_mmu_cache_flush(void)
> #endif
> }
> }
> +
> +void v7_mmu_cache_invalidate(void);
> +
> +void arm_early_mmu_cache_invalidate(void)
> +{
> + switch (arm_early_get_cpu_architecture()) {
> + case CPU_ARCH_ARMv4T:
> + case CPU_ARCH_ARMv5:
> + case CPU_ARCH_ARMv5T:
> + case CPU_ARCH_ARMv5TE:
> + case CPU_ARCH_ARMv5TEJ:
> + case CPU_ARCH_ARMv6:
> + asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0));
> + return;
> +#ifdef CONFIG_CPU_32v7
> + case CPU_ARCH_ARMv7:
> + v7_mmu_cache_invalidate();
> + return;
> +#endif
> + }
> +}
> diff --git a/arch/arm/cpu/start-pbl.c b/arch/arm/cpu/start-pbl.c
> index 6f03c4a..3ef0118 100644
> --- a/arch/arm/cpu/start-pbl.c
> +++ b/arch/arm/cpu/start-pbl.c
> @@ -59,6 +59,8 @@ static noinline __noreturn void __barebox_arm_entry(uint32_t membase,
>
> endmem -= STACK_SIZE; /* stack */
>
> + arm_early_mmu_cache_invalidate();
> +
> if (IS_ENABLED(CONFIG_PBL_RELOCATABLE))
> relocate_to_current_adr();
>
> diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
> index 580c1fe..5a3c629 100644
> --- a/arch/arm/cpu/start.c
> +++ b/arch/arm/cpu/start.c
> @@ -124,6 +124,8 @@ void __naked __noreturn barebox_arm_entry(uint32_t membase, uint32_t memsize,
> {
> arm_setup_stack(membase + memsize - 16);
>
> + arm_early_mmu_cache_invalidate();
> +
> __start(membase, memsize, boarddata);
> }
> #else
> diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
> index e5621eb..f5f8bf3 100644
> --- a/arch/arm/include/asm/cache.h
> +++ b/arch/arm/include/asm/cache.h
> @@ -10,10 +10,15 @@ int arm_set_cache_functions(void);
>
> #ifdef CONFIG_MMU
> void arm_early_mmu_cache_flush(void);
> +void arm_early_mmu_cache_invalidate(void);
> #else
> static inline void arm_early_mmu_cache_flush(void)
> {
> }
> +
> +static inline void arm_early_mmu_cache_invalidate(void)
> +{
> +}
> #endif
>
> #endif
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^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] ARM: invalidate data caches during early init
2013-05-17 19:06 ` Lucas Stach
@ 2013-05-18 9:11 ` Sascha Hauer
2013-05-20 15:21 ` Lucas Stach
0 siblings, 1 reply; 4+ messages in thread
From: Sascha Hauer @ 2013-05-18 9:11 UTC (permalink / raw)
To: Lucas Stach; +Cc: barebox, Enrico Scholz
On Fri, May 17, 2013 at 09:06:45PM +0200, Lucas Stach wrote:
> Am Freitag, den 17.05.2013, 10:35 +0200 schrieb Sascha Hauer:
> > Some SoCs come up with invalid entries in the data cache. This can
> > lead to memory corruption when we enable them later, so invalidate
> > the caches early.
> >
> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > CC: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> Tested-by: Lucas Stach <l.stach@pengutronix.de>
Cool. Does that mean the MMU now works on Tegra?
Sascha
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] ARM: invalidate data caches during early init
2013-05-18 9:11 ` Sascha Hauer
@ 2013-05-20 15:21 ` Lucas Stach
0 siblings, 0 replies; 4+ messages in thread
From: Lucas Stach @ 2013-05-20 15:21 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox, Enrico Scholz
[-- Attachment #1.1: Type: text/plain, Size: 828 bytes --]
Am Samstag, den 18.05.2013, 11:11 +0200 schrieb Sascha Hauer:
> On Fri, May 17, 2013 at 09:06:45PM +0200, Lucas Stach wrote:
> > Am Freitag, den 17.05.2013, 10:35 +0200 schrieb Sascha Hauer:
> > > Some SoCs come up with invalid entries in the data cache. This can
> > > lead to memory corruption when we enable them later, so invalidate
> > > the caches early.
> > >
> > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > > CC: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
> >
> > Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> > Tested-by: Lucas Stach <l.stach@pengutronix.de>
>
> Cool. Does that mean the MMU now works on Tegra?
Yep. I've tested both MMU and EARLY_MMU with this patch applied
(together with some of my WIP stuff) and it now works without any
problems.
Regards,
Lucas
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2013-05-17 8:35 [PATCH] ARM: invalidate data caches during early init Sascha Hauer
2013-05-17 19:06 ` Lucas Stach
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2013-05-20 15:21 ` Lucas Stach
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