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* [PATCH 1/3] ARM: i.MX51: Use IIM for detecting silicon revision
@ 2013-06-17  9:17 Sascha Hauer
  2013-06-17  9:17 ` [PATCH 2/3] ARM: i.MX51: Make imx51_init_lowlevel callable from early init Sascha Hauer
  2013-06-17  9:17 ` [PATCH 3/3] ARM: i.MX51 efikasb: call imx51_lowlevel_init from lowlevel init Sascha Hauer
  0 siblings, 2 replies; 3+ messages in thread
From: Sascha Hauer @ 2013-06-17  9:17 UTC (permalink / raw)
  To: barebox

The IROM is located at physical address 0x0, so reading the
silicon revision from it leads to a NULL pointer dereference
if done too late when the MMU is already enabled. Use the IIM
instead which is also done in the Kernel. This limits the silicon
revisions to 2.0 and 3.0, but I assume the earlier versions are
not seen in the wild anyway.

This also moves the call to imx_set_silicon_revision() out of
imx51_silicon_revision() so that imx51_silicon_revision() can be called
in early init context.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-imx/imx51.c | 28 ++++++++--------------------
 1 file changed, 8 insertions(+), 20 deletions(-)

diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c
index fdf2374..c9f88f5 100644
--- a/arch/arm/mach-imx/imx51.c
+++ b/arch/arm/mach-imx/imx51.c
@@ -22,40 +22,28 @@
 #include <mach/clock-imx51_53.h>
 #include <mach/generic.h>
 
-#define SI_REV 0x48
+#define IIM_SREV 0x24
 
 static int imx51_silicon_revision(void)
 {
-	void __iomem *rom = MX51_IROM_BASE_ADDR;
-	u32 mx51_silicon_revision;
-	u32 rev;
+	void __iomem *iim_base = IOMEM(MX51_IIM_BASE_ADDR);
+	u32 rev = readl(iim_base + IIM_SREV) & 0xff;
 
-	rev = readl(rom + SI_REV);
 	switch (rev) {
-	case 0x1:
-		mx51_silicon_revision = IMX_CHIP_REV_1_0;
-		break;
-	case 0x2:
-		mx51_silicon_revision = IMX_CHIP_REV_1_1;
-		break;
+	case 0x0:
+		return IMX_CHIP_REV_2_0;
 	case 0x10:
-		mx51_silicon_revision = IMX_CHIP_REV_2_0;
-		break;
-	case 0x20:
-		mx51_silicon_revision = IMX_CHIP_REV_3_0;
-		break;
+		return IMX_CHIP_REV_3_0;
 	default:
-		mx51_silicon_revision = 0;
+		return IMX_CHIP_REV_UNKNOWN;
 	}
 
-	imx_set_silicon_revision("i.MX51", mx51_silicon_revision);
-
 	return 0;
 }
 
 static int imx51_init(void)
 {
-	imx51_silicon_revision();
+	imx_set_silicon_revision("i.MX51", imx51_silicon_revision());
 	imx51_boot_save_loc((void *)MX51_SRC_BASE_ADDR);
 
 	if (of_get_root_node())
-- 
1.8.3.1


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^ permalink raw reply	[flat|nested] 3+ messages in thread
* [PATCH 2/3] ARM: i.MX51: Make imx51_init_lowlevel callable from early init
  2013-06-17  9:17 [PATCH 1/3] ARM: i.MX51: Use IIM for detecting silicon revision Sascha Hauer
@ 2013-06-17  9:17 ` Sascha Hauer
  2013-06-17  9:17 ` [PATCH 3/3] ARM: i.MX51 efikasb: call imx51_lowlevel_init from lowlevel init Sascha Hauer
  1 sibling, 0 replies; 3+ messages in thread
From: Sascha Hauer @ 2013-06-17  9:17 UTC (permalink / raw)
  To: barebox

imx_silicon_revision() can't be used from early init context, so
use imx51_silicon_revision() instead.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-imx/Makefile | 1 +
 arch/arm/mach-imx/imx51.c  | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 72125e7..db74d4e 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_IMX27) += imx27.o clk-imx27.o
 obj-$(CONFIG_ARCH_IMX31) += imx31.o clk-imx31.o
 obj-$(CONFIG_ARCH_IMX35) += imx35.o clk-imx35.o
 obj-$(CONFIG_ARCH_IMX51) += imx51.o imx5.o clk-imx5.o
+pbl-$(CONFIG_ARCH_IMX51) += imx51.o imx5.o
 obj-$(CONFIG_ARCH_IMX53) += imx53.o imx5.o clk-imx5.o esdctl-v4.o
 pbl-$(CONFIG_ARCH_IMX53) += imx53.o imx5.o esdctl-v4.o
 obj-$(CONFIG_ARCH_IMX6) += imx6.o usb-imx6.o clk-imx6.o
diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c
index c9f88f5..c75534e 100644
--- a/arch/arm/mach-imx/imx51.c
+++ b/arch/arm/mach-imx/imx51.c
@@ -137,7 +137,7 @@ void imx51_init_lowlevel(unsigned int cpufreq_mhz)
 {
 	void __iomem *ccm = (void __iomem *)MX51_CCM_BASE_ADDR;
 	u32 r;
-	int rev = imx_silicon_revision();
+	int rev = imx51_silicon_revision();
 
 	imx5_init_lowlevel();
 
-- 
1.8.3.1


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^ permalink raw reply	[flat|nested] 3+ messages in thread
* [PATCH 3/3] ARM: i.MX51 efikasb: call imx51_lowlevel_init from lowlevel init
  2013-06-17  9:17 [PATCH 1/3] ARM: i.MX51: Use IIM for detecting silicon revision Sascha Hauer
  2013-06-17  9:17 ` [PATCH 2/3] ARM: i.MX51: Make imx51_init_lowlevel callable from early init Sascha Hauer
@ 2013-06-17  9:17 ` Sascha Hauer
  1 sibling, 0 replies; 3+ messages in thread
From: Sascha Hauer @ 2013-06-17  9:17 UTC (permalink / raw)
  To: barebox

Adjusting the PLLs when MMU/caching is already enabled seems to be
unstable on the Smartbook, so do it during early init.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/boards/efika-mx-smartbook/board.c    | 5 -----
 arch/arm/boards/efika-mx-smartbook/lowlevel.c | 3 +++
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boards/efika-mx-smartbook/board.c b/arch/arm/boards/efika-mx-smartbook/board.c
index e9b6062..98f9dcd 100644
--- a/arch/arm/boards/efika-mx-smartbook/board.c
+++ b/arch/arm/boards/efika-mx-smartbook/board.c
@@ -270,11 +270,6 @@ static void efikamx_power_init(void)
 	mc13xxx_reg_write(mc, MC13892_REG_SW_2, val);
 	udelay(50);
 
-	/* Raise the core frequency to 800MHz */
-	console_flush();
-	imx51_init_lowlevel(800);
-	clock_notifier_call_chain();
-
 	/* Set switchers in Auto in NORMAL mode & STANDBY mode */
 	/* Setup the switcher mode for SW1 & SW2*/
 	mc13xxx_reg_read(mc, MC13892_REG_SW_4, &val);
diff --git a/arch/arm/boards/efika-mx-smartbook/lowlevel.c b/arch/arm/boards/efika-mx-smartbook/lowlevel.c
index 3e6a0ee..11abc93 100644
--- a/arch/arm/boards/efika-mx-smartbook/lowlevel.c
+++ b/arch/arm/boards/efika-mx-smartbook/lowlevel.c
@@ -1,9 +1,12 @@
 #include <common.h>
 #include <mach/esdctl.h>
 #include <asm/barebox-arm-head.h>
+#include <mach/imx5.h>
 
 void __naked barebox_arm_reset_vector(void)
 {
 	arm_cpu_lowlevel_init();
+	arm_setup_stack(0x20000000 - 16);
+	imx51_init_lowlevel(800);
 	imx51_barebox_entry(0);
 }
-- 
1.8.3.1


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^ permalink raw reply	[flat|nested] 3+ messages in thread
end of thread, other threads:[~2013-06-17  9:18 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2013-06-17  9:17 [PATCH 1/3] ARM: i.MX51: Use IIM for detecting silicon revision Sascha Hauer
2013-06-17  9:17 ` [PATCH 2/3] ARM: i.MX51: Make imx51_init_lowlevel callable from early init Sascha Hauer
2013-06-17  9:17 ` [PATCH 3/3] ARM: i.MX51 efikasb: call imx51_lowlevel_init from lowlevel init Sascha Hauer

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