From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH] ARM: i.MX51: Adjust IPG_CLK_DIVR to 6:1
Date: Mon, 17 Jun 2013 12:23:54 +0200 [thread overview]
Message-ID: <1371464634-31149-1-git-send-email-s.hauer@pengutronix.de> (raw)
The same value as used in Mainline and Freescale U-Boot. This might
increase the stability of i.MX51 boards. The 5:1 ratio we have in barebox
probably goes back to copy/paste from the i.MX53 code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/imx51.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c
index c75534e..0771f94 100644
--- a/arch/arm/mach-imx/imx51.c
+++ b/arch/arm/mach-imx/imx51.c
@@ -196,7 +196,7 @@ void imx51_init_lowlevel(unsigned int cpufreq_mhz)
imx5_setup_pll_216((void __iomem *)MX51_PLL3_BASE_ADDR);
/* Set the platform clock dividers */
- writel(0x00000124, MX51_ARM_BASE_ADDR + 0x14);
+ writel(0x00000125, MX51_ARM_BASE_ADDR + 0x14);
/* Run at Full speed */
writel(0x0, ccm + MX5_CCM_CACRR);
--
1.8.3.1
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reply other threads:[~2013-06-17 10:24 UTC|newest]
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