* [PATCH 1/3] i2c-omap: cleanup cpu_is functions
2013-06-20 12:50 [PATCH 0/3] I2C support for AM33xx Teresa Gámez
@ 2013-06-20 12:50 ` Teresa Gámez
2013-06-20 12:50 ` [PATCH 2/3] ARM: AM33xx: Add i2c support for AM33xx Teresa Gámez
2013-06-20 12:50 ` [PATCH 3/3] ARM: OMAP: pcm051: Add i2c0 and at24 eeprom support Teresa Gámez
2 siblings, 0 replies; 5+ messages in thread
From: Teresa Gámez @ 2013-06-20 12:50 UTC (permalink / raw)
To: barebox
cpu_is_omap2430() is set when CONFIG_ARCH_OMAP is enabled.
This fits for all OMAP/AM33xx boards supported in barebox.
Cleaned up all conditions that use the cpu_is_omap2430().
Also removed some unused defines.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
---
drivers/i2c/busses/i2c-omap.c | 159 +++++++++++++++--------------------------
1 files changed, 57 insertions(+), 102 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 503443f..ecb33ea 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -24,10 +24,6 @@
* GNU General Public License for more details.
*/
-
-/* #include <linux/delay.h> */
-
-
#include <clock.h>
#include <common.h>
#include <driver.h>
@@ -44,12 +40,6 @@
#include <mach/generic.h>
#include <mach/omap3-clock.h>
-#define OMAP_I2C_SIZE 0x3f
-#define OMAP1_I2C_BASE 0xfffb3800
-#define OMAP2_I2C_BASE1 0x48070000
-#define OMAP2_I2C_BASE2 0x48072000
-#define OMAP2_I2C_BASE3 0x48060000
-
/* This will be the driver name */
#define DRIVER_NAME "i2c-omap"
@@ -141,7 +131,6 @@
#define SYSC_IDLEMODE_SMART 0x2
#define SYSC_CLOCKACTIVITY_FCLK 0x2
-
struct omap_i2c_struct {
void *base;
u8 *regs;
@@ -352,63 +341,51 @@ static int omap_i2c_init(struct omap_i2c_struct *i2c_omap)
}
omap_i2c_write_reg(i2c_omap, OMAP_I2C_CON_REG, 0);
- /* omap1 handling is missing here */
-
- if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap4xxx()) {
-
- /*
- * HSI2C controller internal clk rate should be 19.2 Mhz for
- * HS and for all modes on 2430. On 34xx we can use lower rate
- * to get longer filter period for better noise suppression.
- * The filter is iclk (fclk for HS) period.
- */
- if (i2c_omap->speed > 400 || cpu_is_omap2430())
- internal_clk = 19200;
- else if (i2c_omap->speed > 100)
- internal_clk = 9600;
- else
- internal_clk = 4000;
- fclk_rate = 96000000 / 1000;
-
- /* Compute prescaler divisor */
- psc = fclk_rate / internal_clk;
- psc = psc - 1;
-
- /* If configured for High Speed */
- if (i2c_omap->speed > 400) {
- unsigned long scl;
-
- /* For first phase of HS mode */
- scl = internal_clk / 400;
- fsscll = scl - (scl / 3) - 7;
- fssclh = (scl / 3) - 5;
-
- /* For second phase of HS mode */
- scl = fclk_rate / i2c_omap->speed;
- hsscll = scl - (scl / 3) - 7;
- hssclh = (scl / 3) - 5;
- } else if (i2c_omap->speed > 100) {
- unsigned long scl;
-
- /* Fast mode */
- scl = internal_clk / i2c_omap->speed;
- fsscll = scl - (scl / 3) - 7;
- fssclh = (scl / 3) - 5;
- } else {
- /* Standard mode */
- fsscll = internal_clk / (i2c_omap->speed * 2) - 7;
- fssclh = internal_clk / (i2c_omap->speed * 2) - 5;
- }
- scll = (hsscll << OMAP_I2C_SCLL_HSSCLL) | fsscll;
- sclh = (hssclh << OMAP_I2C_SCLH_HSSCLH) | fssclh;
+ /*
+ * HSI2C controller internal clk rate should be 19.2 Mhz for
+ * HS and for all modes on 2430. On 34xx we can use lower rate
+ * to get longer filter period for better noise suppression.
+ * The filter is iclk (fclk for HS) period.
+ */
+ if (i2c_omap->speed > 400)
+ internal_clk = 19200;
+ else if (i2c_omap->speed > 100)
+ internal_clk = 9600;
+ else
+ internal_clk = 4000;
+ fclk_rate = 96000000 / 1000;
+
+ /* Compute prescaler divisor */
+ psc = fclk_rate / internal_clk;
+ psc = psc - 1;
+
+ /* If configured for High Speed */
+ if (i2c_omap->speed > 400) {
+ unsigned long scl;
+
+ /* For first phase of HS mode */
+ scl = internal_clk / 400;
+ fsscll = scl - (scl / 3) - 7;
+ fssclh = (scl / 3) - 5;
+
+ /* For second phase of HS mode */
+ scl = fclk_rate / i2c_omap->speed;
+ hsscll = scl - (scl / 3) - 7;
+ hssclh = (scl / 3) - 5;
+ } else if (i2c_omap->speed > 100) {
+ unsigned long scl;
+
+ /* Fast mode */
+ scl = internal_clk / i2c_omap->speed;
+ fsscll = scl - (scl / 3) - 7;
+ fssclh = (scl / 3) - 5;
} else {
- /* Program desired operating rate */
- fclk_rate /= (psc + 1) * 1000;
- if (psc > 2)
- psc = 2;
- scll = fclk_rate / (i2c_omap->speed * 2) - 7 + psc;
- sclh = fclk_rate / (i2c_omap->speed * 2) - 7 + psc;
+ /* Standard mode */
+ fsscll = internal_clk / (i2c_omap->speed * 2) - 7;
+ fssclh = internal_clk / (i2c_omap->speed * 2) - 5;
}
+ scll = (hsscll << OMAP_I2C_SCLL_HSSCLL) | fsscll;
+ sclh = (hssclh << OMAP_I2C_SCLH_HSSCLH) | fssclh;
/* Setup clock prescaler to obtain approx 12MHz I2C module clock: */
omap_i2c_write_reg(i2c_omap, OMAP_I2C_PSC_REG, psc);
@@ -525,15 +502,6 @@ complete:
if (dev->buf_len) {
*dev->buf++ = w;
dev->buf_len--;
- /* Data reg from 2430 is 8 bit wide */
- if (!cpu_is_omap2430() &&
- !cpu_is_omap34xx() &&
- !cpu_is_omap4xxx()) {
- if (dev->buf_len) {
- *dev->buf++ = w >> 8;
- dev->buf_len--;
- }
- }
} else {
if (stat & OMAP_I2C_STAT_RRDY)
dev_err(&dev->adapter.dev,
@@ -566,15 +534,6 @@ complete:
if (dev->buf_len) {
w = *dev->buf++;
dev->buf_len--;
- /* Data reg from 2430 is 8 bit wide */
- if (!cpu_is_omap2430() &&
- !cpu_is_omap34xx() &&
- !cpu_is_omap4xxx()) {
- if (dev->buf_len) {
- w |= *dev->buf++ << 8;
- dev->buf_len--;
- }
- }
} else {
if (stat & OMAP_I2C_STAT_XRDY)
dev_err(&dev->adapter.dev,
@@ -776,6 +735,7 @@ i2c_omap_probe(struct device_d *pdev)
/* struct i2c_platform_data *pdata; */
int r;
u32 speed = 0;
+ u16 s;
i2c_omap = kzalloc(sizeof(struct omap_i2c_struct), GFP_KERNEL);
if (!i2c_omap) {
@@ -802,28 +762,23 @@ i2c_omap_probe(struct device_d *pdev)
omap_i2c_unidle(i2c_omap);
i2c_omap->rev = omap_i2c_read_reg(i2c_omap, OMAP_I2C_REV_REG) & 0xff;
- /* i2c_omap->base = OMAP2_I2C_BASE3; */
-
- if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap4xxx()) {
- u16 s;
- /* Set up the fifo size - Get total size */
- s = (omap_i2c_read_reg(i2c_omap, OMAP_I2C_BUFSTAT_REG) >> 14) & 0x3;
- i2c_omap->fifo_size = 0x8 << s;
+ /* Set up the fifo size - Get total size */
+ s = (omap_i2c_read_reg(i2c_omap, OMAP_I2C_BUFSTAT_REG) >> 14) & 0x3;
+ i2c_omap->fifo_size = 0x8 << s;
- /*
- * Set up notification threshold as half the total available
- * size. This is to ensure that we can handle the status on int
- * call back latencies.
- */
+ /*
+ * Set up notification threshold as half the total available
+ * size. This is to ensure that we can handle the status on int
+ * call back latencies.
+ */
- i2c_omap->fifo_size = (i2c_omap->fifo_size / 2);
+ i2c_omap->fifo_size = (i2c_omap->fifo_size / 2);
- if (i2c_omap->rev >= OMAP_I2C_REV_ON_4430)
- i2c_omap->b_hw = 0; /* Disable hardware fixes */
- else
- i2c_omap->b_hw = 1; /* Enable hardware fixes */
- }
+ if (i2c_omap->rev >= OMAP_I2C_REV_ON_4430)
+ i2c_omap->b_hw = 0; /* Disable hardware fixes */
+ else
+ i2c_omap->b_hw = 1; /* Enable hardware fixes */
/* reset ASAP, clearing any IRQs */
omap_i2c_init(i2c_omap);
--
1.7.0.4
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^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH 2/3] ARM: AM33xx: Add i2c support for AM33xx
2013-06-20 12:50 [PATCH 0/3] I2C support for AM33xx Teresa Gámez
2013-06-20 12:50 ` [PATCH 1/3] i2c-omap: cleanup cpu_is functions Teresa Gámez
@ 2013-06-20 12:50 ` Teresa Gámez
2013-06-21 5:39 ` Sascha Hauer
2013-06-20 12:50 ` [PATCH 3/3] ARM: OMAP: pcm051: Add i2c0 and at24 eeprom support Teresa Gámez
2 siblings, 1 reply; 5+ messages in thread
From: Teresa Gámez @ 2013-06-20 12:50 UTC (permalink / raw)
To: barebox
Added device register functions and cpu_is_am33xx()
function.
Adapted the i2c-omap driver. AM335x has a lower
clock rate and the timeout of polling the isr function
had to be increased.
Based on a patch from Shravan Kumar <shravan.k@phytec.in>.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
---
arch/arm/mach-omap/include/mach/am33xx-devices.h | 15 +++++++++++++++
arch/arm/mach-omap/include/mach/am33xx-silicon.h | 5 +++++
arch/arm/mach-omap/include/mach/generic.h | 6 ++++++
drivers/i2c/busses/i2c-omap.c | 14 +++++++++-----
4 files changed, 35 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap/include/mach/am33xx-devices.h b/arch/arm/mach-omap/include/mach/am33xx-devices.h
index 7da4b99..822caab 100644
--- a/arch/arm/mach-omap/include/mach/am33xx-devices.h
+++ b/arch/arm/mach-omap/include/mach/am33xx-devices.h
@@ -53,4 +53,19 @@ static inline struct device_d *am33xx_add_spi1(void)
return am33xx_add_spi(1, AM33XX_MCSPI1_BASE);
}
+static inline struct device_d *am33xx_add_i2c0(void *pdata)
+{
+ return omap_add_i2c(0, AM33XX_I2C0_BASE, pdata);
+}
+
+static inline struct device_d *am33xx_add_i2c1(void *pdata)
+{
+ return omap_add_i2c(1, AM33XX_I2C1_BASE, pdata);
+}
+
+static inline struct device_d *am33xx_add_i2c2(void *pdata)
+{
+ return omap_add_i2c(2, AM33XX_I2C2_BASE, pdata);
+}
+
#endif /* __MACH_OMAP3_DEVICES_H */
diff --git a/arch/arm/mach-omap/include/mach/am33xx-silicon.h b/arch/arm/mach-omap/include/mach/am33xx-silicon.h
index 59284af..8a7bd16 100644
--- a/arch/arm/mach-omap/include/mach/am33xx-silicon.h
+++ b/arch/arm/mach-omap/include/mach/am33xx-silicon.h
@@ -41,6 +41,11 @@
#define AM33XX_DRAM_ADDR_SPACE_START 0x80000000
#define AM33XX_DRAM_ADDR_SPACE_END 0xC0000000
+/* I2C */
+#define AM33XX_I2C0_BASE (AM33XX_L4_WKUP_BASE + 0x20B000)
+#define AM33XX_I2C1_BASE (AM33XX_L4_PER_BASE + 0x02A000)
+#define AM33XX_I2C2_BASE (AM33XX_L4_PER_BASE + 0x19C000)
+
/* GPMC */
#define AM33XX_GPMC_BASE 0x50000000
diff --git a/arch/arm/mach-omap/include/mach/generic.h b/arch/arm/mach-omap/include/mach/generic.h
index 5a10a54..178c21f 100644
--- a/arch/arm/mach-omap/include/mach/generic.h
+++ b/arch/arm/mach-omap/include/mach/generic.h
@@ -27,4 +27,10 @@
#define cpu_is_omap4xxx() (0)
#endif
+#ifdef CONFIG_ARCH_AM33XX
+#define cpu_is_am33xx() (1)
+#else
+#define cpu_is_am33xx() (0)
+#endif
+
#endif
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index ecb33ea..19d54ee 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -245,7 +245,7 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_struct *i2c_omap, int reg)
static void omap_i2c_unidle(struct omap_i2c_struct *i2c_omap)
{
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() || cpu_is_am33xx()) {
omap_i2c_write_reg(i2c_omap, OMAP_I2C_CON_REG, 0);
omap_i2c_write_reg(i2c_omap, OMAP_I2C_PSC_REG, i2c_omap->pscstate);
omap_i2c_write_reg(i2c_omap, OMAP_I2C_SCLL_REG, i2c_omap->scllstate);
@@ -353,7 +353,11 @@ static int omap_i2c_init(struct omap_i2c_struct *i2c_omap)
internal_clk = 9600;
else
internal_clk = 4000;
- fclk_rate = 96000000 / 1000;
+
+ if (cpu_is_am33xx())
+ fclk_rate = 48000;
+ else
+ fclk_rate = 96000;
/* Compute prescaler divisor */
psc = fclk_rate / internal_clk;
@@ -410,7 +414,7 @@ static int omap_i2c_init(struct omap_i2c_struct *i2c_omap)
OMAP_I2C_IE_AL) | ((i2c_omap->fifo_size) ?
(OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0);
omap_i2c_write_reg(i2c_omap, OMAP_I2C_IE_REG, i2c_omap->iestate);
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() || cpu_is_am33xx()) {
i2c_omap->pscstate = psc;
i2c_omap->scllstate = scll;
i2c_omap->sclhstate = sclh;
@@ -665,7 +669,7 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adapter,
ret = omap_i2c_isr(i2c_omap);
while (ret){
ret = omap_i2c_isr(i2c_omap);
- if (is_timeout(start, MSECOND)) {
+ if (is_timeout(start, 50 * MSECOND)) {
dev_err(&adapter->dev,
"timed out on polling for "
"open i2c message handling\n");
@@ -743,7 +747,7 @@ i2c_omap_probe(struct device_d *pdev)
goto err_free_mem;
}
- if (cpu_is_omap4xxx()) {
+ if (cpu_is_omap4xxx() || cpu_is_am33xx()) {
i2c_omap->regs = (u8 *)omap4_reg_map;
i2c_omap->reg_shift = 0;
} else {
--
1.7.0.4
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^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH 3/3] ARM: OMAP: pcm051: Add i2c0 and at24 eeprom support
2013-06-20 12:50 [PATCH 0/3] I2C support for AM33xx Teresa Gámez
2013-06-20 12:50 ` [PATCH 1/3] i2c-omap: cleanup cpu_is functions Teresa Gámez
2013-06-20 12:50 ` [PATCH 2/3] ARM: AM33xx: Add i2c support for AM33xx Teresa Gámez
@ 2013-06-20 12:50 ` Teresa Gámez
2 siblings, 0 replies; 5+ messages in thread
From: Teresa Gámez @ 2013-06-20 12:50 UTC (permalink / raw)
To: barebox
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
---
arch/arm/boards/pcm051/board.c | 18 ++++++++++++++++++
arch/arm/configs/pcm051_defconfig | 4 ++++
2 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boards/pcm051/board.c b/arch/arm/boards/pcm051/board.c
index 0ad8cb4..eea5ebb 100644
--- a/arch/arm/boards/pcm051/board.c
+++ b/arch/arm/boards/pcm051/board.c
@@ -32,6 +32,8 @@
#include <mach/cpsw.h>
#include <spi/spi.h>
#include <spi/flash.h>
+#include <i2c/i2c.h>
+#include <i2c/at24.h>
#include "mux.h"
@@ -89,6 +91,12 @@ static struct cpsw_platform_data cpsw_data = {
.num_slaves = ARRAY_SIZE(cpsw_slaves),
};
+static struct i2c_board_info i2c0_devices[] = {
+ {
+ I2C_BOARD_INFO("24c32", 0x52),
+ },
+};
+
static void pcm051_spi_init(void)
{
int ret;
@@ -111,6 +119,15 @@ static void pcm051_eth_init(void)
am33xx_add_cpsw(&cpsw_data);
}
+static void pcm051_i2c_init(void)
+{
+ am33xx_enable_i2c0_pin_mux();
+
+ i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
+
+ am33xx_add_i2c0(NULL);
+}
+
static int pcm051_devices_init(void)
{
pcm051_enable_mmc0_pin_mux();
@@ -119,6 +136,7 @@ static int pcm051_devices_init(void)
pcm051_spi_init();
pcm051_eth_init();
+ pcm051_i2c_init();
devfs_add_partition("nor0", 0x00000, SZ_128K,
DEVFS_PARTITION_FIXED, "xload");
diff --git a/arch/arm/configs/pcm051_defconfig b/arch/arm/configs/pcm051_defconfig
index 804ca14..8de3714 100644
--- a/arch/arm/configs/pcm051_defconfig
+++ b/arch/arm/configs/pcm051_defconfig
@@ -42,6 +42,7 @@ CONFIG_CMD_TIMEOUT=y
CONFIG_CMD_PARTITION=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_I2C=y
CONFIG_NET=y
CONFIG_NET_DHCP=y
CONFIG_NET_NFS=y
@@ -50,6 +51,8 @@ CONFIG_DRIVER_SERIAL_NS16550=y
CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
CONFIG_DRIVER_NET_CPSW=y
CONFIG_DRIVER_SPI_OMAP3=y
+CONFIG_I2C=y
+CONFIG_I2C_OMAP=y
CONFIG_MTD=y
CONFIG_MTD_M25P80=y
CONFIG_NAND=y
@@ -57,6 +60,7 @@ CONFIG_USB=y
CONFIG_MCI=y
CONFIG_MCI_STARTUP=y
CONFIG_MCI_OMAP_HSMMC=y
+CONFIG_EEPROM_AT24=y
CONFIG_FS_FAT=y
CONFIG_FS_FAT_WRITE=y
CONFIG_FS_FAT_LFN=y
--
1.7.0.4
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^ permalink raw reply [flat|nested] 5+ messages in thread