* [PATCH 1/8] images: correctly linebreak built images output
2013-09-29 19:59 [PATCH 0/8] Tegra multi image support Lucas Stach
@ 2013-09-29 19:59 ` Lucas Stach
2013-10-02 8:20 ` Sascha Hauer
2013-09-29 19:59 ` [PATCH 2/8] tegra: try harder inlining early startup functions Lucas Stach
` (6 subsequent siblings)
7 siblings, 1 reply; 10+ messages in thread
From: Lucas Stach @ 2013-09-29 19:59 UTC (permalink / raw)
To: barebox
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
images/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/images/Makefile b/images/Makefile
index c723b1a..ac5cf8c 100644
--- a/images/Makefile
+++ b/images/Makefile
@@ -120,7 +120,7 @@ targets += $(foreach m, $(image-y), $(FILE_$(m)))
SECONDARY: $(addprefix $(obj)/,$(targets))
images: $(addprefix $(obj)/, $(image-y)) FORCE
- @echo "images built:\n" $(patsubst %,%\\n,$(image-y))
+ @echo -e "images built:\n" $(patsubst %,%\\n,$(image-y))
clean-files := *.pbl *.pblb *.pblx *.map start_*.imximg *.img barebox.z start_*.kwbimg \
start_*.kwbuartimg *.socfpgaimg
--
1.8.3.1
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^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH 1/8] images: correctly linebreak built images output
2013-09-29 19:59 ` [PATCH 1/8] images: correctly linebreak built images output Lucas Stach
@ 2013-10-02 8:20 ` Sascha Hauer
0 siblings, 0 replies; 10+ messages in thread
From: Sascha Hauer @ 2013-10-02 8:20 UTC (permalink / raw)
To: Lucas Stach; +Cc: barebox
On Sun, Sep 29, 2013 at 09:59:29PM +0200, Lucas Stach wrote:
> Signed-off-by: Lucas Stach <dev@lynxeye.de>
> ---
> images/Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/images/Makefile b/images/Makefile
> index c723b1a..ac5cf8c 100644
> --- a/images/Makefile
> +++ b/images/Makefile
> @@ -120,7 +120,7 @@ targets += $(foreach m, $(image-y), $(FILE_$(m)))
> SECONDARY: $(addprefix $(obj)/,$(targets))
>
> images: $(addprefix $(obj)/, $(image-y)) FORCE
> - @echo "images built:\n" $(patsubst %,%\\n,$(image-y))
> + @echo -e "images built:\n" $(patsubst %,%\\n,$(image-y))
Gnagnagna
This was working on Debian because there a quite broken dash builtin for
'echo' was used. The dash echo builtin does its best to be incompatible
with stanard echo behaviour: It interpretes control characters even if
-e is not given. Instead of at least ignoring the -e option it echos
'-e' to standard out.
I changed the above to:
@echo "images built:"
@for i in $(image-y); do echo $$i; done
The next step would be to use the SHELL make variable to force to a
known shell.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 2/8] tegra: try harder inlining early startup functions
2013-09-29 19:59 [PATCH 0/8] Tegra multi image support Lucas Stach
2013-09-29 19:59 ` [PATCH 1/8] images: correctly linebreak built images output Lucas Stach
@ 2013-09-29 19:59 ` Lucas Stach
2013-09-29 19:59 ` [PATCH 3/8] tegra: start maincomplex execution at correct offset Lucas Stach
` (5 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Lucas Stach @ 2013-09-29 19:59 UTC (permalink / raw)
To: barebox
It seems GCC 4.8 tries to be clever by not inlining some of those
functions. This causes havok, as it's absolutely required to inline
the early startup function, otherwise we may end up calling ARMv7 code
on the ARMv4 AVP.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
arch/arm/mach-tegra/include/mach/lowlevel.h | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-tegra/include/mach/lowlevel.h b/arch/arm/mach-tegra/include/mach/lowlevel.h
index 071416f..2d3f312 100644
--- a/arch/arm/mach-tegra/include/mach/lowlevel.h
+++ b/arch/arm/mach-tegra/include/mach/lowlevel.h
@@ -40,7 +40,8 @@
#define T20_ODMDATA_UARTID_SHIFT 15
#define T20_ODMDATA_UARTID_MASK (7 << T20_ODMDATA_UARTID_SHIFT)
-static inline u32 tegra_get_odmdata(void)
+static inline __attribute__((always_inline))
+u32 tegra_get_odmdata(void)
{
u32 bctsize, bctptr, odmdata;
@@ -62,7 +63,8 @@ enum tegra_chiptype {
TEGRA20 = 0,
};
-static inline enum tegra_chiptype tegra_get_chiptype(void)
+static inline __attribute__((always_inline))
+enum tegra_chiptype tegra_get_chiptype(void)
{
u32 hidrev;
@@ -76,7 +78,8 @@ static inline enum tegra_chiptype tegra_get_chiptype(void)
}
}
-static inline int tegra_get_num_cores(void)
+static inline __attribute__((always_inline))
+int tegra_get_num_cores(void)
{
switch (tegra_get_chiptype()) {
case TEGRA20:
@@ -89,7 +92,8 @@ static inline int tegra_get_num_cores(void)
}
/* Runtime data */
-static inline int tegra_cpu_is_maincomplex(void)
+static inline __attribute__((always_inline))
+int tegra_cpu_is_maincomplex(void)
{
u32 tag0;
@@ -98,7 +102,8 @@ static inline int tegra_cpu_is_maincomplex(void)
return (tag0 & 0xff) == 0x55;
}
-static inline uint32_t tegra20_get_ramsize(void)
+static inline __attribute__((always_inline))
+uint32_t tegra20_get_ramsize(void)
{
switch ((tegra_get_odmdata() & T20_ODMDATA_RAMSIZE_MASK) >>
T20_ODMDATA_RAMSIZE_SHIFT) {
@@ -120,7 +125,8 @@ static long uart_id_to_base[] = {
TEGRA_UARTE_BASE,
};
-static inline long tegra20_get_debuguart_base(void)
+static inline __attribute__((always_inline))
+long tegra20_get_debuguart_base(void)
{
u32 odmdata;
int id;
@@ -146,7 +152,8 @@ static inline long tegra20_get_debuguart_base(void)
#define CRC_OSC_CTRL_OSC_FREQ_SHIFT 30
#define CRC_OSC_CTRL_OSC_FREQ_MASK (0x3 << CRC_OSC_CTRL_OSC_FREQ_SHIFT)
-static inline unsigned int tegra_get_osc_clock(void)
+static inline unsigned __attribute__((always_inline))
+int tegra_get_osc_clock(void)
{
u32 osc_ctrl = readl(TEGRA_CLK_RESET_BASE + CRC_OSC_CTRL);
--
1.8.3.1
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^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 3/8] tegra: start maincomplex execution at correct offset
2013-09-29 19:59 [PATCH 0/8] Tegra multi image support Lucas Stach
2013-09-29 19:59 ` [PATCH 1/8] images: correctly linebreak built images output Lucas Stach
2013-09-29 19:59 ` [PATCH 2/8] tegra: try harder inlining early startup functions Lucas Stach
@ 2013-09-29 19:59 ` Lucas Stach
2013-09-29 19:59 ` [PATCH 4/8] tegra: fix PBL build Lucas Stach
` (4 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Lucas Stach @ 2013-09-29 19:59 UTC (permalink / raw)
To: barebox
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
arch/arm/mach-tegra/tegra_avp_init.c | 11 +++--------
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-tegra/tegra_avp_init.c b/arch/arm/mach-tegra/tegra_avp_init.c
index 5099e91..ba275ad 100644
--- a/arch/arm/mach-tegra/tegra_avp_init.c
+++ b/arch/arm/mach-tegra/tegra_avp_init.c
@@ -19,6 +19,7 @@
#include <common.h>
#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
#include <mach/lowlevel.h>
#include <mach/tegra20-car.h>
#include <mach/tegra20-pmc.h>
@@ -194,13 +195,6 @@ void barebox_arm_reset_vector(void)
/* minimal initialization, OK for both ARMv4 and ARMv7 */
tegra_cpu_lowlevel_setup();
- /*
- * If we are already running on the main CPU complex jump straight
- * to the maincomplex entry point.
- */
- if (tegra_cpu_is_maincomplex())
- tegra_maincomplex_entry();
-
/* get the number of cores in the main CPU complex of the current SoC */
num_cores = tegra_get_num_cores();
if (!num_cores)
@@ -212,7 +206,8 @@ void barebox_arm_reset_vector(void)
stop_maincomplex_clocks(num_cores);
/* set start address for the main CPU complex processors */
- writel(barebox_arm_head, TEGRA_EXCEPTION_VECTORS_BASE + 0x100);
+ writel(tegra_maincomplex_entry - get_runtime_offset(),
+ TEGRA_EXCEPTION_VECTORS_BASE + 0x100);
/* bring up main CPU complex */
start_cpu0_clocks();
--
1.8.3.1
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^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 4/8] tegra: fix PBL build
2013-09-29 19:59 [PATCH 0/8] Tegra multi image support Lucas Stach
` (2 preceding siblings ...)
2013-09-29 19:59 ` [PATCH 3/8] tegra: start maincomplex execution at correct offset Lucas Stach
@ 2013-09-29 19:59 ` Lucas Stach
2013-09-29 19:59 ` [PATCH 5/8] tegra: mandate relocatable binary Lucas Stach
` (3 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Lucas Stach @ 2013-09-29 19:59 UTC (permalink / raw)
To: barebox
Drop useless BUG(), we are too early for them to be of any use.
Make sure we build the AVP code as ARMv4 even in PBL case.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
arch/arm/mach-tegra/Makefile | 1 +
arch/arm/mach-tegra/tegra_avp_init.c | 4 ----
arch/arm/mach-tegra/tegra_maincomplex_init.c | 2 +-
3 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index fd6a870..0fa8430 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -1,4 +1,5 @@
CFLAGS_tegra_avp_init.o := -mcpu=arm7tdmi -march=armv4t
+CFLAGS_pbl-tegra_avp_init.o := -mcpu=arm7tdmi -march=armv4t
lwl-y += tegra_avp_init.o
lwl-y += tegra_maincomplex_init.o
obj-y += tegra20.o
diff --git a/arch/arm/mach-tegra/tegra_avp_init.c b/arch/arm/mach-tegra/tegra_avp_init.c
index ba275ad..557af66 100644
--- a/arch/arm/mach-tegra/tegra_avp_init.c
+++ b/arch/arm/mach-tegra/tegra_avp_init.c
@@ -109,8 +109,6 @@ static void init_pllx(void)
return;
chiptype = tegra_get_chiptype();
- if (chiptype < 0)
- BUG();
osc_freq = (readl(TEGRA_CLK_RESET_BASE + CRC_OSC_CTRL) &
CRC_OSC_CTRL_OSC_FREQ_MASK) >> CRC_OSC_CTRL_OSC_FREQ_SHIFT;
@@ -197,8 +195,6 @@ void barebox_arm_reset_vector(void)
/* get the number of cores in the main CPU complex of the current SoC */
num_cores = tegra_get_num_cores();
- if (!num_cores)
- BUG();
/* bring down main CPU complex (this may be a warm boot) */
enable_maincomplex_powerrail();
diff --git a/arch/arm/mach-tegra/tegra_maincomplex_init.c b/arch/arm/mach-tegra/tegra_maincomplex_init.c
index dea9c91..343edd6 100644
--- a/arch/arm/mach-tegra/tegra_maincomplex_init.c
+++ b/arch/arm/mach-tegra/tegra_maincomplex_init.c
@@ -33,7 +33,7 @@ void tegra_maincomplex_entry(void)
break;
default:
/* If we don't know the chiptype, better bail out */
- BUG();
+ unreachable();
}
/*
--
1.8.3.1
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^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 5/8] tegra: mandate relocatable binary
2013-09-29 19:59 [PATCH 0/8] Tegra multi image support Lucas Stach
` (3 preceding siblings ...)
2013-09-29 19:59 ` [PATCH 4/8] tegra: fix PBL build Lucas Stach
@ 2013-09-29 19:59 ` Lucas Stach
2013-09-29 19:59 ` [PATCH 6/8] tegra: don't force to choose between Tegra arches Lucas Stach
` (2 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Lucas Stach @ 2013-09-29 19:59 UTC (permalink / raw)
To: barebox
Allows us to drop some silly code workaround.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-tegra/Kconfig | 8 ++++----
arch/arm/mach-tegra/tegra_maincomplex_init.c | 8 +-------
3 files changed, 6 insertions(+), 11 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 398bc90..2ad8f6a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -173,6 +173,7 @@ config ARCH_TEGRA
select GPIO_TEGRA
select OFDEVICE
select OFTREE
+ select RELOCATABLE
config ARCH_ZYNQ
bool "Xilinx Zynq-based boards"
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index e6d53bc..4164f56 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -1,5 +1,9 @@
if ARCH_TEGRA
+config ARCH_TEXT_BASE
+ hex
+ default 0x0
+
choice
prompt "Tegra processor type"
@@ -46,10 +50,6 @@ endchoice
if ARCH_TEGRA_2x_SOC
-config ARCH_TEXT_BASE
- hex
- default 0x00108000
-
choice
prompt "Tegra 20 Board Type"
diff --git a/arch/arm/mach-tegra/tegra_maincomplex_init.c b/arch/arm/mach-tegra/tegra_maincomplex_init.c
index 343edd6..c485760 100644
--- a/arch/arm/mach-tegra/tegra_maincomplex_init.c
+++ b/arch/arm/mach-tegra/tegra_maincomplex_init.c
@@ -36,11 +36,5 @@ void tegra_maincomplex_entry(void)
unreachable();
}
- /*
- * The standard load address for Tegra systems is 0x10800 which means
- * the barebox binary will always be below the malloc area for all
- * reasonable malloc area sizes. We offset the RAM base address by 8MB
- * to pretend barebox is in another bank.
- */
- barebox_arm_entry(rambase + SZ_8M, ramsize - SZ_8M, 0);
+ barebox_arm_entry(rambase, ramsize, 0);
}
--
1.8.3.1
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^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 6/8] tegra: don't force to choose between Tegra arches
2013-09-29 19:59 [PATCH 0/8] Tegra multi image support Lucas Stach
` (4 preceding siblings ...)
2013-09-29 19:59 ` [PATCH 5/8] tegra: mandate relocatable binary Lucas Stach
@ 2013-09-29 19:59 ` Lucas Stach
2013-09-29 19:59 ` [PATCH 7/8] tegra: ac100: delete custom Kconfig Lucas Stach
2013-09-29 19:59 ` [PATCH 8/8] tegra: switch to multi image Lucas Stach
7 siblings, 0 replies; 10+ messages in thread
From: Lucas Stach @ 2013-09-29 19:59 UTC (permalink / raw)
To: barebox
There is nothing technically preventing a single Tegra 20/30
image to be built. Don't force this split in Kconfig.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
arch/arm/mach-tegra/Kconfig | 19 ++++++-------------
1 file changed, 6 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 4164f56..90c0c0f 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -5,15 +5,6 @@ config ARCH_TEXT_BASE
default 0x0
choice
- prompt "Tegra processor type"
-
-config ARCH_TEGRA_2x_SOC
- bool "Tegra 20"
- select PINCTRL_TEGRA20
-
-endchoice
-
-choice
prompt "Tegra debug UART"
help
This is the first serial console that gets activated by barebox.
@@ -48,18 +39,22 @@ endchoice
# ---------------------------------------------------------
-if ARCH_TEGRA_2x_SOC
+config ARCH_TEGRA_2x_SOC
+ bool
+ select PINCTRL_TEGRA20
choice
- prompt "Tegra 20 Board Type"
+ prompt "select Tegra Board"
config MACH_TEGRA20_GENERIC
bool "Generic DT based board"
+ select ARCH_TEGRA_2x_SOC
help
Say Y here if you are building for a generic DT based board.
config MACH_TOSHIBA_AC100
bool "Toshiba AC100"
+ select ARCH_TEGRA_2x_SOC
help
Say Y here if you are using Toshiba AC100 smartbook.
@@ -71,8 +66,6 @@ endif #MACH_TEGRA20_GENERIC
source arch/arm/boards/toshiba-ac100/Kconfig
-endif #ARCH_TEGRA_2x_SOC
-
# ---------------------------------------------------------
endif
--
1.8.3.1
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^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 7/8] tegra: ac100: delete custom Kconfig
2013-09-29 19:59 [PATCH 0/8] Tegra multi image support Lucas Stach
` (5 preceding siblings ...)
2013-09-29 19:59 ` [PATCH 6/8] tegra: don't force to choose between Tegra arches Lucas Stach
@ 2013-09-29 19:59 ` Lucas Stach
2013-09-29 19:59 ` [PATCH 8/8] tegra: switch to multi image Lucas Stach
7 siblings, 0 replies; 10+ messages in thread
From: Lucas Stach @ 2013-09-29 19:59 UTC (permalink / raw)
To: barebox
Now that tegra arch is both DT only and forced relocatable
there is nothing interesting left in here.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
arch/arm/boards/toshiba-ac100/Kconfig | 7 -------
arch/arm/mach-tegra/Kconfig | 2 --
2 files changed, 9 deletions(-)
delete mode 100644 arch/arm/boards/toshiba-ac100/Kconfig
diff --git a/arch/arm/boards/toshiba-ac100/Kconfig b/arch/arm/boards/toshiba-ac100/Kconfig
deleted file mode 100644
index 1cc13f0..0000000
--- a/arch/arm/boards/toshiba-ac100/Kconfig
+++ /dev/null
@@ -1,7 +0,0 @@
-if MACH_TOSHIBA_AC100
-
-config ARCH_TEXT_BASE
- hex
- default 0x01000000
-
-endif
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 90c0c0f..4363bce 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -64,8 +64,6 @@ if MACH_TEGRA20_GENERIC
endif #MACH_TEGRA20_GENERIC
-source arch/arm/boards/toshiba-ac100/Kconfig
-
# ---------------------------------------------------------
endif
--
1.8.3.1
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^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 8/8] tegra: switch to multi image
2013-09-29 19:59 [PATCH 0/8] Tegra multi image support Lucas Stach
` (6 preceding siblings ...)
2013-09-29 19:59 ` [PATCH 7/8] tegra: ac100: delete custom Kconfig Lucas Stach
@ 2013-09-29 19:59 ` Lucas Stach
7 siblings, 0 replies; 10+ messages in thread
From: Lucas Stach @ 2013-09-29 19:59 UTC (permalink / raw)
To: barebox
To keep things clean I removed all support for the old way to build
images. There is now a single tegra_v7 defconfig which builds both
supported Tegra boards as images.
The new image generation also paves the way for integration of the
tegra-cbootimage tool to produce directly flashable images.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
arch/arm/Kconfig | 3 +-
arch/arm/boards/Makefile | 1 +
arch/arm/boards/toradex-colibri-t20-iris/Makefile | 2 ++
arch/arm/boards/toradex-colibri-t20-iris/entry.c | 36 +++++++++++++++++++
arch/arm/boards/toshiba-ac100/Makefile | 2 ++
arch/arm/boards/toshiba-ac100/entry.c | 36 +++++++++++++++++++
arch/arm/configs/tegra20_colibri_iris_defconfig | 24 -------------
arch/arm/configs/tegra_v7_defconfig | 27 +++++++++++++++
arch/arm/configs/toshiba_ac100_defconfig | 42 -----------------------
arch/arm/dts/Makefile | 5 +++
arch/arm/mach-tegra/Kconfig | 20 ++++-------
arch/arm/mach-tegra/include/mach/lowlevel.h | 15 ++++++++
arch/arm/mach-tegra/include/mach/tegra20-pmc.h | 2 ++
arch/arm/mach-tegra/tegra_avp_init.c | 19 +++-------
arch/arm/mach-tegra/tegra_maincomplex_init.c | 4 ++-
images/Makefile | 1 +
images/Makefile.tegra | 14 ++++++++
17 files changed, 157 insertions(+), 96 deletions(-)
create mode 100644 arch/arm/boards/toradex-colibri-t20-iris/Makefile
create mode 100644 arch/arm/boards/toradex-colibri-t20-iris/entry.c
create mode 100644 arch/arm/boards/toshiba-ac100/entry.c
delete mode 100644 arch/arm/configs/tegra20_colibri_iris_defconfig
create mode 100644 arch/arm/configs/tegra_v7_defconfig
delete mode 100644 arch/arm/configs/toshiba_ac100_defconfig
create mode 100644 images/Makefile.tegra
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 2ad8f6a..b4b430f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -165,12 +165,13 @@ config ARCH_TEGRA
bool "NVIDIA Tegra"
select CPU_V7
select HAS_DEBUG_LL
- select BUILTIN_DTB
select COMMON_CLK
select COMMON_CLK_OF_PROVIDER
select CLKDEV_LOOKUP
select GPIOLIB
select GPIO_TEGRA
+ select HAVE_DEFAULT_ENVIRONMENT_NEW
+ select HAVE_PBL_MULTI_IMAGES
select OFDEVICE
select OFTREE
select RELOCATABLE
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 2210fd4..c273f0c 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -80,6 +80,7 @@ obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += terasic-sockit/
obj-$(CONFIG_MACH_TNY_A9260) += tny-a926x/
obj-$(CONFIG_MACH_TNY_A9263) += tny-a926x/
obj-$(CONFIG_MACH_TNY_A9G20) += tny-a926x/
+obj-$(CONFIG_MACH_TORADEX_COLIBRI_T20_IRIS) += toradex-colibri-t20-iris/
obj-$(CONFIG_MACH_TOSHIBA_AC100) += toshiba-ac100/
obj-$(CONFIG_MACH_TQMA53) += tqma53/
obj-$(CONFIG_MACH_TQMA6X) += tqma6x/
diff --git a/arch/arm/boards/toradex-colibri-t20-iris/Makefile b/arch/arm/boards/toradex-colibri-t20-iris/Makefile
new file mode 100644
index 0000000..5be3dd0
--- /dev/null
+++ b/arch/arm/boards/toradex-colibri-t20-iris/Makefile
@@ -0,0 +1,2 @@
+CFLAGS_pbl-entry.o := -mcpu=arm7tdmi -march=armv4t
+lwl-y += entry.o
diff --git a/arch/arm/boards/toradex-colibri-t20-iris/entry.c b/arch/arm/boards/toradex-colibri-t20-iris/entry.c
new file mode 100644
index 0000000..30a13e0
--- /dev/null
+++ b/arch/arm/boards/toradex-colibri-t20-iris/entry.c
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <common.h>
+#include <sizes.h>
+#include <asm/barebox-arm.h>
+#include <asm/barebox-arm-head.h>
+#include <mach/lowlevel.h>
+
+extern char __dtb_tegra20_colibri_iris_start[];
+
+ENTRY_FUNCTION(start_toradex_colibri_t20_iris)(void)
+{
+ uint32_t fdt;
+
+ __barebox_arm_head();
+
+ tegra_cpu_lowlevel_setup();
+
+ fdt = (uint32_t)__dtb_tegra20_colibri_iris_start - get_runtime_offset();
+
+ tegra_avp_reset_vector(fdt);
+}
diff --git a/arch/arm/boards/toshiba-ac100/Makefile b/arch/arm/boards/toshiba-ac100/Makefile
index dcfc293..4ef18c0 100644
--- a/arch/arm/boards/toshiba-ac100/Makefile
+++ b/arch/arm/boards/toshiba-ac100/Makefile
@@ -1 +1,3 @@
+CFLAGS_pbl-entry.o := -mcpu=arm7tdmi -march=armv4t
+lwl-y += entry.o
obj-y += board.o
diff --git a/arch/arm/boards/toshiba-ac100/entry.c b/arch/arm/boards/toshiba-ac100/entry.c
new file mode 100644
index 0000000..372d596
--- /dev/null
+++ b/arch/arm/boards/toshiba-ac100/entry.c
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <common.h>
+#include <sizes.h>
+#include <asm/barebox-arm.h>
+#include <asm/barebox-arm-head.h>
+#include <mach/lowlevel.h>
+
+extern char __dtb_tegra20_paz00_start[];
+
+ENTRY_FUNCTION(start_toshiba_ac100)(void)
+{
+ uint32_t fdt;
+
+ __barebox_arm_head();
+
+ tegra_cpu_lowlevel_setup();
+
+ fdt = (uint32_t)__dtb_tegra20_paz00_start - get_runtime_offset();
+
+ tegra_avp_reset_vector(fdt);
+}
diff --git a/arch/arm/configs/tegra20_colibri_iris_defconfig b/arch/arm/configs/tegra20_colibri_iris_defconfig
deleted file mode 100644
index 37a0e8a..0000000
--- a/arch/arm/configs/tegra20_colibri_iris_defconfig
+++ /dev/null
@@ -1,24 +0,0 @@
-CONFIG_BUILTIN_DTB_NAME="tegra20-colibri-iris"
-CONFIG_ARCH_TEGRA=y
-CONFIG_AEABI=y
-CONFIG_CMD_ARM_MMUINFO=y
-CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_STACK_SIZE=0x10000
-CONFIG_MALLOC_SIZE=0x4000000
-CONFIG_LONGHELP=y
-CONFIG_GLOB=y
-CONFIG_GLOB_SORT=y
-CONFIG_HUSH_FANCY_PROMPT=y
-CONFIG_HUSH_GETOPT=y
-CONFIG_CMDLINE_EDITING=y
-CONFIG_AUTO_COMPLETE=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_CLK=y
-CONFIG_DRIVER_SERIAL_NS16550=y
diff --git a/arch/arm/configs/tegra_v7_defconfig b/arch/arm/configs/tegra_v7_defconfig
new file mode 100644
index 0000000..677a955
--- /dev/null
+++ b/arch/arm/configs/tegra_v7_defconfig
@@ -0,0 +1,27 @@
+CONFIG_ARCH_TEGRA=y
+CONFIG_MACH_TORADEX_COLIBRI_T20_IRIS=y
+CONFIG_MACH_TOSHIBA_AC100=y
+CONFIG_AEABI=y
+CONFIG_CMD_ARM_MMUINFO=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_ARM_UNWIND=y
+CONFIG_MMU=y
+CONFIG_STACK_SIZE=0x10000
+CONFIG_MALLOC_SIZE=0x4000000
+CONFIG_LONGHELP=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_MENU=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_CLK=y
+CONFIG_DRIVER_SERIAL_NS16550=y
diff --git a/arch/arm/configs/toshiba_ac100_defconfig b/arch/arm/configs/toshiba_ac100_defconfig
deleted file mode 100644
index 1903910..0000000
--- a/arch/arm/configs/toshiba_ac100_defconfig
+++ /dev/null
@@ -1,42 +0,0 @@
-CONFIG_BUILTIN_DTB_NAME="tegra20-paz00"
-CONFIG_ARCH_TEGRA=y
-CONFIG_TEGRA_UART_A=y
-CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_TEXT_BASE=0x01000000
-CONFIG_BROKEN=y
-CONFIG_EXPERIMENTAL=y
-CONFIG_PROMPT="toshiba ac100> "
-CONFIG_LONGHELP=y
-CONFIG_CMDLINE_EDITING=y
-CONFIG_AUTO_COMPLETE=y
-# CONFIG_ERRNO_MESSAGES is not set
-# CONFIG_DEFAULT_ENVIRONMENT is not set
-CONFIG_POLLER=y
-CONFIG_ENABLE_DEVICE_NOISE=y
-CONFIG_CMD_SLEEP=y
-# CONFIG_CMD_TRUE is not set
-# CONFIG_CMD_FALSE is not set
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_LOADY=y
-CONFIG_CMD_LOADS=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_NET=y
-CONFIG_NET_DHCP=y
-CONFIG_NET_PING=y
-CONFIG_NET_NETCONSOLE=y
-CONFIG_DRIVER_SERIAL_NS16550=y
-CONFIG_NET_USB=y
-CONFIG_NET_USB_ASIX=y
-# CONFIG_SPI is not set
-CONFIG_USB=y
-CONFIG_USB_EHCI=y
-CONFIG_USB_STORAGE=y
-CONFIG_FS_TFTP=y
-CONFIG_FS_FAT=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7782874..511adf4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -13,6 +13,9 @@ dtb-$(CONFIG_ARCH_IMX6) += imx6q-gk802.dtb \
dtb-$(CONFIG_ARCH_MVEBU) += dove-cubox.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_sockit.dtb \
socfpga_cyclone5_socrates.dtb
+dtb-$(CONFIG_ARCH_TEGRA) += \
+ tegra20-colibri-iris.dtb \
+ tegra20-paz00.dtb
BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_NAME))
obj-$(CONFIG_BUILTIN_DTB) += $(BUILTIN_DTB).dtb.o
@@ -25,6 +28,8 @@ pbl-$(CONFIG_MACH_PHYTEC_PFLA02) += imx6q-phytec-pbab01.dtb.o
pbl-$(CONFIG_MACH_REALQ7) += imx6q-dmo-realq7.dtb.o
pbl-$(CONFIG_MACH_SOLIDRUN_CUBOX) += dove-cubox.dtb.o
pbl-$(CONFIG_MACH_GK802) += imx6q-gk802.dtb.o
+pbl-$(CONFIG_MACH_TORADEX_COLIBRI_T20_IRIS) += tegra20-colibri-iris.dtb.o
+pbl-$(CONFIG_MACH_TOSHIBA_AC100) += tegra20-paz00.dtb.o
pbl-$(CONFIG_MACH_TQMA6X) += imx6dl-mba6x.dtb.o imx6q-mba6x.dtb.o
pbl-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o
pbl-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 4363bce..3becb84 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -4,6 +4,9 @@ config ARCH_TEXT_BASE
hex
default 0x0
+config BOARDINFO
+ default ""
+
choice
prompt "Tegra debug UART"
help
@@ -43,26 +46,17 @@ config ARCH_TEGRA_2x_SOC
bool
select PINCTRL_TEGRA20
-choice
- prompt "select Tegra Board"
+menu "select Tegra boards to be built"
-config MACH_TEGRA20_GENERIC
- bool "Generic DT based board"
+config MACH_TORADEX_COLIBRI_T20_IRIS
+ bool "Toradex Colibri T20 on Iris Carrier"
select ARCH_TEGRA_2x_SOC
- help
- Say Y here if you are building for a generic DT based board.
config MACH_TOSHIBA_AC100
bool "Toshiba AC100"
select ARCH_TEGRA_2x_SOC
- help
- Say Y here if you are using Toshiba AC100 smartbook.
-
-endchoice
-
-if MACH_TEGRA20_GENERIC
-endif #MACH_TEGRA20_GENERIC
+endmenu
# ---------------------------------------------------------
diff --git a/arch/arm/mach-tegra/include/mach/lowlevel.h b/arch/arm/mach-tegra/include/mach/lowlevel.h
index 2d3f312..472348a 100644
--- a/arch/arm/mach-tegra/include/mach/lowlevel.h
+++ b/arch/arm/mach-tegra/include/mach/lowlevel.h
@@ -172,5 +172,20 @@ int tegra_get_osc_clock(void)
}
}
+static inline __attribute__((always_inline))
+void tegra_cpu_lowlevel_setup(void)
+{
+ uint32_t r;
+
+ /* set the cpu to SVC32 mode */
+ __asm__ __volatile__("mrs %0, cpsr":"=r"(r));
+ r &= ~0x1f;
+ r |= 0xd3;
+ __asm__ __volatile__("msr cpsr, %0" : : "r"(r));
+}
+
+/* reset vector for the AVP, to be called from board reset vector */
+void tegra_avp_reset_vector(uint32_t boarddata);
+
/* reset vector for the main CPU complex */
void tegra_maincomplex_entry(void);
diff --git a/arch/arm/mach-tegra/include/mach/tegra20-pmc.h b/arch/arm/mach-tegra/include/mach/tegra20-pmc.h
index d56b845..3a05e0f 100644
--- a/arch/arm/mach-tegra/include/mach/tegra20-pmc.h
+++ b/arch/arm/mach-tegra/include/mach/tegra20-pmc.h
@@ -65,3 +65,5 @@
#define PMC_PWRGATE_STATUS_VE (1 << 2)
#define PMC_PWRGATE_STATUS_TD (1 << 1)
#define PMC_PWRGATE_STATUS_CPU (1 << 0)
+
+#define PMC_SCRATCH(i) (0x050 + 0x4*i)
diff --git a/arch/arm/mach-tegra/tegra_avp_init.c b/arch/arm/mach-tegra/tegra_avp_init.c
index 557af66..6cabdb3 100644
--- a/arch/arm/mach-tegra/tegra_avp_init.c
+++ b/arch/arm/mach-tegra/tegra_avp_init.c
@@ -24,17 +24,6 @@
#include <mach/tegra20-car.h>
#include <mach/tegra20-pmc.h>
-static inline void tegra_cpu_lowlevel_setup(void)
-{
- uint32_t r;
-
- /* set the cpu to SVC32 mode */
- __asm__ __volatile__("mrs %0, cpsr":"=r"(r));
- r &= ~0x1f;
- r |= 0xd3;
- __asm__ __volatile__("msr cpsr, %0" : : "r"(r));
-}
-
/* instruct the PMIC to enable the CPU power rail */
static void enable_maincomplex_powerrail(void)
{
@@ -186,13 +175,10 @@ static void maincomplex_powerup(void)
writel(reg, TEGRA_PMC_BASE + PMC_REMOVE_CLAMPING_CMD);
}
}
-void barebox_arm_reset_vector(void)
+void tegra_avp_reset_vector(uint32_t boarddata)
{
int num_cores;
- /* minimal initialization, OK for both ARMv4 and ARMv7 */
- tegra_cpu_lowlevel_setup();
-
/* get the number of cores in the main CPU complex of the current SoC */
num_cores = tegra_get_num_cores();
@@ -205,6 +191,9 @@ void barebox_arm_reset_vector(void)
writel(tegra_maincomplex_entry - get_runtime_offset(),
TEGRA_EXCEPTION_VECTORS_BASE + 0x100);
+ /* put boarddata in scratch reg, for main CPU to fetch after startup */
+ writel(boarddata, TEGRA_PMC_BASE + PMC_SCRATCH(10));
+
/* bring up main CPU complex */
start_cpu0_clocks();
maincomplex_powerup();
diff --git a/arch/arm/mach-tegra/tegra_maincomplex_init.c b/arch/arm/mach-tegra/tegra_maincomplex_init.c
index c485760..b3d59ab 100644
--- a/arch/arm/mach-tegra/tegra_maincomplex_init.c
+++ b/arch/arm/mach-tegra/tegra_maincomplex_init.c
@@ -19,6 +19,7 @@
#include <asm/barebox-arm-head.h>
#include <asm/barebox-arm.h>
#include <mach/lowlevel.h>
+#include <mach/tegra20-pmc.h>
void tegra_maincomplex_entry(void)
{
@@ -36,5 +37,6 @@ void tegra_maincomplex_entry(void)
unreachable();
}
- barebox_arm_entry(rambase, ramsize, 0);
+ barebox_arm_entry(rambase, ramsize,
+ readl(TEGRA_PMC_BASE + PMC_SCRATCH(10)));
}
diff --git a/images/Makefile b/images/Makefile
index ac5cf8c..31e74f3 100644
--- a/images/Makefile
+++ b/images/Makefile
@@ -109,6 +109,7 @@ $(obj)/%.img: $(obj)/$$(FILE_$$(@F))
include $(srctree)/images/Makefile.imx
include $(srctree)/images/Makefile.mvebu
include $(srctree)/images/Makefile.socfpga
+include $(srctree)/images/Makefile.tegra
targets += $(image-y) pbl.lds barebox.x barebox.z
targets += $(patsubst %,%.pblx,$(pblx-y))
diff --git a/images/Makefile.tegra b/images/Makefile.tegra
new file mode 100644
index 0000000..1cf1432
--- /dev/null
+++ b/images/Makefile.tegra
@@ -0,0 +1,14 @@
+#
+# barebox image generation Makefile for Tegra images
+#
+
+board = $(srctree)/arch/$(ARCH)/boards
+
+# ----------------------- Tegra20 based boards ---------------------------
+pblx-$(CONFIG_MACH_TOSHIBA_AC100) += start_toshiba_ac100
+FILE_barebox-tegra20-toshiba-ac100.img = start_toshiba_ac100.pblx
+image-$(CONFIG_MACH_TOSHIBA_AC100) += barebox-tegra20-toshiba-ac100.img
+
+pblx-$(CONFIG_MACH_TORADEX_COLIBRI_T20_IRIS) += start_toradex_colibri_t20_iris
+FILE_barebox-tegra20-toradex-colibri-t20-iris.img = start_toradex_colibri_t20_iris.pblx
+image-$(CONFIG_MACH_TORADEX_COLIBRI_T20_IRIS) += barebox-tegra20-toradex-colibri-t20-iris.img
--
1.8.3.1
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