[PATCH 1/7] atmel_nand: check gpio validity before using it

[PATCH 1/7] atmel_nand: check gpio validity before using it

[Eric Bénard]

else we get : "invalid GPIO -22"
(as enable_pin is EINVAL)

tested on SAMA5D35

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 drivers/mtd/nand/atmel_nand.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index a0f0966..658ae52 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -107,7 +107,7 @@ static struct nand_ecclayout atmel_pmecc_oobinfo;
  */
 static void atmel_nand_enable(struct atmel_nand_host *host)
 {
-	if (host->board->enable_pin)
+	if (gpio_is_valid(host->board->enable_pin))
 		gpio_set_value(host->board->enable_pin, 0);
 }
 
@@ -116,7 +116,7 @@ static void atmel_nand_enable(struct atmel_nand_host *host)
  */
 static void atmel_nand_disable(struct atmel_nand_host *host)
 {
-	if (host->board->enable_pin)
+	if (gpio_is_valid(host->board->enable_pin))
 		gpio_set_value(host->board->enable_pin, 1);
 }
 
-- 
1.8.3.1


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[PATCH 2/7] at91: introduce sama5d3's SMC support

[Eric Bénard]

there is a new register (timings) vs SAM9 and thus a new mapping

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/mach-at91/generic.h                |   7 ++
 arch/arm/mach-at91/include/mach/sama5_smc.h | 124 +++++++++++++++++++++
 arch/arm/mach-at91/sama5_smc.c              | 161 ++++++++++++++++++++++++++++
 3 files changed, 292 insertions(+)
 create mode 100644 arch/arm/mach-at91/include/mach/sama5_smc.h
 create mode 100644 arch/arm/mach-at91/sama5_smc.c

diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index a47bcb2..3a510fb 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -36,4 +36,11 @@ static inline struct device_d *at91_add_sam9_smc(int id, resource_size_t start,
 				  IORESOURCE_MEM, NULL);
 }
 
+static inline struct device_d *at91_add_sama5_smc(int id, resource_size_t start,
+						 resource_size_t size)
+{
+	return add_generic_device("at91sama5-smc", id, NULL, start, size,
+				  IORESOURCE_MEM, NULL);
+}
+
 void at91_rtt_irq_fixup(void *base);
diff --git a/arch/arm/mach-at91/include/mach/sama5_smc.h b/arch/arm/mach-at91/include/mach/sama5_smc.h
new file mode 100644
index 0000000..dde4cce
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/sama5_smc.h
@@ -0,0 +1,124 @@
+/*
+ * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9_smc.h]
+ *
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
+ * Copyright (C) 2013 Eric Bénard
+ *
+ * Static Memory Controllers (HSMC) - System peripherals registers.
+ * Based on SAMA5D3 series datasheet revision B.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef SAMA5_SMC_H
+#define SAMA5_SMC_H
+
+#define at91_smc_read(id, field) \
+	__raw_readl(AT91_BASE_SMC + ((id) * 0x14) + field)
+
+#define at91_smc_write(id, field, value) \
+	__raw_writel(value, AT91_BASE_SMC + ((id) * 0x14) + field)
+
+#ifndef __ASSEMBLY__
+struct sama5_smc_config {
+	/* Setup register */
+	u8 ncs_read_setup;
+	u8 nrd_setup;
+	u8 ncs_write_setup;
+	u8 nwe_setup;
+
+	/* Pulse register */
+	u8 ncs_read_pulse;
+	u8 nrd_pulse;
+	u8 ncs_write_pulse;
+	u8 nwe_pulse;
+
+	/* Cycle register */
+	u16 read_cycle;
+	u16 write_cycle;
+
+	/* Timings register */
+	u8 cle_to_ren_low_delay;
+	u8 ale_to_data_start;
+	u8 ale_to_ren_low_delay;
+	u8 off_chip_memory_scrambling_enable;
+	u8 ready_to_ren_low_delay;
+	u8 wen_high_to_ren_to_busy;
+	u8 ready_busy_line_selection;
+	u8 nand_flash_selection;
+
+	/* Mode register */
+	u32 mode;
+	u8 tdf_cycles:4;
+};
+
+extern void sama5_smc_configure(int id, int cs, struct sama5_smc_config *config);
+extern void sama5_smc_read(int id, int cs, struct sama5_smc_config *config);
+extern void sama5_smc_read_mode(int id, int cs, struct sama5_smc_config *config);
+extern void sama5_smc_write_mode(int id, int cs, struct sama5_smc_config *config);
+#endif
+
+#define AT91_SMC_SETUP		0x00				/* Setup Register for CS n */
+#define		AT91_SMC_NWESETUP	(0x3f << 0)			/* NWE Setup Length */
+#define			AT91_SMC_NWESETUP_(x)	((x) << 0)
+#define		AT91_SMC_NCS_WRSETUP	(0x3f << 8)			/* NCS Setup Length in Write Access */
+#define			AT91_SMC_NCS_WRSETUP_(x)	((x) << 8)
+#define		AT91_SMC_NRDSETUP	(0x3f << 16)			/* NRD Setup Length */
+#define			AT91_SMC_NRDSETUP_(x)	((x) << 16)
+#define		AT91_SMC_NCS_RDSETUP	(0x3f << 24)			/* NCS Setup Length in Read Access */
+#define			AT91_SMC_NCS_RDSETUP_(x)	((x) << 24)
+
+#define AT91_SMC_PULSE		0x04				/* Pulse Register for CS n */
+#define		AT91_SMC_NWEPULSE	(0x7f <<  0)			/* NWE Pulse Length */
+#define			AT91_SMC_NWEPULSE_(x)	((x) << 0)
+#define		AT91_SMC_NCS_WRPULSE	(0x7f <<  8)			/* NCS Pulse Length in Write Access */
+#define			AT91_SMC_NCS_WRPULSE_(x)((x) << 8)
+#define		AT91_SMC_NRDPULSE	(0x7f << 16)			/* NRD Pulse Length */
+#define			AT91_SMC_NRDPULSE_(x)	((x) << 16)
+#define		AT91_SMC_NCS_RDPULSE	(0x7f << 24)			/* NCS Pulse Length in Read Access */
+#define			AT91_SMC_NCS_RDPULSE_(x)((x) << 24)
+
+#define AT91_SMC_CYCLE		0x08				/* Cycle Register for CS n */
+#define		AT91_SMC_NWECYCLE	(0x1ff << 0 )			/* Total Write Cycle Length */
+#define			AT91_SMC_NWECYCLE_(x)	((x) << 0)
+#define		AT91_SMC_NRDCYCLE	(0x1ff << 16)			/* Total Read Cycle Length */
+#define			AT91_SMC_NRDCYCLE_(x)	((x) << 16)
+
+#define AT91_SMC_TIMINGS	0x0c				/* Cycle Register for CS n */
+#define		AT91C_SMC_TIMINGS_TCLR	(0xf << 0)
+#define			AT91C_SMC_TIMINGS_TCLR_(x)	(x & 0xf)
+#define		AT91C_SMC_TIMINGS_TADL	(0xf << 4)
+#define			AT91C_SMC_TIMINGS_TADL_(x)	((x & 0xf) << 4)
+#define		AT91C_SMC_TIMINGS_TAR	(0xf << 8)
+#define			AT91C_SMC_TIMINGS_TAR_(x)	((x & 0xf) << 8)
+#define		AT91C_SMC_TIMINGS_OCMS	(0x01 << 12)
+#define		AT91C_SMC_TIMINGS_TRR	(0xf << 16)
+#define			AT91C_SMC_TIMINGS_TRR_(x)	((x & 0xf) << 16)
+#define		AT91C_SMC_TIMINGS_TWB	(0xf << 24)
+#define			AT91C_SMC_TIMINGS_TWB_(x)	((x & 0xf) << 24)
+#define		AT91C_SMC_TIMINGS_RBNSEL	(0x7 << 28)
+#define			AT91C_SMC_TIMINGS_RBNSEL_(x)	((x & 0x7) << 28)
+#define		AT91C_SMC_TIMINGS_NFSEL		(0x01 << 31)
+
+#define AT91_SMC_MODE		0x10				/* Mode Register for CS n */
+#define		AT91_SMC_READMODE	(1 <<  0)			/* Read Mode */
+#define		AT91_SMC_WRITEMODE	(1 <<  1)			/* Write Mode */
+#define		AT91_SMC_EXNWMODE	(3 <<  4)			/* NWAIT Mode */
+#define			AT91_SMC_EXNWMODE_DISABLE	(0 << 4)
+#define			AT91_SMC_EXNWMODE_FROZEN	(2 << 4)
+#define			AT91_SMC_EXNWMODE_READY		(3 << 4)
+#define		AT91_SMC_BAT		(1 <<  8)			/* Byte Access Type */
+#define			AT91_SMC_BAT_SELECT		(0 << 8)
+#define			AT91_SMC_BAT_WRITE		(1 << 8)
+#define		AT91_SMC_DBW		(1 << 12)			/* Data Bus Width */
+#define			AT91_SMC_DBW_8			(0 << 12)
+#define			AT91_SMC_DBW_16			(1 << 12)
+#define		AT91_SMC_TDF		(0xf << 16)			/* Data Float Time. */
+#define			AT91_SMC_TDF_(x)		((x) << 16)
+#define		AT91_SMC_TDFMODE	(1 << 20)			/* TDF Optimization - Enabled */
+
+#endif
diff --git a/arch/arm/mach-at91/sama5_smc.c b/arch/arm/mach-at91/sama5_smc.c
new file mode 100644
index 0000000..ea66c97
--- /dev/null
+++ b/arch/arm/mach-at91/sama5_smc.c
@@ -0,0 +1,161 @@
+/*
+ * linux/arch/arm/mach-at91/sama5smc.c
+ *
+ * Copyright (C) 2008 Andrew Victor
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <mach/hardware.h>
+#include <mach/io.h>
+
+#include <mach/sama5_smc.h>
+
+#define AT91_SMC_CS(id, n)	(smc_base_addr[id] + ((n) * 0x14))
+
+static void __iomem *smc_base_addr[2];
+
+static void sama5smc_cs_write_mode(void __iomem *base,
+					struct sama5_smc_config *config)
+{
+	__raw_writel(config->mode
+		   | AT91_SMC_TDF_(config->tdf_cycles),
+		   base + AT91_SMC_MODE);
+}
+
+void sama5smc_write_mode(int id, int cs,
+					struct sama5_smc_config *config)
+{
+	sama5smc_cs_write_mode(AT91_SMC_CS(id, cs), config);
+}
+
+static void sama5smc_cs_configure(void __iomem *base,
+					struct sama5_smc_config *config)
+{
+
+	/* Setup register */
+	__raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup)
+		   | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
+		   | AT91_SMC_NRDSETUP_(config->nrd_setup)
+		   | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup),
+		   base + AT91_SMC_SETUP);
+
+	/* Pulse register */
+	__raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse)
+		   | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
+		   | AT91_SMC_NRDPULSE_(config->nrd_pulse)
+		   | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse),
+		   base + AT91_SMC_PULSE);
+
+	/* Cycle register */
+	__raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle)
+		   | AT91_SMC_NRDCYCLE_(config->read_cycle),
+		   base + AT91_SMC_CYCLE);
+
+	/* Timings register */
+	__raw_writel(AT91C_SMC_TIMINGS_TCLR_(config->cle_to_ren_low_delay)
+		   | AT91C_SMC_TIMINGS_TADL_(config->ale_to_data_start)
+		   | AT91C_SMC_TIMINGS_TAR_(config->ale_to_ren_low_delay)
+		   | (config->off_chip_memory_scrambling_enable ? AT91C_SMC_TIMINGS_OCMS : 0)
+		   | AT91C_SMC_TIMINGS_TRR_(config->ready_to_ren_low_delay)
+		   | AT91C_SMC_TIMINGS_TWB_(config->wen_high_to_ren_to_busy)
+		   | AT91C_SMC_TIMINGS_RBNSEL_(config->ready_busy_line_selection)
+		   | (config->nand_flash_selection ? AT91C_SMC_TIMINGS_NFSEL : 0),
+		   base + AT91_SMC_TIMINGS);
+
+	/* Mode register */
+	sama5smc_cs_write_mode(base, config);
+}
+
+void sama5_smc_configure(int id, int cs,
+					struct sama5_smc_config *config)
+{
+	sama5smc_cs_configure(AT91_SMC_CS(id, cs), config);
+}
+
+static void sama5smc_cs_read_mode(void __iomem *base,
+					struct sama5_smc_config *config)
+{
+	u32 val = __raw_readl(base + AT91_SMC_MODE);
+
+	config->mode = (val & ~AT91_SMC_NWECYCLE);
+	config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ;
+}
+
+void sama5smc_read_mode(int id, int cs,
+					struct sama5_smc_config *config)
+{
+	sama5smc_cs_read_mode(AT91_SMC_CS(id, cs), config);
+}
+
+static void sama5smc_cs_read(void __iomem *base,
+					struct sama5_smc_config *config)
+{
+	u32 val;
+
+	/* Setup register */
+	val = __raw_readl(base + AT91_SMC_SETUP);
+
+	config->nwe_setup = val & AT91_SMC_NWESETUP;
+	config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8;
+	config->nrd_setup = (val & AT91_SMC_NRDSETUP) >> 16;
+	config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24;
+
+	/* Pulse register */
+	val = __raw_readl(base + AT91_SMC_PULSE);
+
+	config->nwe_setup = val & AT91_SMC_NWEPULSE;
+	config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8;
+	config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16;
+	config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24;
+
+	/* Cycle register */
+	val = __raw_readl(base + AT91_SMC_CYCLE);
+
+	config->write_cycle = val & AT91_SMC_NWECYCLE;
+	config->read_cycle = (val & AT91_SMC_NRDCYCLE) >> 16;
+
+	/* Mode register */
+	sama5smc_cs_read_mode(base, config);
+}
+
+void sama5smc_read(int id, int cs, struct sama5_smc_config *config)
+{
+	sama5smc_cs_read(AT91_SMC_CS(id, cs), config);
+}
+
+static int at91sama5smc_probe(struct device_d *dev)
+{
+	int id = dev->id;
+
+	if (id < 0) {
+		id = 0;
+	} else if (id > 1) {
+		dev_warn(dev, "id > 1\n");
+		return -EIO;
+	}
+
+	smc_base_addr[id] = dev_request_mem_region(dev, 0);
+	if (!smc_base_addr[id]) {
+		dev_err(dev, "Impossible to request smc.%d\n", id);
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+static struct driver_d at91sama5smc_driver = {
+	.name = "at91sama5-smc",
+	.probe = at91sama5smc_probe,
+};
+
+static int at91sama5smc_init(void)
+{
+	return platform_driver_register(&at91sama5smc_driver);
+}
+coredevice_initcall(at91sama5smc_init);
-- 
1.8.3.1


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[PATCH 3/7] at91: sama5d3: use the sama5 smc instead of the sam9 one

[Eric Bénard]

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/mach-at91/Kconfig   | 1 -
 arch/arm/mach-at91/Makefile  | 2 +-
 arch/arm/mach-at91/sama5d3.c | 2 +-
 3 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 6ab374e..d411edc 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -24,7 +24,6 @@ config SOC_AT91SAM9
 config SOC_SAMA5
 	bool
 	select CPU_V7
-	select AT91SAM9_SMC
 	select AT91SAM9_TIMER
 
 config ARCH_TEXT_BASE
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index ab80e5f..18d156c 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -30,4 +30,4 @@ obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam9260_devices.o
 obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam9g45_devices.o
 obj-$(CONFIG_ARCH_AT91SAM9X5)	+= at91sam9x5.o at91sam9x5_devices.o
 obj-$(CONFIG_ARCH_AT91SAM9N12)	+= at91sam9n12.o at91sam9n12_devices.o
-obj-$(CONFIG_ARCH_SAMA5D3)	+= sama5d3.o sama5d3_devices.o
+obj-$(CONFIG_ARCH_SAMA5D3)	+= sama5d3.o sama5d3_devices.o sama5_smc.o
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index aa681aa..acbf018 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -386,7 +386,7 @@ static void sama5d3_initialize(void)
 	at91_add_sam9x5_gpio(4, SAMA5D3_BASE_PIOE);
 
 	at91_add_pit(SAMA5D3_BASE_PIT);
-	at91_add_sam9_smc(DEVICE_ID_SINGLE, SAMA5D3_BASE_HSMC + 0x600, 0xa0);
+	at91_add_sama5_smc(DEVICE_ID_SINGLE, SAMA5D3_BASE_HSMC + 0x600, 0xa0);
 }
 
 AT91_SOC_START(sama5d3)
-- 
1.8.3.1


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[PATCH 4/7] sama5d3xek: update nand timings

[Eric Bénard]

This updates nand timings to at91bootstrap's ones (branch 3.5.x)
With this setting nand flash is properly detected when we boot from SPI
NOR flash.

When booting on SPI NOR, log is now :
nand: ONFI param page 0 valid
nand: ONFI flash detected
nand: NAND device: Manufacturer ID: 0x2c, Chip ID: 0xda (Micron MT29F2G08ABAEAWP), 256MiB, page size: 2048, OOB size: 64
atmel_nand atmel_nand0: Initialize PMECC params, cap: 4, sector: 512

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/boards/sama5d3xek/init.c | 34 +++++++++++++++++++++-------------
 1 file changed, 21 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boards/sama5d3xek/init.c b/arch/arm/boards/sama5d3xek/init.c
index 482c74a..ff62550 100644
--- a/arch/arm/boards/sama5d3xek/init.c
+++ b/arch/arm/boards/sama5d3xek/init.c
@@ -29,8 +29,7 @@
 #include <sizes.h>
 #include <linux/mtd/nand.h>
 #include <mach/board.h>
-#include <mach/at91sam9_smc.h>
-#include <mach/at91sam9_smc.h>
+#include <mach/sama5_smc.h>
 #include <gpio.h>
 #include <mach/io.h>
 #include <mach/iomux.h>
@@ -71,19 +70,28 @@ static struct atmel_nand_data nand_pdata = {
 	.on_flash_bbt	= 1,
 };
 
-static struct sam9_smc_config cm_nand_smc_config = {
-	.ncs_read_setup		= 0,
-	.nrd_setup		= 1,
-	.ncs_write_setup	= 0,
+static struct sama5_smc_config cm_nand_smc_config = {
+	.ncs_read_setup		= 1,
+	.nrd_setup		= 2,
+	.ncs_write_setup	= 1,
 	.nwe_setup		= 1,
 
-	.ncs_read_pulse		= 6,
-	.nrd_pulse		= 4,
-	.ncs_write_pulse	= 5,
-	.nwe_pulse		= 3,
+	.ncs_read_pulse		= 7,
+	.nrd_pulse		= 5,
+	.ncs_write_pulse	= 7,
+	.nwe_pulse		= 5,
 
-	.read_cycle		= 6,
-	.write_cycle		= 5,
+	.read_cycle		= 9,
+	.write_cycle		= 8,
+
+	.cle_to_ren_low_delay	= 3,
+	.ale_to_data_start	= 10,
+	.ale_to_ren_low_delay	= 3,
+	.off_chip_memory_scrambling_enable = 0,
+	.ready_to_ren_low_delay = 4,
+	.wen_high_to_ren_to_busy = 5,
+	.ready_busy_line_selection = 3,
+	.nand_flash_selection	= 1,
 
 	.mode			= AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
 	.tdf_cycles		= 1,
@@ -102,7 +110,7 @@ static void ek_add_device_nand(void)
 		cm_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
 	/* configure chip-select 3 (NAND) */
-	sam9_smc_configure(0, 3, &cm_nand_smc_config);
+	sama5_smc_configure(0, 3, &cm_nand_smc_config);
 
 	at91_add_device_nand(&nand_pdata);
 }
-- 
1.8.3.1


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[PATCH 5/7] atmel_nand: make chip_delay configurable

[Eric Bénard]

this is usefull for custom boards with different NAND flashs
(for informations u-boot defaults chip_delay to 75)

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/mach-at91/include/mach/board.h | 1 +
 drivers/mtd/nand/atmel_nand.c           | 5 ++++-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index aa0fdae..4e6fa8b 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -64,6 +64,7 @@ struct atmel_nand_data {
 	u8		ecc_mode;	/* NAND_ECC_* */
 	u8		on_flash_bbt;	/* Use flash based bbt */
 	u8		bus_on_d0;
+	int		chip_delay;
 
 	u8		pmecc_corr_cap;
 	u16		pmecc_sector_size;
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 658ae52..2ff7427 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1161,7 +1161,10 @@ static int __init atmel_nand_probe(struct device_d *dev)
 		nand_chip->ecc.mode = NAND_ECC_HW;
 	}
 
-	nand_chip->chip_delay = 20;		/* 20us command delay time */
+	if (host->board->chip_delay > 0)
+		nand_chip->chip_delay = host->board->chip_delay;
+	else
+		nand_chip->chip_delay = 20;		/* 20us command delay time */
 
 	if (host->board->bus_width_16) {	/* 16-bit bus width */
 		nand_chip->options |= NAND_BUSWIDTH_16;
-- 
1.8.3.1


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[PATCH 6/7] sama5d3xek: add NOR CFI support

[Eric Bénard]

log is now :
cfi_flash cfi_flash0: found cfi flash at 10000000, size 16777216

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/boards/sama5d3xek/init.c | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm/boards/sama5d3xek/init.c b/arch/arm/boards/sama5d3xek/init.c
index ff62550..f7dfea0 100644
--- a/arch/arm/boards/sama5d3xek/init.c
+++ b/arch/arm/boards/sama5d3xek/init.c
@@ -118,6 +118,40 @@ static void ek_add_device_nand(void)
 static void ek_add_device_nand(void) {}
 #endif
 
+#if defined(CONFIG_DRIVER_CFI)
+static struct sama5_smc_config __initdata cm_nor_smc_config = {
+	.ncs_read_setup		= 10,
+	.nrd_setup		= 10,
+	.ncs_write_setup	= 10,
+	.nwe_setup		= 10,
+
+	.ncs_read_pulse		= 11,
+	.nrd_pulse		= 11,
+	.ncs_write_pulse	= 11,
+	.nwe_pulse		= 11,
+
+	.read_cycle		= 22,
+	.write_cycle		= 22,
+
+	.mode			= AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_DBW_16,
+	.tdf_cycles		= 6,
+};
+
+static void ek_add_device_norcfi(void)
+{
+	struct clk *clk = clk_get(NULL, "smc_clk");
+
+	clk_enable(clk);
+
+	/* configure chip-select 0 (NOR) */
+	sama5_smc_configure(0, 0, &cm_nor_smc_config);
+
+	add_cfi_flash_device(0, AT91_CHIPSELECT_0, 256 * 1024 * 1024, 0);
+}
+#else
+static void ek_add_device_norcfi(void) {}
+#endif
+
 #if defined(CONFIG_DRIVER_NET_MACB)
 static struct macb_platform_data gmac_pdata = {
 	.phy_interface = PHY_INTERFACE_MODE_RGMII,
@@ -413,6 +447,7 @@ static int at91sama5d3xek_devices_init(void)
 	ek_add_device_w1();
 	ek_add_device_hdmi();
 	ek_add_device_nand();
+	ek_add_device_norcfi();
 	ek_add_led();
 	ek_add_device_eth();
 	ek_add_device_spi();
-- 
1.8.3.1


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[PATCH 7/7] samsa5d3xek: update defconfig

[Eric Bénard]

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/configs/sama5d3xek_defconfig | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm/configs/sama5d3xek_defconfig b/arch/arm/configs/sama5d3xek_defconfig
index 970ded5..bd331c3 100644
--- a/arch/arm/configs/sama5d3xek_defconfig
+++ b/arch/arm/configs/sama5d3xek_defconfig
@@ -41,8 +41,7 @@ CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
+CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_SPLASH=y
 CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_PARTITION=y
@@ -65,13 +64,17 @@ CONFIG_I2C_GPIO=y
 CONFIG_MTD=y
 # CONFIG_MTD_OOB_DEVICE is not set
 CONFIG_MTD_M25P80=y
+CONFIG_DRIVER_CFI=y
+# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set
+# CONFIG_DRIVER_CFI_BANK_WIDTH_4 is not set
+CONFIG_CFI_BUFFER_WRITE=y
 CONFIG_NAND=y
 # CONFIG_NAND_ECC_SOFT is not set
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
 CONFIG_NAND_ATMEL_PMECC=y
-CONFIG_UBI=y
+CONFIG_MTD_UBI=y
 CONFIG_VIDEO=y
 CONFIG_DRIVER_VIDEO_ATMEL_HLCD=y
 CONFIG_MCI=y
-- 
1.8.3.1


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Re: [PATCH 1/7] atmel_nand: check gpio validity before using it

[Sascha Hauer]

The series looks fine for me. Jean-Christophe?

Sascha

On Sat, Dec 07, 2013 at 10:36:54AM +0100, Eric Bénard wrote:
> else we get : "invalid GPIO -22"
> (as enable_pin is EINVAL)
> 
> tested on SAMA5D35
> 
> Signed-off-by: Eric Bénard <eric@eukrea.com>
> ---
>  drivers/mtd/nand/atmel_nand.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> index a0f0966..658ae52 100644
> --- a/drivers/mtd/nand/atmel_nand.c
> +++ b/drivers/mtd/nand/atmel_nand.c
> @@ -107,7 +107,7 @@ static struct nand_ecclayout atmel_pmecc_oobinfo;
>   */
>  static void atmel_nand_enable(struct atmel_nand_host *host)
>  {
> -	if (host->board->enable_pin)
> +	if (gpio_is_valid(host->board->enable_pin))
>  		gpio_set_value(host->board->enable_pin, 0);
>  }
>  
> @@ -116,7 +116,7 @@ static void atmel_nand_enable(struct atmel_nand_host *host)
>   */
>  static void atmel_nand_disable(struct atmel_nand_host *host)
>  {
> -	if (host->board->enable_pin)
> +	if (gpio_is_valid(host->board->enable_pin))
>  		gpio_set_value(host->board->enable_pin, 1);
>  }
>  
> -- 
> 1.8.3.1
> 
> 
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> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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Re: [PATCH 2/7] at91: introduce sama5d3's SMC support

[Jean-Christophe PLAGNIOL-VILLARD]

On 10:36 Sat 07 Dec     , Eric B??nard wrote:
> there is a new register (timings) vs SAM9 and thus a new mapping
> 
> Signed-off-by: Eric Bénard <eric@eukrea.com>
> ---
>  arch/arm/mach-at91/generic.h                |   7 ++
>  arch/arm/mach-at91/include/mach/sama5_smc.h | 124 +++++++++++++++++++++
>  arch/arm/mach-at91/sama5_smc.c              | 161 ++++++++++++++++++++++++++++
>  3 files changed, 292 insertions(+)
>  create mode 100644 arch/arm/mach-at91/include/mach/sama5_smc.h
>  create mode 100644 arch/arm/mach-at91/sama5_smc.c

nack the sama5 smc share part of the same IP as the sam9 do not duplicate code
share it

Best Regards,
J.

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Re: [PATCH 3/7] at91: sama5d3: use the sama5 smc instead of the sam9 one

[Jean-Christophe PLAGNIOL-VILLARD]

On 10:36 Sat 07 Dec     , Eric B??nard wrote:
> Signed-off-by: Eric Bénard <eric@eukrea.com>
> ---
>  arch/arm/mach-at91/Kconfig   | 1 -
>  arch/arm/mach-at91/Makefile  | 2 +-
>  arch/arm/mach-at91/sama5d3.c | 2 +-
>  3 files changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
> index 6ab374e..d411edc 100644
> --- a/arch/arm/mach-at91/Kconfig
> +++ b/arch/arm/mach-at91/Kconfig
> @@ -24,7 +24,6 @@ config SOC_AT91SAM9
>  config SOC_SAMA5
>  	bool
>  	select CPU_V7
> -	select AT91SAM9_SMC
select here I do not want to hack it again when having a new smc
or a new SoC
>  	select AT91SAM9_TIMER
>  
>  config ARCH_TEXT_BASE
> diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
> index ab80e5f..18d156c 100644
> --- a/arch/arm/mach-at91/Makefile
> +++ b/arch/arm/mach-at91/Makefile
> @@ -30,4 +30,4 @@ obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam9260_devices.o
>  obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam9g45_devices.o
>  obj-$(CONFIG_ARCH_AT91SAM9X5)	+= at91sam9x5.o at91sam9x5_devices.o
>  obj-$(CONFIG_ARCH_AT91SAM9N12)	+= at91sam9n12.o at91sam9n12_devices.o
> -obj-$(CONFIG_ARCH_SAMA5D3)	+= sama5d3.o sama5d3_devices.o
> +obj-$(CONFIG_ARCH_SAMA5D3)	+= sama5d3.o sama5d3_devices.o sama5_smc.o
> diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
> index aa681aa..acbf018 100644
> --- a/arch/arm/mach-at91/sama5d3.c
> +++ b/arch/arm/mach-at91/sama5d3.c
> @@ -386,7 +386,7 @@ static void sama5d3_initialize(void)
>  	at91_add_sam9x5_gpio(4, SAMA5D3_BASE_PIOE);
>  
>  	at91_add_pit(SAMA5D3_BASE_PIT);
> -	at91_add_sam9_smc(DEVICE_ID_SINGLE, SAMA5D3_BASE_HSMC + 0x600, 0xa0);
> +	at91_add_sama5_smc(DEVICE_ID_SINGLE, SAMA5D3_BASE_HSMC + 0x600, 0xa0);
>  }
>  
>  AT91_SOC_START(sama5d3)
> -- 
> 1.8.3.1
> 
> 
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Re: [PATCH 5/7] atmel_nand: make chip_delay configurable

[Jean-Christophe PLAGNIOL-VILLARD]

On 10:36 Sat 07 Dec     , Eric B??nard wrote:
> this is usefull for custom boards with different NAND flashs
> (for informations u-boot defaults chip_delay to 75)
drop this comment on u-boot as in barebox we use the kernel driver
> 
> Signed-off-by: Eric Bénard <eric@eukrea.com>
> ---
>  arch/arm/mach-at91/include/mach/board.h | 1 +
>  drivers/mtd/nand/atmel_nand.c           | 5 ++++-
>  2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
> index aa0fdae..4e6fa8b 100644
> --- a/arch/arm/mach-at91/include/mach/board.h
> +++ b/arch/arm/mach-at91/include/mach/board.h
> @@ -64,6 +64,7 @@ struct atmel_nand_data {
>  	u8		ecc_mode;	/* NAND_ECC_* */
>  	u8		on_flash_bbt;	/* Use flash based bbt */
>  	u8		bus_on_d0;
> +	int		chip_delay;
>  
>  	u8		pmecc_corr_cap;
>  	u16		pmecc_sector_size;
> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> index 658ae52..2ff7427 100644
> --- a/drivers/mtd/nand/atmel_nand.c
> +++ b/drivers/mtd/nand/atmel_nand.c
> @@ -1161,7 +1161,10 @@ static int __init atmel_nand_probe(struct device_d *dev)
>  		nand_chip->ecc.mode = NAND_ECC_HW;
>  	}
>  
> -	nand_chip->chip_delay = 20;		/* 20us command delay time */
> +	if (host->board->chip_delay > 0)
> +		nand_chip->chip_delay = host->board->chip_delay;
> +	else
> +		nand_chip->chip_delay = 20;		/* 20us command delay time */
>  
>  	if (host->board->bus_width_16) {	/* 16-bit bus width */
>  		nand_chip->options |= NAND_BUSWIDTH_16;
> -- 
> 1.8.3.1
> 
> 
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Re: [PATCH 7/7] samsa5d3xek: update defconfig

[Jean-Christophe PLAGNIOL-VILLARD]

more comment here
On 10:37 Sat 07 Dec     , Eric B??nard wrote:
> Signed-off-by: Eric Bénard <eric@eukrea.com>
> ---
>  arch/arm/configs/sama5d3xek_defconfig | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/configs/sama5d3xek_defconfig b/arch/arm/configs/sama5d3xek_defconfig
> index 970ded5..bd331c3 100644
> --- a/arch/arm/configs/sama5d3xek_defconfig
> +++ b/arch/arm/configs/sama5d3xek_defconfig
> @@ -41,8 +41,7 @@ CONFIG_CMD_UIMAGE=y
>  CONFIG_CMD_RESET=y
>  CONFIG_CMD_GO=y
>  CONFIG_CMD_OFTREE=y
> -CONFIG_CMD_MTEST=y
> -CONFIG_CMD_MTEST_ALTERNATIVE=y
> +CONFIG_CMD_MEMTEST=y
why?
>  CONFIG_CMD_SPLASH=y
>  CONFIG_CMD_TIMEOUT=y
>  CONFIG_CMD_PARTITION=y
> @@ -65,13 +64,17 @@ CONFIG_I2C_GPIO=y
>  CONFIG_MTD=y
>  # CONFIG_MTD_OOB_DEVICE is not set
>  CONFIG_MTD_M25P80=y
> +CONFIG_DRIVER_CFI=y
> +# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set
> +# CONFIG_DRIVER_CFI_BANK_WIDTH_4 is not set
> +CONFIG_CFI_BUFFER_WRITE=y
>  CONFIG_NAND=y
>  # CONFIG_NAND_ECC_SOFT is not set
>  # CONFIG_NAND_ECC_HW_SYNDROME is not set
>  # CONFIG_NAND_ECC_HW_NONE is not set
>  CONFIG_NAND_ATMEL=y
>  CONFIG_NAND_ATMEL_PMECC=y
> -CONFIG_UBI=y
> +CONFIG_MTD_UBI=y
>  CONFIG_VIDEO=y
>  CONFIG_DRIVER_VIDEO_ATMEL_HLCD=y
>  CONFIG_MCI=y
> -- 
> 1.8.3.1
> 
> 
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Re: [PATCH 1/7] atmel_nand: check gpio validity before using it

[Jean-Christophe PLAGNIOL-VILLARD]

On 09:36 Mon 09 Dec     , Sascha Hauer wrote:
> 
> The series looks fine for me. Jean-Christophe?

small issues
> 
> Sascha
> 
> On Sat, Dec 07, 2013 at 10:36:54AM +0100, Eric Bénard wrote:
> > else we get : "invalid GPIO -22"
> > (as enable_pin is EINVAL)
> > 
> > tested on SAMA5D35
> > 
> > Signed-off-by: Eric Bénard <eric@eukrea.com>
> > ---
> >  drivers/mtd/nand/atmel_nand.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> > index a0f0966..658ae52 100644
> > --- a/drivers/mtd/nand/atmel_nand.c
> > +++ b/drivers/mtd/nand/atmel_nand.c
> > @@ -107,7 +107,7 @@ static struct nand_ecclayout atmel_pmecc_oobinfo;
> >   */
> >  static void atmel_nand_enable(struct atmel_nand_host *host)
> >  {
> > -	if (host->board->enable_pin)
> > +	if (gpio_is_valid(host->board->enable_pin))
> >  		gpio_set_value(host->board->enable_pin, 0);
> >  }
> >  
> > @@ -116,7 +116,7 @@ static void atmel_nand_enable(struct atmel_nand_host *host)
> >   */
> >  static void atmel_nand_disable(struct atmel_nand_host *host)
> >  {
> > -	if (host->board->enable_pin)
> > +	if (gpio_is_valid(host->board->enable_pin))
> >  		gpio_set_value(host->board->enable_pin, 1);
> >  }
> >  
> > -- 
> > 1.8.3.1
> > 
> > 
> > _______________________________________________
> > barebox mailing list
> > barebox@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/barebox
> 
> -- 
> Pengutronix e.K.                           |                             |
> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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Re: [PATCH 1/7] atmel_nand: check gpio validity before using it

[Jean-Christophe PLAGNIOL-VILLARD]

On 10:36 Sat 07 Dec     , Eric B??nard wrote:
> else we get : "invalid GPIO -22"
> (as enable_pin is EINVAL)
> 
> tested on SAMA5D35

Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

> 
> Signed-off-by: Eric Bénard <eric@eukrea.com>
> ---
>  drivers/mtd/nand/atmel_nand.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> index a0f0966..658ae52 100644
> --- a/drivers/mtd/nand/atmel_nand.c
> +++ b/drivers/mtd/nand/atmel_nand.c
> @@ -107,7 +107,7 @@ static struct nand_ecclayout atmel_pmecc_oobinfo;
>   */
>  static void atmel_nand_enable(struct atmel_nand_host *host)
>  {
> -	if (host->board->enable_pin)
> +	if (gpio_is_valid(host->board->enable_pin))
>  		gpio_set_value(host->board->enable_pin, 0);
>  }
>  
> @@ -116,7 +116,7 @@ static void atmel_nand_enable(struct atmel_nand_host *host)
>   */
>  static void atmel_nand_disable(struct atmel_nand_host *host)
>  {
> -	if (host->board->enable_pin)
> +	if (gpio_is_valid(host->board->enable_pin))
>  		gpio_set_value(host->board->enable_pin, 1);
>  }
>  
> -- 
> 1.8.3.1
> 
> 
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Re: [PATCH 6/7] sama5d3xek: add NOR CFI support

[Jean-Christophe PLAGNIOL-VILLARD]

On 10:36 Sat 07 Dec     , Eric B??nard wrote:
> log is now :
> cfi_flash cfi_flash0: found cfi flash at 10000000, size 16777216
> 
> Signed-off-by: Eric Bénard <eric@eukrea.com>
> ---
>  arch/arm/boards/sama5d3xek/init.c | 35 +++++++++++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/arch/arm/boards/sama5d3xek/init.c b/arch/arm/boards/sama5d3xek/init.c
> index ff62550..f7dfea0 100644
> --- a/arch/arm/boards/sama5d3xek/init.c
> +++ b/arch/arm/boards/sama5d3xek/init.c
> @@ -118,6 +118,40 @@ static void ek_add_device_nand(void)
>  static void ek_add_device_nand(void) {}
>  #endif
>  
> +#if defined(CONFIG_DRIVER_CFI)
> +static struct sama5_smc_config __initdata cm_nor_smc_config = {
drop the __initdata
> +	.ncs_read_setup		= 10,
> +	.nrd_setup		= 10,
> +	.ncs_write_setup	= 10,
> +	.nwe_setup		= 10,
> +
> +	.ncs_read_pulse		= 11,
> +	.nrd_pulse		= 11,
> +	.ncs_write_pulse	= 11,
> +	.nwe_pulse		= 11,
> +
> +	.read_cycle		= 22,
> +	.write_cycle		= 22,
> +
> +	.mode			= AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_DBW_16,
> +	.tdf_cycles		= 6,
> +};
> +
> +static void ek_add_device_norcfi(void)
> +{
> +	struct clk *clk = clk_get(NULL, "smc_clk");
> +
> +	clk_enable(clk);
> +
> +	/* configure chip-select 0 (NOR) */
> +	sama5_smc_configure(0, 0, &cm_nor_smc_config);
> +
> +	add_cfi_flash_device(0, AT91_CHIPSELECT_0, 256 * 1024 * 1024, 0);
no put the right size or 0 for auto detect not 256MiB

Best Regards,
J.
> +}
> +#else
> +static void ek_add_device_norcfi(void) {}
> +#endif
> +
>  #if defined(CONFIG_DRIVER_NET_MACB)
>  static struct macb_platform_data gmac_pdata = {
>  	.phy_interface = PHY_INTERFACE_MODE_RGMII,
> @@ -413,6 +447,7 @@ static int at91sama5d3xek_devices_init(void)
>  	ek_add_device_w1();
>  	ek_add_device_hdmi();
>  	ek_add_device_nand();
> +	ek_add_device_norcfi();
>  	ek_add_led();
>  	ek_add_device_eth();
>  	ek_add_device_spi();
> -- 
> 1.8.3.1
> 
> 
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Re: [PATCH 7/7] samsa5d3xek: update defconfig

[Eric Bénard]

Hi Jean-Christophe,

Le Mon, 9 Dec 2013 14:31:25 +0100,
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :

> more comment here
> On 10:37 Sat 07 Dec     , Eric B??nard wrote:
> > Signed-off-by: Eric Bénard <eric@eukrea.com>
> > ---
> >  arch/arm/configs/sama5d3xek_defconfig | 9 ++++++---
> >  1 file changed, 6 insertions(+), 3 deletions(-)
> > 
> > diff --git a/arch/arm/configs/sama5d3xek_defconfig b/arch/arm/configs/sama5d3xek_defconfig
> > index 970ded5..bd331c3 100644
> > --- a/arch/arm/configs/sama5d3xek_defconfig
> > +++ b/arch/arm/configs/sama5d3xek_defconfig
> > @@ -41,8 +41,7 @@ CONFIG_CMD_UIMAGE=y
> >  CONFIG_CMD_RESET=y
> >  CONFIG_CMD_GO=y
> >  CONFIG_CMD_OFTREE=y
> > -CONFIG_CMD_MTEST=y
> > -CONFIG_CMD_MTEST_ALTERNATIVE=y
> > +CONFIG_CMD_MEMTEST=y
> why?

because MTEST became MEMTEST so as you initialy enabled it, I updated
the defconfig to keep the same functionnality.
mtest was removed in :
47f9da43801d7a345569a35d23cd49eb355a891a
memtest was added in :
842308e29774c577291cae09a8a71ecc3b708b92

> >  CONFIG_CMD_SPLASH=y
> >  CONFIG_CMD_TIMEOUT=y
> >  CONFIG_CMD_PARTITION=y
> > @@ -65,13 +64,17 @@ CONFIG_I2C_GPIO=y
> >  CONFIG_MTD=y
> >  # CONFIG_MTD_OOB_DEVICE is not set
> >  CONFIG_MTD_M25P80=y
> > +CONFIG_DRIVER_CFI=y
> > +# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set
> > +# CONFIG_DRIVER_CFI_BANK_WIDTH_4 is not set
> > +CONFIG_CFI_BUFFER_WRITE=y
> >  CONFIG_NAND=y
> >  # CONFIG_NAND_ECC_SOFT is not set
> >  # CONFIG_NAND_ECC_HW_SYNDROME is not set
> >  # CONFIG_NAND_ECC_HW_NONE is not set
> >  CONFIG_NAND_ATMEL=y
> >  CONFIG_NAND_ATMEL_PMECC=y
> > -CONFIG_UBI=y
> > +CONFIG_MTD_UBI=y

same thing here.

Eric

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Re: [PATCH 5/7] atmel_nand: make chip_delay configurable

[Eric Bénard]

Le Mon, 9 Dec 2013 14:30:01 +0100,
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :

> On 10:36 Sat 07 Dec     , Eric B??nard wrote:
> > this is usefull for custom boards with different NAND flashs
> > (for informations u-boot defaults chip_delay to 75)
> drop this comment on u-boot as in barebox we use the kernel driver

that's an information which can be usefull for other users on custom
boards. Sorry if you don't like to read the word "u-boot" ;-)

Eric

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Re: [PATCH 5/7] atmel_nand: make chip_delay configurable

[Jean-Christophe PLAGNIOL-VILLARD]

On 15:54 Mon 09 Dec     , Eric B??nard wrote:
> Le Mon, 9 Dec 2013 14:30:01 +0100,
> Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> 
> > On 10:36 Sat 07 Dec     , Eric B??nard wrote:
> > > this is usefull for custom boards with different NAND flashs
> > > (for informations u-boot defaults chip_delay to 75)
> > drop this comment on u-boot as in barebox we use the kernel driver
> 
> that's an information which can be usefull for other users on custom
> boards. Sorry if you don't like to read the word "u-boot" ;-)

so this part is useless

Best Regards,
J.
> 
> Eric

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Re: [PATCH 7/7] samsa5d3xek: update defconfig

[Jean-Christophe PLAGNIOL-VILLARD]

On 15:53 Mon 09 Dec     , Eric B??nard wrote:
> Hi Jean-Christophe,
> 
> Le Mon, 9 Dec 2013 14:31:25 +0100,
> Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> 
> > more comment here
> > On 10:37 Sat 07 Dec     , Eric B??nard wrote:
> > > Signed-off-by: Eric Bénard <eric@eukrea.com>
> > > ---
> > >  arch/arm/configs/sama5d3xek_defconfig | 9 ++++++---
> > >  1 file changed, 6 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/arch/arm/configs/sama5d3xek_defconfig b/arch/arm/configs/sama5d3xek_defconfig
> > > index 970ded5..bd331c3 100644
> > > --- a/arch/arm/configs/sama5d3xek_defconfig
> > > +++ b/arch/arm/configs/sama5d3xek_defconfig
> > > @@ -41,8 +41,7 @@ CONFIG_CMD_UIMAGE=y
> > >  CONFIG_CMD_RESET=y
> > >  CONFIG_CMD_GO=y
> > >  CONFIG_CMD_OFTREE=y
> > > -CONFIG_CMD_MTEST=y
> > > -CONFIG_CMD_MTEST_ALTERNATIVE=y
> > > +CONFIG_CMD_MEMTEST=y
> > why?
> 
> because MTEST became MEMTEST so as you initialy enabled it, I updated
> the defconfig to keep the same functionnality.
> mtest was removed in :
> 47f9da43801d7a345569a35d23cd49eb355a891a
> memtest was added in :
> 842308e29774c577291cae09a8a71ecc3b708b92

so put this in the commit messasge

Best Regards,
J.
> 
> > >  CONFIG_CMD_SPLASH=y
> > >  CONFIG_CMD_TIMEOUT=y
> > >  CONFIG_CMD_PARTITION=y
> > > @@ -65,13 +64,17 @@ CONFIG_I2C_GPIO=y
> > >  CONFIG_MTD=y
> > >  # CONFIG_MTD_OOB_DEVICE is not set
> > >  CONFIG_MTD_M25P80=y
> > > +CONFIG_DRIVER_CFI=y
> > > +# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set
> > > +# CONFIG_DRIVER_CFI_BANK_WIDTH_4 is not set
> > > +CONFIG_CFI_BUFFER_WRITE=y
> > >  CONFIG_NAND=y
> > >  # CONFIG_NAND_ECC_SOFT is not set
> > >  # CONFIG_NAND_ECC_HW_SYNDROME is not set
> > >  # CONFIG_NAND_ECC_HW_NONE is not set
> > >  CONFIG_NAND_ATMEL=y
> > >  CONFIG_NAND_ATMEL_PMECC=y
> > > -CONFIG_UBI=y
> > > +CONFIG_MTD_UBI=y
> 
> same thing here.
> 
> Eric

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Re: [PATCH 7/7] samsa5d3xek: update defconfig

[Alexander Aring]

On Mon, Dec 09, 2013 at 03:53:51PM +0100, Eric Bénard wrote:
> Hi Jean-Christophe,
> 
> Le Mon, 9 Dec 2013 14:31:25 +0100,
> Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> 
> > more comment here
> > On 10:37 Sat 07 Dec     , Eric B??nard wrote:
> > > Signed-off-by: Eric Bénard <eric@eukrea.com>
> > > ---
> > >  arch/arm/configs/sama5d3xek_defconfig | 9 ++++++---
> > >  1 file changed, 6 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/arch/arm/configs/sama5d3xek_defconfig b/arch/arm/configs/sama5d3xek_defconfig
> > > index 970ded5..bd331c3 100644
> > > --- a/arch/arm/configs/sama5d3xek_defconfig
> > > +++ b/arch/arm/configs/sama5d3xek_defconfig
> > > @@ -41,8 +41,7 @@ CONFIG_CMD_UIMAGE=y
> > >  CONFIG_CMD_RESET=y
> > >  CONFIG_CMD_GO=y
> > >  CONFIG_CMD_OFTREE=y
> > > -CONFIG_CMD_MTEST=y
> > > -CONFIG_CMD_MTEST_ALTERNATIVE=y
> > > +CONFIG_CMD_MEMTEST=y
> > why?
> 
> because MTEST became MEMTEST so as you initialy enabled it, I updated
> the defconfig to keep the same functionnality.
> mtest was removed in :
> 47f9da43801d7a345569a35d23cd49eb355a891a
> memtest was added in :
> 842308e29774c577291cae09a8a71ecc3b708b92
> 
oh damn, and I though the it's because the new memtest command is
just a cool command which everybody needs. :-)

- Alex

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Re: [PATCH 5/7] atmel_nand: make chip_delay configurable

[Eric Bénard]

Le Mon, 9 Dec 2013 17:32:52 +0100,
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :

> On 15:54 Mon 09 Dec     , Eric B??nard wrote:
> > Le Mon, 9 Dec 2013 14:30:01 +0100,
> > Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> > 
> > > On 10:36 Sat 07 Dec     , Eric B??nard wrote:
> > > > this is usefull for custom boards with different NAND flashs
> > > > (for informations u-boot defaults chip_delay to 75)
> > > drop this comment on u-boot as in barebox we use the kernel driver
> > 
> > that's an information which can be usefull for other users on custom
> > boards. Sorry if you don't like to read the word "u-boot" ;-)
> 
> so this part is useless
> 
why ?

Eric

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Re: [PATCH 5/7] atmel_nand: make chip_delay configurable

[Eric Bénard]

Le Mon, 9 Dec 2013 17:32:52 +0100,
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :

> On 15:54 Mon 09 Dec     , Eric B??nard wrote:
> > Le Mon, 9 Dec 2013 14:30:01 +0100,
> > Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> > 
> > > On 10:36 Sat 07 Dec     , Eric B??nard wrote:
> > > > this is usefull for custom boards with different NAND flashs
> > > > (for informations u-boot defaults chip_delay to 75)
> > > drop this comment on u-boot as in barebox we use the kernel driver
> > 
> > that's an information which can be usefull for other users on custom
> > boards. Sorry if you don't like to read the word "u-boot" ;-)
> 
> so this part is useless
> 
I think it's useful to tell the default value used by the other
reference bootloader.

Eric

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Re: [PATCH 5/7] atmel_nand: make chip_delay configurable

[Sascha Hauer]

On Mon, Dec 09, 2013 at 06:15:49PM +0100, Eric Bénard wrote:
> Le Mon, 9 Dec 2013 17:32:52 +0100,
> Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> 
> > On 15:54 Mon 09 Dec     , Eric B??nard wrote:
> > > Le Mon, 9 Dec 2013 14:30:01 +0100,
> > > Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> a écrit :
> > > 
> > > > On 10:36 Sat 07 Dec     , Eric B??nard wrote:
> > > > > this is usefull for custom boards with different NAND flashs
> > > > > (for informations u-boot defaults chip_delay to 75)
> > > > drop this comment on u-boot as in barebox we use the kernel driver
> > > 
> > > that's an information which can be usefull for other users on custom
> > > boards. Sorry if you don't like to read the word "u-boot" ;-)
> > 
> > so this part is useless
> > 
> I think it's useful to tell the default value used by the other
> reference bootloader.

I for once have nothing against using the word U-Boot in commit
messages.

Sascha

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Re: [PATCH 2/7] at91: introduce sama5d3's SMC support

[Sascha Hauer]

On Mon, Dec 09, 2013 at 02:27:21PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 10:36 Sat 07 Dec     , Eric B??nard wrote:
> > there is a new register (timings) vs SAM9 and thus a new mapping
> > 
> > Signed-off-by: Eric Bénard <eric@eukrea.com>
> > ---
> >  arch/arm/mach-at91/generic.h                |   7 ++
> >  arch/arm/mach-at91/include/mach/sama5_smc.h | 124 +++++++++++++++++++++
> >  arch/arm/mach-at91/sama5_smc.c              | 161 ++++++++++++++++++++++++++++
> >  3 files changed, 292 insertions(+)
> >  create mode 100644 arch/arm/mach-at91/include/mach/sama5_smc.h
> >  create mode 100644 arch/arm/mach-at91/sama5_smc.c
> 
> nack the sama5 smc share part of the same IP as the sam9 do not duplicate code
> share it

Indeed the code looks very similar. We could use id_table to distinguish
between both.

Sascha

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Re: [PATCH 6/7] sama5d3xek: add NOR CFI support

[Sascha Hauer]

On Mon, Dec 09, 2013 at 02:37:16PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > +
> > +	clk_enable(clk);
> > +
> > +	/* configure chip-select 0 (NOR) */
> > +	sama5_smc_configure(0, 0, &cm_nor_smc_config);
> > +
> > +	add_cfi_flash_device(0, AT91_CHIPSELECT_0, 256 * 1024 * 1024, 0);
> no put the right size or 0 for auto detect not 256MiB

'0' only works because the cfi flash driver completely ignores the
resource size. If 256MiB is the maximum flash size or the size of this
particular chipselect I see nothing wrong in assigning 256MiB to the
device.

Sascha

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Re: [PATCH 6/7] sama5d3xek: add NOR CFI support

[Eric Bénard]

Hi Sascha,

Le Thu, 12 Dec 2013 09:57:45 +0100,
Sascha Hauer <s.hauer@pengutronix.de> a écrit :

> On Mon, Dec 09, 2013 at 02:37:16PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > +
> > > +	clk_enable(clk);
> > > +
> > > +	/* configure chip-select 0 (NOR) */
> > > +	sama5_smc_configure(0, 0, &cm_nor_smc_config);
> > > +
> > > +	add_cfi_flash_device(0, AT91_CHIPSELECT_0, 256 * 1024 * 1024, 0);
> > no put the right size or 0 for auto detect not 256MiB
> 
> '0' only works because the cfi flash driver completely ignores the
> resource size. If 256MiB is the maximum flash size or the size of this
> particular chipselect I see nothing wrong in assigning 256MiB to the
> device.
> 
256MiB is the maximul size this chip select can address

Eric

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Re: [PATCH 2/7] at91: introduce sama5d3's SMC support

[Eric Bénard]

Le Thu, 12 Dec 2013 09:51:21 +0100,
Sascha Hauer <s.hauer@pengutronix.de> a écrit :

> On Mon, Dec 09, 2013 at 02:27:21PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 10:36 Sat 07 Dec     , Eric B??nard wrote:
> > > there is a new register (timings) vs SAM9 and thus a new mapping
> > > 
> > > Signed-off-by: Eric Bénard <eric@eukrea.com>
> > > ---
> > >  arch/arm/mach-at91/generic.h                |   7 ++
> > >  arch/arm/mach-at91/include/mach/sama5_smc.h | 124 +++++++++++++++++++++
> > >  arch/arm/mach-at91/sama5_smc.c              | 161 ++++++++++++++++++++++++++++
> > >  3 files changed, 292 insertions(+)
> > >  create mode 100644 arch/arm/mach-at91/include/mach/sama5_smc.h
> > >  create mode 100644 arch/arm/mach-at91/sama5_smc.c
> > 
> > nack the sama5 smc share part of the same IP as the sam9 do not duplicate code
> > share it
> 
> Indeed the code looks very similar. We could use id_table to distinguish
> between both.
> 
I was expecting this request ;-)
I'll update the patch in the coming days.

Eric
it.

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