[PATCH 0/3] Socfpga: update preloader files - The missing link

[PATCH 0/3] Socfpga: update preloader files - The missing link

[Steffen Trumtrar]

Hi!

This is an addon to the series

	SOCFPGA: update to v13.1 preloader files

The last series was actually missing a rather important update to the
iocsr setup.
The current barebox version produces a (memory?)setup, that leads to
an unstable linux kernel. Namely: page alloc errors, kmemleaks and
NULL pointer dereferences on the Terasic SoCkit. The EBV Socrates didn't
show these errors.

Something in those magic numbers in patch 2/3 seems to fix this,
as these problems haven't been seen as of yet with this new setup.

Regards,
Steffen

Steffen Trumtrar (3):
  ARM: socfpga: sockit: update sdram config
  ARM: socfpga: update iocsr config
  ARM: socfpga: sockit: reconfigure src for sdmmc

 arch/arm/boards/terasic-sockit/pll_config.h   |   2 +-
 arch/arm/boards/terasic-sockit/sdram_config.h |  21 +-
 arch/arm/mach-socfpga/iocsr-config-cyclone5.c | 418 +++++++++++++-------------
 3 files changed, 223 insertions(+), 218 deletions(-)

-- 
1.8.4.3


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[PATCH 1/3] ARM: socfpga: sockit: update sdram config

[Steffen Trumtrar]

This updates/changes the sdram config for the sockit to the quartus v13.1
autogenerated version.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/boards/terasic-sockit/sdram_config.h | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boards/terasic-sockit/sdram_config.h b/arch/arm/boards/terasic-sockit/sdram_config.h
index 3d6f938..2c04b02 100644
--- a/arch/arm/boards/terasic-sockit/sdram_config.h
+++ b/arch/arm/boards/terasic-sockit/sdram_config.h
@@ -1,3 +1,6 @@
+#ifndef __SDRAM_CONFIG_H
+#define __SDRAM_CONFIG_H
+
 #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE			(2)
 #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL			(8)
 #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER		(0)
@@ -58,12 +61,14 @@
 #define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	(0)
 #define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	(0x41041041)
 #define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	(0x410410)
-#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0 (0x80808080)
-#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 (0x80808080)
-#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64 (0x8080)
+#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0 (0x01010101)
+#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 (0x01010101)
+#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64 (0x0101)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ			(0)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE			(1)
+#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_READ_PORT_USED	(0x0)
+#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_WRITE_PORT_USED	(0x0)
+#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_COMMAND_PORT_USED	(0x0)
+#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST			(0x0)
 
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ                    (0)
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE                   (1)
-#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_READ_PORT_USED      (0)
-#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_WRITE_PORT_USED     (0)
-#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_COMMAND_PORT_USED   (0)
+#endif	/*#ifndef__SDRAM_CONFIG_H*/
-- 
1.8.4.3


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[PATCH 2/3] ARM: socfpga: update iocsr config

[Steffen Trumtrar]

Update the IO configuration to the Quartus v13.1 version. This seems to fix a
stability issue under the linux kernel when started with barebox.
As this is undocumented, autogenerated stuff, one can not be sure what it really
does nor if it really fixes the problem or just relocates it.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/mach-socfpga/iocsr-config-cyclone5.c | 418 +++++++++++++-------------
 1 file changed, 209 insertions(+), 209 deletions(-)

diff --git a/arch/arm/mach-socfpga/iocsr-config-cyclone5.c b/arch/arm/mach-socfpga/iocsr-config-cyclone5.c
index 4b44c29..44238b3 100644
--- a/arch/arm/mach-socfpga/iocsr-config-cyclone5.c
+++ b/arch/arm/mach-socfpga/iocsr-config-cyclone5.c
@@ -10,119 +10,119 @@ const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH
 	0xC0000000,
 	0x0000003F,
 	0x00008000,
-	0x00004824,
-	0x01209000,
-	0x82400000,
-	0x00018004,
+	0x00060180,
+	0x18060000,
+	0x18000000,
+	0x00018060,
 	0x00000000,
 	0x00004000,
-	0x00002412,
-	0x00904800,
-	0x41200000,
-	0x80000002,
-	0x00000904,
+	0x000300C0,
+	0x0C030000,
+	0x0C000000,
+	0x00000030,
+	0x0000C030,
 	0x00002000,
-	0x00001209,
-	0x00482400,
-	0x20900000,
-	0x40000001,
-	0x00000482,
+	0x00018060,
+	0x06018000,
+	0x06000000,
+	0x00000018,
+	0x00006018,
 	0x00001000,
 };
 
 const unsigned long iocsr_scan_chain1_table[((CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH / 32) + 1)] = {
-	0x00009048,
-	0x02412000,
-	0x048000C0,
-	0x00000009,
-	0x00002412,
+	0x00100000,
+	0x300C0000,
+	0x300000C0,
+	0x000000C0,
+	0x000300C0,
 	0x00008000,
-	0x00004824,
-	0x01209000,
-	0x82400000,
-	0x00000004,
-	0x00001209,
+	0x00080000,
+	0x20000000,
+	0x00000000,
+	0x00000080,
+	0x00020000,
 	0x00004000,
-	0x00002412,
-	0x00904800,
-	0x41200000,
-	0x80000002,
-	0x00000904,
+	0x000300C0,
+	0x10000000,
+	0x0C000000,
+	0x00000030,
+	0x0000C030,
 	0x00002000,
-	0x06001209,
-	0x00482400,
+	0x06018060,
+	0x06018000,
 	0x01FE0000,
 	0xF8000000,
 	0x00000007,
-	0x80001000,
-	0x00000904,
-	0x00241200,
-	0x90480000,
-	0x20003000,
-	0x00000241,
+	0x00001000,
+	0x0000C030,
+	0x0300C000,
+	0x03000000,
+	0x0000300C,
+	0x0000300C,
 	0x00000800,
 	0x00000000,
 	0x00000000,
-	0x48240000,
-	0x90000000,
-	0x00000120,
+	0x01800000,
+	0x00000006,
+	0x00002000,
 	0x00000400,
 	0x00000000,
-	0x00090480,
+	0x00C03000,
 	0x00000003,
 	0x00000000,
 	0x00000000,
-	0x90000200,
-	0x00600120,
+	0x00000200,
+	0x00601806,
 	0x00000000,
-	0x12090000,
-	0x24000600,
-	0x00000048,
-	0x48000100,
-	0x00300090,
-	0xC0024120,
-	0x09048000,
-	0x12000300,
-	0x000C0024,
+	0x80600000,
+	0x80000601,
+	0x00000601,
+	0x00000100,
+	0x00300C03,
+	0xC0300C00,
+	0xC0300000,
+	0xC0000300,
+	0x000C0300,
 	0x00000080,
 };
 
 const unsigned long iocsr_scan_chain2_table[((CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH / 32) + 1)] = {
-	0x30009048,
+	0x300C0300,
 	0x00000000,
 	0x0FF00000,
 	0x00000000,
-	0x0C002412,
+	0x0C0300C0,
 	0x00008000,
-	0x18004824,
-	0x00000000,
-	0x82400000,
-	0x00018004,
-	0x06001209,
+	0x18060180,
+	0x18060000,
+	0x18000000,
+	0x00018060,
+	0x00018060,
 	0x00004000,
-	0x20002412,
-	0x00904800,
+	0x000300C0,
+	0x0C030000,
 	0x00000030,
-	0x80000000,
-	0x03000904,
+	0x00000000,
+	0x0300C030,
 	0x00002000,
-	0x10001209,
-	0x00482400,
-	0x20900000,
-	0x40010001,
-	0x00000482,
-	0x80001000,
-	0x00000904,
+	0x00018060,
+	0x06018000,
+	0x06000000,
+	0x00000018,
+	0x00006018,
+	0x00001000,
+	0x0000C030,
 	0x00000000,
-	0x90480000,
-	0x20008000,
-	0x00C00241,
+	0x03000000,
+	0x0000000C,
+	0x00C0300C,
 	0x00000800,
 };
 
 const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH / 32) + 1)] = {
-	0x0CC20D80,
-	0x0C3000FF,
+	0x0C420D80,
+	0x882000FF,
 	0x0A804001,
 	0x07900000,
 	0x08020000,
@@ -131,9 +131,9 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x07900000,
 	0x08020000,
 	0x00100000,
-	0x20430000,
-	0x0C003001,
-	0x00C00481,
+	0xC8800000,
+	0x00003001,
+	0x00C00722,
 	0x00000000,
 	0x00000021,
 	0x82000004,
@@ -145,10 +145,10 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x03C80000,
 	0x05400000,
 	0x03C80000,
-	0x90218000,
-	0x86001800,
-	0x00600240,
-	0x80090218,
+	0xE4400000,
+	0x00001800,
+	0x00600391,
+	0x800E4400,
 	0x00000001,
 	0x40000002,
 	0x02A00000,
@@ -159,11 +159,11 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x01E40000,
 	0x02A00000,
 	0x01E40000,
-	0x4810C000,
-	0x43000C00,
-	0x00300120,
-	0xC004810C,
-	0x12043000,
+	0x72200000,
+	0x80000C00,
+	0x003001C8,
+	0xC0072200,
+	0x1C880000,
 	0x20000300,
 	0x00040000,
 	0x50670000,
@@ -172,17 +172,17 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x00001000,
 	0xA0000034,
 	0x0D000001,
-	0x6068030C,
-	0xCF034059,
-	0x1E781A03,
-	0x8030C0D0,
-	0x34059606,
-	0x01A03CF0,
-	0x0C0D0000,
-	0x59606803,
-	0x03CF0340,
+	0xE0680B2C,
+	0x20834038,
+	0x11441A00,
+	0x80B2C0D0,
+	0x34038E06,
+	0x01A00208,
+	0x2C0D0000,
+	0x38E0680B,
+	0x00208340,
 	0xD000001A,
-	0x068030C0,
+	0x0680B2C0,
 	0x10040000,
 	0x00200000,
 	0x10040000,
@@ -192,9 +192,9 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x15000000,
 	0x0F200000,
 	0x01FE0000,
-	0x18000000,
-	0x01800902,
-	0x00240860,
+	0x00000000,
+	0x01800E44,
+	0x00391000,
 	0x007F8006,
 	0x00000000,
 	0x0A800001,
@@ -205,11 +205,11 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x07900000,
 	0x08020000,
 	0x00100000,
-	0x20430000,
-	0x0C003001,
-	0x00C00481,
+	0xC8800000,
+	0x00003001,
+	0x00C00722,
 	0x00000FF0,
-	0x4810C000,
+	0x72200000,
 	0x80000C00,
 	0x05400000,
 	0x02480000,
@@ -219,11 +219,11 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x03C80000,
 	0x05400000,
 	0x03C80000,
-	0x90218000,
-	0x86001800,
-	0x00600240,
-	0x80090218,
-	0x24086001,
+	0x6A1C0000,
+	0x00001800,
+	0x00600391,
+	0x800E4400,
+	0x1A870001,
 	0x40000600,
 	0x02A00040,
 	0x01E40000,
@@ -233,11 +233,11 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x01E40000,
 	0x02A00000,
 	0x01E40000,
-	0x4810C000,
-	0x43000C00,
-	0x00300120,
-	0xC004810C,
-	0x12043000,
+	0x72200000,
+	0x80000C00,
+	0x003001C8,
+	0xC0072200,
+	0x1C880000,
 	0x20000300,
 	0x00040000,
 	0x50670000,
@@ -246,17 +246,17 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x00001000,
 	0xA0000034,
 	0x0D000001,
-	0x6068030C,
-	0xCF034059,
-	0x1E781A03,
-	0x8030C0D0,
-	0x34059606,
+	0xE0680B2C,
+	0x20834038,
+	0x11441A00,
+	0x80B2C0D0,
+	0x34038E06,
 	0x01A00040,
-	0x0C0D0002,
-	0x59606803,
-	0x03CF0340,
-	0xD01E781A,
-	0x068030C0,
+	0x2C0D0002,
+	0x38E0680B,
+	0x00208340,
+	0xD001041A,
+	0x0680B2C0,
 	0x10040000,
 	0x00200000,
 	0x10040000,
@@ -266,25 +266,25 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x15000000,
 	0x0F200000,
 	0x01FE0000,
-	0x18000000,
-	0x01800902,
-	0x00240860,
+	0x00000000,
+	0x01800E44,
+	0x00391000,
 	0x007F8006,
 	0x00000000,
 	0x99300001,
 	0x34343400,
 	0xAA0D4000,
-	0x01C3A810,
+	0x01C3A800,
 	0xAA0D4000,
-	0x01C3A808,
+	0x01C3A800,
 	0xAA0D4000,
-	0x01C3A808,
+	0x01C3A800,
 	0x00040100,
 	0x00000800,
 	0x00000000,
 	0x00001208,
 	0x00482000,
-	0x000001C1,
+	0x01000000,
 	0x00000000,
 	0x00410482,
 	0x0006A000,
@@ -294,19 +294,19 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x0002A000,
 	0x0001E400,
 	0x5506A000,
-	0x00E1D408,
+	0x00E1D400,
 	0x00000000,
-	0x2043090C,
+	0xC880090C,
 	0x00003001,
 	0x90400000,
 	0x00000000,
 	0x2020C243,
 	0x2A835000,
-	0x0070EA04,
+	0x0070EA00,
 	0x2A835000,
-	0x0070EA02,
+	0x0070EA00,
 	0x2A835000,
-	0x0070EA02,
+	0x0070EA00,
 	0x00010040,
 	0x00000200,
 	0x00000000,
@@ -316,23 +316,23 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x80000000,
 	0x00104120,
 	0x00000200,
-	0xAC255F80,
-	0xF1C71C71,
+	0xAC0D5F80,
+	0xFFFFFFFF,
 	0x14F3690D,
 	0x1A041414,
 	0x00D00000,
 	0x18864000,
-	0xC9247A06,
-	0xDBCF23D0,
-	0xF71E791E,
-	0x0350E388,
+	0x49247A06,
+	0xABCF23D7,
+	0xF7DE791E,
+	0x0356E388,
 	0x821A0000,
 	0x0000D000,
-	0x01860680,
-	0xD0C9247A,
-	0x1EDBCF23,
-	0x88F71E79,
-	0x000350E3,
+	0x05960680,
+	0xD749247A,
+	0x1EABCF23,
+	0x88F7DE79,
+	0x000356E3,
 	0x00080200,
 	0x00001000,
 	0x00080200,
@@ -340,7 +340,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x000A8000,
 	0x00075000,
 	0x541A8000,
-	0x03875021,
+	0x03875001,
 	0x10000000,
 	0x00000000,
 	0x0080C000,
@@ -348,11 +348,11 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x00003FC2,
 	0x00820000,
 	0xAA0D4000,
-	0x01C3A810,
+	0x01C3A800,
 	0xAA0D4000,
-	0x01C3A808,
+	0x01C3A800,
 	0xAA0D4000,
-	0x01C3A808,
+	0x01C3A800,
 	0x00040100,
 	0x00000800,
 	0x00000000,
@@ -368,7 +368,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x00020080,
 	0x00000400,
 	0x5506A000,
-	0x00E1D408,
+	0x00E1D400,
 	0x00000000,
 	0x0000090C,
 	0x00000010,
@@ -376,37 +376,37 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x00000000,
 	0x2020C243,
 	0x2A835000,
-	0x0070EA04,
+	0x0070EA00,
 	0x2A835000,
-	0x0070EA02,
+	0x0070EA00,
 	0x2A835000,
-	0x0070EA02,
+	0x0070EA00,
 	0x00015000,
 	0x0000F200,
 	0x00000000,
 	0x00000482,
-	0x86120800,
-	0x00600240,
+	0x00120800,
+	0x00600391,
 	0x80000000,
 	0x00104120,
 	0x00000200,
-	0xAC255F80,
-	0xF1C71C71,
+	0xAC0D5F80,
+	0xFFFFFFFF,
 	0x14F3690D,
 	0x1A041414,
 	0x00D00000,
 	0x18864000,
-	0xC9247A06,
-	0xDBCF23D0,
-	0xF71E791E,
-	0x0350E388,
-	0x821A02CB,
+	0x49247A06,
+	0xABCF23D7,
+	0xF7DE791E,
+	0x0356E388,
+	0x821A01C7,
 	0x0000D000,
 	0x00000680,
-	0xD0C9247A,
-	0x1EDBCF23,
-	0x88F71E79,
-	0x000350E3,
+	0xD749247A,
+	0x1EABCF23,
+	0x88F7DE79,
+	0x000356E3,
 	0x00080200,
 	0x00001000,
 	0x00080200,
@@ -414,7 +414,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x000A8000,
 	0x00075000,
 	0x541A8000,
-	0x03875021,
+	0x03875001,
 	0x10000000,
 	0x00000000,
 	0x0080C000,
@@ -422,11 +422,11 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x04000002,
 	0x00820000,
 	0xAA0D4000,
-	0x01C3A810,
+	0x01C3A800,
 	0xAA0D4000,
-	0x01C3A808,
+	0x01C3A800,
 	0xAA0D4000,
-	0x01C3A808,
+	0x01C3A800,
 	0x00040100,
 	0x00000800,
 	0x00000000,
@@ -442,19 +442,19 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x0002A000,
 	0x0001E400,
 	0x5506A000,
-	0x00E1D408,
+	0x00E1D400,
 	0x00000000,
-	0x0000090C,
-	0x00203000,
+	0xC880090C,
+	0x00003001,
 	0x90400000,
 	0x00000000,
 	0x2020C243,
 	0x2A835000,
-	0x0070EA04,
+	0x0070EA00,
 	0x2A835000,
-	0x0070EA02,
+	0x0070EA00,
 	0x2A835000,
-	0x0070EA02,
+	0x0070EA00,
 	0x00010040,
 	0x00000200,
 	0x00000000,
@@ -464,23 +464,23 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x80000000,
 	0x00104120,
 	0x00000200,
-	0xAC255F80,
-	0xF1C71C71,
+	0xAC0D5F80,
+	0xFFFFFFFF,
 	0x14F3690D,
 	0x1A041414,
 	0x00D00000,
 	0x18864000,
-	0xC9247A06,
-	0xDBCF23D0,
-	0xF71E791E,
-	0x0350E388,
+	0x49247A06,
+	0xABCF23D7,
+	0xF7DE791E,
+	0x0356E388,
 	0x821A0000,
 	0x0000D000,
 	0x00000680,
-	0xD0C9247A,
-	0x1EDBCF23,
-	0x88F71E79,
-	0x000350E3,
+	0xD749247A,
+	0x1EABCF23,
+	0x88F7DE79,
+	0x000356E3,
 	0x00080200,
 	0x00001000,
 	0x00080200,
@@ -488,7 +488,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x000A8000,
 	0x00075000,
 	0x541A8000,
-	0x03875021,
+	0x03875001,
 	0x10000000,
 	0x00000000,
 	0x0080C000,
@@ -496,11 +496,11 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x04000002,
 	0x00820000,
 	0xAA0D4000,
-	0x01C3A810,
+	0x01C3A800,
 	0xAA0D4000,
-	0x01C3A808,
+	0x01C3A800,
 	0xAA0D4000,
-	0x01C3A808,
+	0x01C3A800,
 	0x00040100,
 	0x00000800,
 	0x00000000,
@@ -516,7 +516,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x00020080,
 	0x00000400,
 	0x5506A000,
-	0x00E1D408,
+	0x00E1D400,
 	0x00000000,
 	0x0000090C,
 	0x00000010,
@@ -524,37 +524,37 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x00000000,
 	0x2020C243,
 	0x2A835000,
-	0x0070EA04,
+	0x0070EA00,
 	0x2A835000,
-	0x0070EA02,
+	0x0070EA00,
 	0x2A835000,
-	0x0070EA02,
+	0x0070EA00,
 	0x00010040,
 	0x00000200,
 	0x00000000,
 	0x00000482,
-	0x40120800,
-	0x00000070,
+	0x00120800,
+	0x00400000,
 	0x80000000,
 	0x00104120,
 	0x00000200,
-	0xAC255F80,
-	0xF1C71C71,
+	0xAC0D5F80,
+	0xFFFFFFFF,
 	0x14F1690D,
 	0x1A041414,
 	0x00D00000,
 	0x18864000,
-	0xC9247A06,
-	0xDBCF23D0,
-	0xF71E791E,
-	0x0350E388,
+	0x49247A06,
+	0xABCF23D7,
+	0xF7DE791E,
+	0x0356E388,
 	0x821A0000,
 	0x0000D000,
 	0x00000680,
-	0xD0C9247A,
-	0x1EDBCF23,
-	0x88F71E79,
-	0x000350E3,
+	0xD749247A,
+	0x1EABCF23,
+	0x88F7DE79,
+	0x000356E3,
 	0x00080200,
 	0x00001000,
 	0x00080200,
@@ -562,7 +562,7 @@ const unsigned long iocsr_scan_chain3_table[((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH
 	0x000A8000,
 	0x00075000,
 	0x541A8000,
-	0x03875021,
+	0x03875001,
 	0x10000000,
 	0x00000000,
 	0x0080C000,
-- 
1.8.4.3


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[PATCH 3/3] ARM: socfpga: sockit: reconfigure src for sdmmc

[Steffen Trumtrar]

Update to Quartus v13.1 autogenerated version.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/boards/terasic-sockit/pll_config.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boards/terasic-sockit/pll_config.h b/arch/arm/boards/terasic-sockit/pll_config.h
index 732f241..672ce41 100644
--- a/arch/arm/boards/terasic-sockit/pll_config.h
+++ b/arch/arm/boards/terasic-sockit/pll_config.h
@@ -54,7 +54,7 @@
  * 1 = MAIN_CLK
  * 2 = PERIPH_CLK
  */
-#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC			(1)
+#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC			(2)
 #define CONFIG_HPS_PERPLLGRP_SRC_NAND			(2)
 #define CONFIG_HPS_PERPLLGRP_SRC_QSPI			(1)
 
-- 
1.8.4.3


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Re: [PATCH 0/3] Socfpga: update preloader files - The missing link

[Sascha Hauer]

On Mon, Dec 09, 2013 at 03:10:11PM +0100, Steffen Trumtrar wrote:
> Hi!
> 
> This is an addon to the series
> 
> 	SOCFPGA: update to v13.1 preloader files
> 
> The last series was actually missing a rather important update to the
> iocsr setup.
> The current barebox version produces a (memory?)setup, that leads to
> an unstable linux kernel. Namely: page alloc errors, kmemleaks and
> NULL pointer dereferences on the Terasic SoCkit. The EBV Socrates didn't
> show these errors.
> 
> Something in those magic numbers in patch 2/3 seems to fix this,
> as these problems haven't been seen as of yet with this new setup.
> 
> Regards,
> Steffen
> 
> Steffen Trumtrar (3):
>   ARM: socfpga: sockit: update sdram config
>   ARM: socfpga: update iocsr config
>   ARM: socfpga: sockit: reconfigure src for sdmmc

Applied, thanks

Sascha

> 
>  arch/arm/boards/terasic-sockit/pll_config.h   |   2 +-
>  arch/arm/boards/terasic-sockit/sdram_config.h |  21 +-
>  arch/arm/mach-socfpga/iocsr-config-cyclone5.c | 418 +++++++++++++-------------
>  3 files changed, 223 insertions(+), 218 deletions(-)
> 
> -- 
> 1.8.4.3
> 
> 
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

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