* [PATCH 1/4] spi: imx5: allow CSPI to work @ 2014-02-06 15:37 Lucas Stach 2014-02-06 15:37 ` [PATCH 2/4] spi: imx: correctly set GPIO chip selects on CSPI Lucas Stach ` (3 more replies) 0 siblings, 4 replies; 6+ messages in thread From: Lucas Stach @ 2014-02-06 15:37 UTC (permalink / raw) To: barebox i.MX5 SoCs still have one old i.MX35-style SPI controller. Allow this one to work side by side with the new ECSPI controllers. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- drivers/spi/Kconfig | 2 +- drivers/spi/imx_spi.c | 13 +++++++++++++ 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 422693ccd5fe..b9f28da7983b 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -25,7 +25,7 @@ config DRIVER_SPI_IMX_0_0 config DRIVER_SPI_IMX_0_7 bool - depends on ARCH_IMX25 || ARCH_IMX35 + depends on ARCH_IMX25 || ARCH_IMX35 || ARCH_IMX51 || ARCH_IMX53 default y config DRIVER_SPI_IMX_2_3 diff --git a/drivers/spi/imx_spi.c b/drivers/spi/imx_spi.c index c0c2ed7c49df..e43712e118b3 100644 --- a/drivers/spi/imx_spi.c +++ b/drivers/spi/imx_spi.c @@ -564,6 +564,10 @@ static int imx_spi_probe(struct device_d *dev) if (cpu_is_mx51() || cpu_is_mx53() || cpu_is_mx6()) version = SPI_IMX_VER_2_3; #endif + /* oftree knows best, so use it if it's there */ + if (dev->of_id_entry) + version = dev->of_id_entry->data; + imx->chipselect = spi_imx_devtype_data[version].chipselect; imx->xchg_single = spi_imx_devtype_data[version].xchg_single; imx->init = spi_imx_devtype_data[version].init; @@ -584,10 +588,19 @@ err_free: static __maybe_unused struct of_device_id imx_spi_dt_ids[] = { { .compatible = "fsl,imx27-cspi", +#ifdef CONFIG_DRIVER_SPI_IMX_0_0 + .data = SPI_IMX_VER_0_0, +#endif }, { .compatible = "fsl,imx35-cspi", +#ifdef CONFIG_DRIVER_SPI_IMX_0_7 + .data = SPI_IMX_VER_0_7, +#endif }, { .compatible = "fsl,imx51-ecspi", +#ifdef CONFIG_DRIVER_SPI_IMX_2_3 + .data = SPI_IMX_VER_2_3, +#endif }, { /* sentinel */ } -- 1.8.5.3 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/4] spi: imx: correctly set GPIO chip selects on CSPI 2014-02-06 15:37 [PATCH 1/4] spi: imx5: allow CSPI to work Lucas Stach @ 2014-02-06 15:37 ` Lucas Stach 2014-02-06 15:37 ` [PATCH 3/4] spi: m25p80: sync up device list with linux 3.13 Lucas Stach ` (2 subsequent siblings) 3 siblings, 0 replies; 6+ messages in thread From: Lucas Stach @ 2014-02-06 15:37 UTC (permalink / raw) To: barebox Do it the same way as on the new ECSPI. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- drivers/spi/imx_spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/imx_spi.c b/drivers/spi/imx_spi.c index e43712e118b3..80029ca66056 100644 --- a/drivers/spi/imx_spi.c +++ b/drivers/spi/imx_spi.c @@ -189,7 +189,7 @@ static void cspi_0_0_chipselect(struct spi_device *spi, int is_active) if (!is_active) { if (gpio >= 0) - gpio_set_value(gpio, !cs); + gpio_direction_output(gpio, !cs); return; } @@ -277,7 +277,7 @@ static void cspi_0_7_chipselect(struct spi_device *spi, int is_active) if (!is_active) { if (gpio >= 0) - gpio_set_value(gpio, !cs); + gpio_direction_output(gpio, !cs); return; } -- 1.8.5.3 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 3/4] spi: m25p80: sync up device list with linux 3.13 2014-02-06 15:37 [PATCH 1/4] spi: imx5: allow CSPI to work Lucas Stach 2014-02-06 15:37 ` [PATCH 2/4] spi: imx: correctly set GPIO chip selects on CSPI Lucas Stach @ 2014-02-06 15:37 ` Lucas Stach 2014-02-06 15:37 ` [PATCH 4/4] spi: m25p80: detect non-jedec chips by using DT compatible Lucas Stach 2014-02-07 7:23 ` [PATCH 1/4] spi: imx5: allow CSPI to work Sascha Hauer 3 siblings, 0 replies; 6+ messages in thread From: Lucas Stach @ 2014-02-06 15:37 UTC (permalink / raw) To: barebox Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- drivers/mtd/devices/m25p80.c | 56 ++++++++++++++++++++++++++++++-------------- 1 file changed, 38 insertions(+), 18 deletions(-) diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 959401138d57..2275a232c4f9 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -593,6 +593,9 @@ struct flash_info { u16 flags; #define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */ #define M25P_NO_ERASE 0x02 /* No erase command needed */ +#define SST_WRITE 0x04 /* use SST byte programming */ +#define M25P_NO_FR 0x08 /* Can't do fastread */ +#define SECT_4K_PMC 0x10 /* OPCODE_BE_4K_PMC works uniformly */ }; #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \ @@ -605,13 +608,13 @@ struct flash_info { .flags = (_flags), \ }) -#define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width) \ +#define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width, _flags) \ ((unsigned long)&(struct flash_info) { \ .sector_size = (_sector_size), \ .n_sectors = (_n_sectors), \ .page_size = (_page_size), \ .addr_width = (_addr_width), \ - .flags = M25P_NO_ERASE, \ + .flags = _flags, \ }) /* NOTE: double check command sets and memory organization when you add @@ -640,15 +643,20 @@ static const struct spi_device_id m25p_ids[] = { { "en25q32b", INFO(0x1c3016, 0, 64 * 1024, 64, 0) }, { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) }, { "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) }, + { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) }, /* Everspin */ - { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2) }, + { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, M25P_NO_ERASE | M25P_NO_FR) }, + { "mr25h10", CAT25_INFO(128 * 1024, 1, 256, 3, M25P_NO_ERASE | M25P_NO_FR) }, + + /* GigaDevice */ + { "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) }, + { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) }, /* Intel/Numonyx -- xxxs33b */ { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) }, { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) }, { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) }, - { "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128, 0) }, /* Macronix */ { "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4, SECT_4K) }, @@ -661,11 +669,19 @@ static const struct spi_device_id m25p_ids[] = { { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) }, { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, + { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, 0) }, /* Micron */ - { "n25q128", INFO(0x20ba18, 0, 64 * 1024, 256, 0) }, + { "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128, 0) }, + { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, 0) }, + { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, 0) }, { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) }, + /* PMC */ + { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) }, + { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SECT_4K_PMC) }, + { "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024, 64, SECT_4K) }, + /* Spansion -- single (large) sector size only, at least * for the chips listed here (without boot sectors). */ @@ -688,14 +704,15 @@ static const struct spi_device_id m25p_ids[] = { { "s25fl064k", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, /* SST -- large erase sizes are "overlays", "sectors" are 4K */ - { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8, SECT_4K) }, - { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K) }, - { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K) }, - { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K) }, - { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, SECT_4K) }, - { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K) }, - { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K) }, - { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K) }, + { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8, SECT_4K | SST_WRITE) }, + { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) }, + { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K | SST_WRITE) }, + { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K | SST_WRITE) }, + { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128, SECT_4K) }, + { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, SECT_4K | SST_WRITE) }, + { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K | SST_WRITE) }, + { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K | SST_WRITE) }, + { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K | SST_WRITE) }, /* ST Microelectronics -- newer production may have feature updates */ { "m25p05", INFO(0x202010, 0, 32 * 1024, 2, 0) }, @@ -743,15 +760,18 @@ static const struct spi_device_id m25p_ids[] = { { "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64, SECT_4K) }, { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) }, { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, + { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) }, { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) }, { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) }, + { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) }, + { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K) }, /* Catalyst / On Semiconductor -- non-JEDEC */ - { "cat25c11", CAT25_INFO( 16, 8, 16, 1) }, - { "cat25c03", CAT25_INFO( 32, 8, 16, 2) }, - { "cat25c09", CAT25_INFO( 128, 8, 32, 2) }, - { "cat25c17", CAT25_INFO( 256, 8, 32, 2) }, - { "cat25128", CAT25_INFO(2048, 8, 64, 2) }, + { "cat25c11", CAT25_INFO( 16, 8, 16, 1, M25P_NO_ERASE | M25P_NO_FR) }, + { "cat25c03", CAT25_INFO( 32, 8, 16, 2, M25P_NO_ERASE | M25P_NO_FR) }, + { "cat25c09", CAT25_INFO( 128, 8, 32, 2, M25P_NO_ERASE | M25P_NO_FR) }, + { "cat25c17", CAT25_INFO( 256, 8, 32, 2, M25P_NO_ERASE | M25P_NO_FR) }, + { "cat25128", CAT25_INFO(2048, 8, 64, 2, M25P_NO_ERASE | M25P_NO_FR) }, { }, }; -- 1.8.5.3 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 4/4] spi: m25p80: detect non-jedec chips by using DT compatible 2014-02-06 15:37 [PATCH 1/4] spi: imx5: allow CSPI to work Lucas Stach 2014-02-06 15:37 ` [PATCH 2/4] spi: imx: correctly set GPIO chip selects on CSPI Lucas Stach 2014-02-06 15:37 ` [PATCH 3/4] spi: m25p80: sync up device list with linux 3.13 Lucas Stach @ 2014-02-06 15:37 ` Lucas Stach 2014-02-07 7:23 ` [PATCH 1/4] spi: imx5: allow CSPI to work Sascha Hauer 3 siblings, 0 replies; 6+ messages in thread From: Lucas Stach @ 2014-02-06 15:37 UTC (permalink / raw) To: barebox Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- drivers/mtd/devices/m25p80.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 2275a232c4f9..8a5ac494831f 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -29,6 +29,9 @@ #include <linux/mtd/cfi.h> #include <linux/mtd/mtd.h> +/* driver data flags */ +#define FLAG_PROBE_DT 0x01 + /* Flash opcodes. */ #define OPCODE_WREN 0x06 /* Write enable */ #define OPCODE_RDSR 0x05 /* Read status register */ @@ -859,6 +862,24 @@ static int m25p_probe(struct device_d *dev) dev_warn(&spi->dev, "unrecognized id %s\n", data->type); } + /* + * Some non-jedec conformant chips can only be recognized by their + * DT compatible string. + */ + if (dev->of_id_entry && dev->of_id_entry->data == FLAG_PROBE_DT) { + for (i = 0; i < ARRAY_SIZE(m25p_ids) - 1; i++) { + if (strcmp(dev->of_id_entry->compatible, m25p_ids[i].name)) + continue; + + id = &m25p_ids[i]; + info = (void *)id->driver_data; + + if (!info->jedec_id) + do_jdec_probe = 0; + break; + } + } + if (do_jdec_probe) { const struct spi_device_id *jid; @@ -981,6 +1002,10 @@ static __maybe_unused struct of_device_id m25p80_dt_ids[] = { { .compatible = "m25p80", }, { + .compatible = "mr25h10", .data = FLAG_PROBE_DT, + }, { + .compatible = "mr25h256", .data = FLAG_PROBE_DT, + }, { /* sentinel */ } }; -- 1.8.5.3 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/4] spi: imx5: allow CSPI to work 2014-02-06 15:37 [PATCH 1/4] spi: imx5: allow CSPI to work Lucas Stach ` (2 preceding siblings ...) 2014-02-06 15:37 ` [PATCH 4/4] spi: m25p80: detect non-jedec chips by using DT compatible Lucas Stach @ 2014-02-07 7:23 ` Sascha Hauer 2014-02-07 9:50 ` Lucas Stach 3 siblings, 1 reply; 6+ messages in thread From: Sascha Hauer @ 2014-02-07 7:23 UTC (permalink / raw) To: Lucas Stach; +Cc: barebox On Thu, Feb 06, 2014 at 04:37:07PM +0100, Lucas Stach wrote: > i.MX5 SoCs still have one old i.MX35-style SPI > controller. Allow this one to work side by side > with the new ECSPI controllers. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > --- > drivers/spi/Kconfig | 2 +- > drivers/spi/imx_spi.c | 13 +++++++++++++ > 2 files changed, 14 insertions(+), 1 deletion(-) > > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig > index 422693ccd5fe..b9f28da7983b 100644 > --- a/drivers/spi/Kconfig > +++ b/drivers/spi/Kconfig > @@ -25,7 +25,7 @@ config DRIVER_SPI_IMX_0_0 > > config DRIVER_SPI_IMX_0_7 > bool > - depends on ARCH_IMX25 || ARCH_IMX35 > + depends on ARCH_IMX25 || ARCH_IMX35 || ARCH_IMX51 || ARCH_IMX53 > default y > > config DRIVER_SPI_IMX_2_3 > diff --git a/drivers/spi/imx_spi.c b/drivers/spi/imx_spi.c > index c0c2ed7c49df..e43712e118b3 100644 > --- a/drivers/spi/imx_spi.c > +++ b/drivers/spi/imx_spi.c > @@ -564,6 +564,10 @@ static int imx_spi_probe(struct device_d *dev) > if (cpu_is_mx51() || cpu_is_mx53() || cpu_is_mx6()) > version = SPI_IMX_VER_2_3; > #endif > + /* oftree knows best, so use it if it's there */ > + if (dev->of_id_entry) > + version = dev->of_id_entry->data; > + > imx->chipselect = spi_imx_devtype_data[version].chipselect; > imx->xchg_single = spi_imx_devtype_data[version].xchg_single; > imx->init = spi_imx_devtype_data[version].init; > @@ -584,10 +588,19 @@ err_free: > static __maybe_unused struct of_device_id imx_spi_dt_ids[] = { > { > .compatible = "fsl,imx27-cspi", > +#ifdef CONFIG_DRIVER_SPI_IMX_0_0 > + .data = SPI_IMX_VER_0_0, > +#endif > }, { > .compatible = "fsl,imx35-cspi", > +#ifdef CONFIG_DRIVER_SPI_IMX_0_7 > + .data = SPI_IMX_VER_0_7, > +#endif > }, { > .compatible = "fsl,imx51-ecspi", > +#ifdef CONFIG_DRIVER_SPI_IMX_2_3 > + .data = SPI_IMX_VER_2_3, > +#endif Are the ifdefs needed? Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/4] spi: imx5: allow CSPI to work 2014-02-07 7:23 ` [PATCH 1/4] spi: imx5: allow CSPI to work Sascha Hauer @ 2014-02-07 9:50 ` Lucas Stach 0 siblings, 0 replies; 6+ messages in thread From: Lucas Stach @ 2014-02-07 9:50 UTC (permalink / raw) To: Sascha Hauer; +Cc: barebox Am Freitag, den 07.02.2014, 08:23 +0100 schrieb Sascha Hauer: > On Thu, Feb 06, 2014 at 04:37:07PM +0100, Lucas Stach wrote: > > i.MX5 SoCs still have one old i.MX35-style SPI > > controller. Allow this one to work side by side > > with the new ECSPI controllers. > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > --- > > drivers/spi/Kconfig | 2 +- > > drivers/spi/imx_spi.c | 13 +++++++++++++ > > 2 files changed, 14 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig > > index 422693ccd5fe..b9f28da7983b 100644 > > --- a/drivers/spi/Kconfig > > +++ b/drivers/spi/Kconfig > > @@ -25,7 +25,7 @@ config DRIVER_SPI_IMX_0_0 > > > > config DRIVER_SPI_IMX_0_7 > > bool > > - depends on ARCH_IMX25 || ARCH_IMX35 > > + depends on ARCH_IMX25 || ARCH_IMX35 || ARCH_IMX51 || ARCH_IMX53 > > default y > > > > config DRIVER_SPI_IMX_2_3 > > diff --git a/drivers/spi/imx_spi.c b/drivers/spi/imx_spi.c > > index c0c2ed7c49df..e43712e118b3 100644 > > --- a/drivers/spi/imx_spi.c > > +++ b/drivers/spi/imx_spi.c > > @@ -564,6 +564,10 @@ static int imx_spi_probe(struct device_d *dev) > > if (cpu_is_mx51() || cpu_is_mx53() || cpu_is_mx6()) > > version = SPI_IMX_VER_2_3; > > #endif > > + /* oftree knows best, so use it if it's there */ > > + if (dev->of_id_entry) > > + version = dev->of_id_entry->data; > > + > > imx->chipselect = spi_imx_devtype_data[version].chipselect; > > imx->xchg_single = spi_imx_devtype_data[version].xchg_single; > > imx->init = spi_imx_devtype_data[version].init; > > @@ -584,10 +588,19 @@ err_free: > > static __maybe_unused struct of_device_id imx_spi_dt_ids[] = { > > { > > .compatible = "fsl,imx27-cspi", > > +#ifdef CONFIG_DRIVER_SPI_IMX_0_0 > > + .data = SPI_IMX_VER_0_0, > > +#endif > > }, { > > .compatible = "fsl,imx35-cspi", > > +#ifdef CONFIG_DRIVER_SPI_IMX_0_7 > > + .data = SPI_IMX_VER_0_7, > > +#endif > > }, { > > .compatible = "fsl,imx51-ecspi", > > +#ifdef CONFIG_DRIVER_SPI_IMX_2_3 > > + .data = SPI_IMX_VER_2_3, > > +#endif > > Are the ifdefs needed? As long as we want to keep them in the rest of the driver, yes. If we are willing to trade a little code size we could just remove them from the whole driver. Regards, Lucas -- Pengutronix e.K. | Lucas Stach | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-5076 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2014-02-07 9:51 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2014-02-06 15:37 [PATCH 1/4] spi: imx5: allow CSPI to work Lucas Stach 2014-02-06 15:37 ` [PATCH 2/4] spi: imx: correctly set GPIO chip selects on CSPI Lucas Stach 2014-02-06 15:37 ` [PATCH 3/4] spi: m25p80: sync up device list with linux 3.13 Lucas Stach 2014-02-06 15:37 ` [PATCH 4/4] spi: m25p80: detect non-jedec chips by using DT compatible Lucas Stach 2014-02-07 7:23 ` [PATCH 1/4] spi: imx5: allow CSPI to work Sascha Hauer 2014-02-07 9:50 ` Lucas Stach
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