[PATCH v2 1/2] ARM: add minimal support for the Freescale Quad UDOO Board

* [PATCH v2 1/2] ARM: add minimal support for the Freescale Quad UDOO Board
@ 2014-02-17 22:04 Raphaël POGGI
  2014-02-17 22:04 ` [PATCH 2/2] ARM: Rework device tree of UDOO Board to be more flexible Raphaël POGGI
  2014-02-19 10:58 ` [PATCH v2 1/2] ARM: add minimal support for the Freescale Quad UDOO Board Sascha Hauer
  0 siblings, 2 replies; 3+ messages in thread
From: Raphaël POGGI @ 2014-02-17 22:04 UTC (permalink / raw)
  To: barebox; +Cc: Raphaël POGGI

Adding minimal support for the UDOO board.

For more information about the board: http://www.udoo.org/

Signed-off-by: Raphael Poggi <poggi.raph@gmail.com>
---
 arch/arm/boards/Makefile                          |   1 +
 arch/arm/boards/udoo/Makefile                     |   3 +
 arch/arm/boards/udoo/board.c                      | 204 ++++++++++++++++++++++
 arch/arm/boards/udoo/env/config-board             |   6 +
 arch/arm/boards/udoo/flash-header-mx6-udoo.imxcfg | 104 +++++++++++
 arch/arm/boards/udoo/lowlevel.c                   |  17 ++
 arch/arm/configs/imx_v7_defconfig                 |   1 +
 arch/arm/dts/Makefile                             |   4 +-
 arch/arm/dts/imx6q-udoo.dts                       |  22 +++
 arch/arm/dts/imx6qdl-udoo.dtsi                    | 111 ++++++++++++
 arch/arm/mach-imx/Kconfig                         |   5 +
 images/Makefile.imx                               |   5 +
 12 files changed, 482 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boards/udoo/Makefile
 create mode 100644 arch/arm/boards/udoo/board.c
 create mode 100644 arch/arm/boards/udoo/env/config-board
 create mode 100644 arch/arm/boards/udoo/flash-header-mx6-udoo.imxcfg
 create mode 100644 arch/arm/boards/udoo/lowlevel.c
 create mode 100644 arch/arm/dts/imx6q-udoo.dts
 create mode 100644 arch/arm/dts/imx6qdl-udoo.dtsi

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index befddd0..a45adee 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_MACH_TX25)				+= karo-tx25/
 obj-$(CONFIG_MACH_TX28)				+= karo-tx28/
 obj-$(CONFIG_MACH_TX51)				+= karo-tx51/
 obj-$(CONFIG_MACH_TX53)				+= karo-tx53/
+obj-$(CONFIG_MACH_UDOO)             += udoo/
 obj-$(CONFIG_MACH_USB_A9260)			+= usb-a926x/
 obj-$(CONFIG_MACH_USB_A9263)			+= usb-a926x/
 obj-$(CONFIG_MACH_USB_A9G20)			+= usb-a926x/
diff --git a/arch/arm/boards/udoo/Makefile b/arch/arm/boards/udoo/Makefile
new file mode 100644
index 0000000..ae17789
--- /dev/null
+++ b/arch/arm/boards/udoo/Makefile
@@ -0,0 +1,3 @@
+obj-y += board.o flash-header-mx6-udoo.dcd.o
+extra-y += flash-header-mx6-udoo.dcd.S flash-header-mx6-udoo.dcd
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/udoo/board.c b/arch/arm/boards/udoo/board.c
new file mode 100644
index 0000000..5853f36
--- /dev/null
+++ b/arch/arm/boards/udoo/board.c
@@ -0,0 +1,204 @@
+/*
+ * Copyright (C) 2014 Raphaël Poggi
+ * Copyright (C) 2012 Steffen Trumtrar, Pengutronix
+ *
+ * based on arch/arm/boards/freescale-mx6-arm2/board.c
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <environment.h>
+#include <mach/imx6-regs.h>
+#include <fec.h>
+#include <gpio.h>
+#include <mach/bbu.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <partition.h>
+#include <linux/phy.h>
+#include <asm/io.h>
+#include <asm/mmu.h>
+#include <mach/generic.h>
+#include <sizes.h>
+#include <net.h>
+#include <linux/micrel_phy.h>
+#include <mach/imx6.h>
+#include <mach/devices-imx6.h>
+#include <mach/iomux-mx6.h>
+#include <spi/spi.h>
+#include <mach/spi.h>
+#include <mach/usb.h>
+
+static iomux_v3_cfg_t udoo_enet_gpio_pads_1[] = {
+	MX6Q_PAD_ENET_MDIO__ENET_MDIO				| MUX_PAD_CTRL(MX6Q_ENET_PAD_CTRL),
+	MX6Q_PAD_ENET_MDC__ENET_MDC					| MUX_PAD_CTRL(MX6Q_ENET_PAD_CTRL),
+	MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC			| MUX_PAD_CTRL(MX6Q_ENET_PAD_CTRL),
+	MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0			| MUX_PAD_CTRL(MX6Q_ENET_PAD_CTRL),
+	MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1			| MUX_PAD_CTRL(MX6Q_ENET_PAD_CTRL),
+	MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2			| MUX_PAD_CTRL(MX6Q_ENET_PAD_CTRL),
+	MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3			| MUX_PAD_CTRL(MX6Q_ENET_PAD_CTRL),
+	MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL	| MUX_PAD_CTRL(MX6Q_ENET_PAD_CTRL),
+	MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK			| MUX_PAD_CTRL(MX6Q_ENET_PAD_CTRL),
+	MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC			| MUX_PAD_CTRL(MX6Q_ENET_PAD_CTRL),
+	/* RGMII reset */
+	/* alimentazione ethernet*/
+	MX6Q_PAD_EIM_EB3__GPIO_2_31     | MUX_PAD_CTRL(NO_PAD_CTRL),
+	/* pin 32 - 1 - (MODE0) all */
+	MX6Q_PAD_RGMII_RD0__GPIO_6_25   | MUX_PAD_CTRL(NO_PAD_CTRL),
+	/* pin 31 - 1 - (MODE1) all */
+	MX6Q_PAD_RGMII_RD1__GPIO_6_27   | MUX_PAD_CTRL(NO_PAD_CTRL),
+	/* pin 28 - 1 - (MODE2) all */
+	MX6Q_PAD_RGMII_RD2__GPIO_6_28   | MUX_PAD_CTRL(NO_PAD_CTRL),
+	/* pin 27 - 1 - (MODE3) all */
+	MX6Q_PAD_RGMII_RD3__GPIO_6_29   | MUX_PAD_CTRL(NO_PAD_CTRL),
+	/* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */
+};
+
+static iomux_v3_cfg_t udoo_enet_gpio_pads_2[] = {
+	/* Ethernet */
+	MX6Q_PAD_RGMII_RXC__GPIO_6_30,          /* PHYAD */
+	MX6Q_PAD_RGMII_RD0__GPIO_6_25,          /* MODE0 */
+	MX6Q_PAD_RGMII_RD1__GPIO_6_27,          /* MODE1 */
+	MX6Q_PAD_RGMII_RD2__GPIO_6_28,          /* MODE2 */
+	MX6Q_PAD_RGMII_RD3__GPIO_6_29,          /* MODE3 */
+	MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24,
+};
+
+static int ksz9021rn_phy_fixup(struct phy_device *dev)
+{
+
+	phy_write(dev, 0x09, 0x1c00);
+	phy_write(dev, 0x4, 0x0000);
+	phy_write(dev, 0x5, 0x0000);
+	phy_write(dev, 0x6, 0x0000);
+	phy_write(dev, 0x8, 0x03ff);
+
+	/* do same as linux kernel */
+	/* min rx data delay */
+	phy_write(dev, 0x0b, 0x8105);
+	phy_write(dev, 0x0c, 0x0000);
+
+	/* max rx/tx clock delay, min rx/tx control delay */
+	phy_write(dev, 0x0b, 0x8104);
+	phy_write(dev, 0x0c, 0xf0f0);
+	phy_write(dev, 0x0b, 0x104);
+
+return 0;
+}
+
+static int udoo_ksz9021rn_setup(void)
+{
+	mxc_iomux_v3_setup_multiple_pads(udoo_enet_gpio_pads_1,
+				  ARRAY_SIZE(udoo_enet_gpio_pads_1));
+
+	gpio_direction_output(IMX_GPIO_NR(2, 31) , 1); /* Power on enet */
+
+	/* MODE strap-in pins: advertise all capabilities */
+	gpio_direction_output(185, 1); /* GPIO 6-25 */
+	gpio_direction_output(187, 1); /* GPIO 6-27 */
+	gpio_direction_output(188, 1); /* GPIO 6-28*/
+	gpio_direction_output(189, 1); /* GPIO 6-29 */
+
+	mdelay(10);
+
+	/* Enable 125 MHz clock output */
+	gpio_direction_output(184, 1); /* GPIO 6-24 */
+
+	mdelay(100);
+
+	gpio_free(IMX_GPIO_NR(6, 24));
+	gpio_free(IMX_GPIO_NR(6, 25));
+	gpio_free(IMX_GPIO_NR(6, 27));
+	gpio_free(IMX_GPIO_NR(6, 28));
+	gpio_free(IMX_GPIO_NR(6, 29));
+
+	mxc_iomux_v3_setup_multiple_pads(udoo_enet_gpio_pads_2, ARRAY_SIZE(udoo_enet_gpio_pads_2));
+
+	return 0;
+}
+/*
+ * Do this before the fec initializes but after our
+ * gpios are available.
+ */
+fs_initcall(udoo_ksz9021rn_setup);
+
+static void udoo_ehci_init(void)
+{
+	/* hub reset */
+	gpio_direction_output(204, 0);
+	udelay(2000);
+	gpio_set_value(204, 1);
+}
+
+static iomux_v3_cfg_t const wdog_pads[] = {
+	MX6Q_PAD_EIM_A24__GPIO_5_4 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6Q_PAD_EIM_D19__EPIT1_EPITO,
+};
+
+#define WDT_EN      IMX_GPIO_NR(5, 4)
+#define WDT_TRG     IMX_GPIO_NR(3, 19)
+static void setup_iomux_wdog(void)
+{
+	mxc_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
+	gpio_direction_output(WDT_TRG, 0);
+	gpio_direction_output(WDT_EN, 1);
+	gpio_direction_input(WDT_TRG);
+}
+
+static void udoo_epit_init(void)
+{
+
+	writel(0x0000000, 0x20D0000);
+	writel(0x142000F, 0x20D0000);
+	writel(0x10000, 0x20D0008);
+	writel(0x0, 0x20D000C);
+}
+
+static int udoo_devices_init(void)
+{
+	if (!of_machine_is_compatible("fsl,imx6q-udoo"))
+		   return 0;
+
+	setup_iomux_wdog();
+	udoo_ehci_init();
+	udoo_epit_init();
+
+	armlinux_set_bootparams((void *)0x10000100);
+
+	return 0;
+}
+device_initcall(udoo_devices_init);
+
+static int udoo_coredevices_init(void)
+{
+	if (!of_machine_is_compatible("fsl,imx6q-udoo"))
+		   return 0;
+
+	phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
+									  ksz9021rn_phy_fixup);
+	return 0;
+}
+coredevice_initcall(udoo_coredevices_init);
+
+static int udoo_postcore_init(void)
+{
+	if (!of_machine_is_compatible("fsl,imx6q-udoo"))
+		   return 0;
+
+	imx6_init_lowlevel();
+
+	barebox_set_hostname("udoo");
+
+	return 0;
+}
+postcore_initcall(udoo_postcore_init);
diff --git a/arch/arm/boards/udoo/env/config-board b/arch/arm/boards/udoo/env/config-board
new file mode 100644
index 0000000..4cabac6
--- /dev/null
+++ b/arch/arm/boards/udoo/env/config-board
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+# board defaults, do not change in running system. Change /env/config
+# instead
+
+global.linux.bootargs.base="console=ttymxc1,115200"
diff --git a/arch/arm/boards/udoo/flash-header-mx6-udoo.imxcfg b/arch/arm/boards/udoo/flash-header-mx6-udoo.imxcfg
new file mode 100644
index 0000000..b142f59
--- /dev/null
+++ b/arch/arm/boards/udoo/flash-header-mx6-udoo.imxcfg
@@ -0,0 +1,104 @@
+soc imx6
+loadaddr 0x20000000
+dcdofs 0x400
+
+
+/* MX6_IOM_DRAM_SDQS0 -> MX6_IOM_DRAM_SDQS7 */
+wm 32 0x020e05a8 0x00000030
+wm 32 0x020e05b0 0x00000030
+wm 32 0x020e0524 0x00000030
+wm 32 0x020e051c 0x00000030
+wm 32 0x020e0518 0x00000030
+wm 32 0x020e050c 0x00000030
+wm 32 0x020e05b8 0x00000030
+wm 32 0x020e05c0 0x00000030
+/********************************************/
+
+/* MX6_IOM_DRAM_DQM0 -> MX6_IOM_DRAM_DQM7 */
+wm 32 0x020e05ac 0x00020030
+wm 32 0x020e05b4 0x00020030
+wm 32 0x020e0528 0x00020030
+wm 32 0x020e0520 0x00020030
+wm 32 0x020e0514 0x00020030
+wm 32 0x020e0510 0x00020030
+wm 32 0x020e05bc 0x00020030
+wm 32 0x020e05c4 0x00020030
+/******************************************/
+
+wm 32 0x020e056c 0x00020030 /* MX6_IOM_DRAM_CAS */
+wm 32 0x020e0578 0x00020030 /* MX6_IOM_DRAM_RAS */
+wm 32 0x020e0588 0x00020030 /* MX6_IOM_DRAM_SDCLK_0 */
+wm 32 0x020e0594 0x00020030    /* MX6_IOM_DRAM_SDCLK_1 */
+wm 32 0x020e057c 0x00020030 /* MX6_IOM_DRAM_RESET */
+wm 32 0x020e0590 0x00003000
+wm 32 0x020e0598 0x00003000
+wm 32 0x020e058c 0x00000000
+wm 32 0x020e059c 0x00003030
+wm 32 0x020e05a0 0x00003030
+
+/* MX6_IOM_GRP_B0DS -> MX6_IOM_GRP_B7DS */
+wm 32 0x020e0784 0x00000030
+wm 32 0x020e0788 0x00000030
+wm 32 0x020e0794 0x00000030
+wm 32 0x020e079c 0x00000030
+wm 32 0x020e07a0 0x00000030
+wm 32 0x020e07a4 0x00000030
+wm 32 0x020e07a8 0x00000030
+wm 32 0x020e0748 0x00000030
+/***************************************/
+
+wm 32 0x020e074c 0x00000030 /* MX6_IOM_GRP_ADDDS */
+wm 32 0x020e0750 0x00020000
+wm 32 0x020e0758 0x00000000
+wm 32 0x020e0774 0x00020000
+wm 32 0x020e078c 0x00000030 /* MX6_IOM_GRP_CTLDS */
+wm 32 0x020e0798 0x000c0000
+wm 32 0x021b081c 0x33333333
+wm 32 0x021b0820 0x33333333
+wm 32 0x021b0824 0x33333333
+wm 32 0x021b0828 0x33333333
+wm 32 0x021b481c 0x33333333
+wm 32 0x021b4820 0x33333333
+wm 32 0x021b4824 0x33333333
+wm 32 0x021b4828 0x33333333
+
+
+wm 32 0x021b0004 0x00020036
+wm 32 0x021b0008 0x09444040
+wm 32 0x021b000c 0x54597955
+wm 32 0x021b0010 0xFF328F64
+wm 32 0x021b0014 0x01FF00DB
+wm 32 0x021b0018 0x00001740
+wm 32 0x021b001c 0x00008000
+wm 32 0x021b002c 0x000026D2
+wm 32 0x021b0030 0x00591023
+wm 32 0x021b0040 0x00000027
+wm 32 0x021b0000 0x831A0000
+wm 32 0x021b001c 0x04088032
+wm 32 0x021b001c 0x00008033
+wm 32 0x021b001c 0x00048031
+wm 32 0x021b001c 0x09408030
+wm 32 0x021b001c 0x04008040
+wm 32 0x021b0800 0xA1380003
+wm 32 0x021b4800 0xA1380003
+wm 32 0x021b0020 0x00005800
+wm 32 0x021b0818 0x00011117
+wm 32 0x021b4818 0x00011117
+wm 32 0x021b083c 0x43510360
+wm 32 0x021b0840 0x0342033F
+wm 32 0x021b483c 0x033F033F
+wm 32 0x021b4840 0x03290266
+wm 32 0x021b0848 0x4B3E4141
+wm 32 0x021b4848 0x47413B4A
+wm 32 0x021b0850 0x42404843
+wm 32 0x021b4850 0x4C3F4C45
+wm 32 0x021b080c 0x00350035
+wm 32 0x021b0810 0x001F001F
+wm 32 0x021b480c 0x00010001
+wm 32 0x021b4810 0x00010001
+wm 32 0x021b08b8 0x00000800
+wm 32 0x021b48b8 0x00000800
+wm 32 0x021b0004 0x00025576
+wm 32 0x021b0404 0x00011006
+wm 32 0x021b001c 0x00000000
+
diff --git a/arch/arm/boards/udoo/lowlevel.c b/arch/arm/boards/udoo/lowlevel.c
new file mode 100644
index 0000000..b54ddfe
--- /dev/null
+++ b/arch/arm/boards/udoo/lowlevel.c
@@ -0,0 +1,17 @@
+#include <common.h>
+#include <sizes.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+
+extern char __dtb_imx6q_udoo_start[];
+
+ENTRY_FUNCTION(start_imx6_udoo, r0, r1, r2)
+{
+	uint32_t fdt;
+
+	arm_cpu_lowlevel_init();
+
+	fdt = (uint32_t)__dtb_imx6q_udoo_start - get_runtime_offset();
+
+	barebox_arm_entry(0x10000000, SZ_1G, fdt);
+}
diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig
index 0f8b3ef..9634615 100644
--- a/arch/arm/configs/imx_v7_defconfig
+++ b/arch/arm/configs/imx_v7_defconfig
@@ -13,6 +13,7 @@ CONFIG_MACH_TQMA6X=y
 CONFIG_MACH_SABRELITE=y
 CONFIG_MACH_NITROGEN6X=y
 CONFIG_MACH_SOLIDRUN_HUMMINGBOARD=y
+CONFIG_MACH_UDOO=y
 CONFIG_IMX_IIM=y
 CONFIG_IMX_IIM_FUSE_BLOW=y
 CONFIG_IMX_OCOTP=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 07508e3..45b4b54 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -23,7 +23,8 @@ dtb-$(CONFIG_ARCH_IMX6) += imx6q-gk802.dtb \
 	imx6q-phytec-pbab01.dtb \
 	imx6dl-hummingboard.dtb \
 	imx6q-nitrogen6x.dtb \
-	imx6dl-nitrogen6x.dtb
+	imx6dl-nitrogen6x.dtb \
+    imx6q-udoo.dtb
 dtb-$(CONFIG_ARCH_MVEBU) += dove-cubox.dtb
 dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_sockit.dtb \
 	socfpga_cyclone5_socrates.dtb
@@ -55,6 +56,7 @@ pbl-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o
 pbl-$(CONFIG_MACH_SOLIDRUN_HUMMINGBOARD) += imx6dl-hummingboard.dtb.o
 pbl-$(CONFIG_MACH_SABRELITE) += imx6q-sabrelite.dtb.o imx6dl-sabrelite.dtb.o
 pbl-$(CONFIG_MACH_NITROGEN6X) += imx6q-nitrogen6x.dtb.o imx6dl-nitrogen6x.dtb.o
+pbl-$(CONFIG_MACH_UDOO) += imx6q-udoo.dtb.o
 
 .SECONDARY: $(obj)/$(BUILTIN_DTB).dtb.S
 .SECONDARY: $(patsubst %,$(obj)/%.S,$(dtb-y))
diff --git a/arch/arm/dts/imx6q-udoo.dts b/arch/arm/dts/imx6q-udoo.dts
new file mode 100644
index 0000000..2e95978
--- /dev/null
+++ b/arch/arm/dts/imx6q-udoo.dts
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2014 Raphaël Poggi
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6qdl-udoo.dtsi"
+
+/ {
+       model = "Freescale i.MX6 Quad UDOO Board";
+       compatible = "fsl,imx6q-udoo", "fsl,imx6q";
+};
+
diff --git a/arch/arm/dts/imx6qdl-udoo.dtsi b/arch/arm/dts/imx6qdl-udoo.dtsi
new file mode 100644
index 0000000..6220751
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-udoo.dtsi
@@ -0,0 +1,111 @@
+/*
+ * Copyright 2014 Raphaël Poggi
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx6q.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+       chosen {
+               linux,stdout-path = &uart2;
+
+       };
+
+       memory {
+               reg = <0x10000000 0x40000000>;
+       };
+
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reg_2p5v: regulator@0 {
+                       compatible = "regulator-fixed";
+                       reg = <0>;
+                       regulator-name = "2P5V";
+                       regulator-min-microvolt = <2500000>;
+                       regulator-max-microvolt = <2500000>;
+                       regulator-always-on;
+               };
+
+               reg_3p3v: regulator@1 {
+                       compatible = "regulator-fixed";
+                       reg = <1>;
+                       regulator-name = "3P3V";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+               };
+
+               reg_usb_otg_vbus: regulator@2 {
+                       compatible = "regulator-fixed";
+                       reg = <2>;
+                       regulator-name = "usb_otg_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+               };
+       };
+};
+
+&i2c1 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hog>;
+
+       imx6q-udoo {
+               pinctrl_hog: hoggrp {
+                       fsl,pins = <
+                               /* SGTL5000 sys_mclk */
+                               MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
+                       >;
+               };
+
+               pinctrl_i2c1: i2c1grp {
+                       fsl,pins = <MX6QDL_I2C1_PINGRP1>;
+               };
+
+               pinctrl_uart2: uart2grp {
+                       fsl,pins = <MX6QDL_UART2_PINGRP1>;
+               };
+
+               pinctrl_usdhc3: usdhc3grp {
+                       fsl,pins = <
+                               MX6QDL_USDHC3_PINGRP_D4
+                       >;
+               };
+
+       };
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       status = "okay";
+};
+
+&usdhc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       status = "okay";
+};
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5933f81..28d1990 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -37,6 +37,7 @@ config ARCH_TEXT_BASE
 	default 0x2fc00000 if MACH_TQMA6X
 	default 0x4fc00000 if MACH_PHYTEC_PFLA02
 	default 0x4fc00000 if MACH_DFI_FS700_M60
+    default 0x4fc00000 if MACH_UDOO
 
 config ARCH_IMX_INTERNAL_BOOT
 	bool "support internal boot mode"
@@ -233,6 +234,10 @@ config MACH_SOLIDRUN_HUMMINGBOARD
 	bool "SolidRun Hummingboard"
 	select ARCH_IMX6
 
+config MACH_UDOO
+	bool "Freescale i.MX6 UDOO Board"
+	select ARCH_IMX6
+
 endif
 
 # ----------------------------------------------------------
diff --git a/images/Makefile.imx b/images/Makefile.imx
index 9aca871..e3b27b7 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -123,3 +123,8 @@ pblx-$(CONFIG_MACH_NITROGEN6X) += start_imx6dl_nitrogen6x_1g
 CFG_start_imx6dl_nitrogen6x_1g.pblx.imximg = $(board)/boundarydevices-nitrogen6x/flash-header-nitrogen6x-1g.imxcfg
 FILE_barebox-boundarydevices-imx6dl-nitrogen6x-1g.img = start_imx6dl_nitrogen6x_1g.pblx.imximg
 image-$(CONFIG_MACH_NITROGEN6X) += barebox-boundarydevices-imx6dl-nitrogen6x-1g.img
+
+pblx-$(CONFIG_MACH_UDOO) += start_imx6_udoo
+CFG_start_imx6_udoo.pblx.imximg = $(board)/udoo/flash-header-mx6-udoo.imxcfg
+FILE_barebox-freescale-imx6q-udoo.img = start_imx6_udoo.pblx.imximg
+image-$(CONFIG_MACH_UDOO) += barebox-freescale-imx6q-udoo.img
-- 
1.8.3.2


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