From: "Philippe Rétornaz" <philippe.retornaz@epfl.ch>
To: s.hauer@pengutronix.de
Cc: barebox@lists.infradead.org,
"Philippe Rétornaz" <philippe.retornaz@epfl.ch>
Subject: [PATCH 1/1] ARM: mx31moboard: Fix UPLL and SPLL initialisation
Date: Fri, 7 Mar 2014 19:14:55 +0100 [thread overview]
Message-ID: <1394216095-20377-1-git-send-email-philippe.retornaz@epfl.ch> (raw)
This copy what the previous bootloader was doing on this board.
It fixes USB host 1 clock error as its PHY clock is provided
by the i.MX31.
Signed-off-by: Philippe Rétornaz <philippe.retornaz@epfl.ch>
---
arch/arm/boards/mx31moboard/lowlevel.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boards/mx31moboard/lowlevel.c b/arch/arm/boards/mx31moboard/lowlevel.c
index e9ffb74..2294c5a 100644
--- a/arch/arm/boards/mx31moboard/lowlevel.c
+++ b/arch/arm/boards/mx31moboard/lowlevel.c
@@ -59,9 +59,12 @@ static noinline __noreturn void mx31moboard_startup(void)
writel(IMX_PLL_PD(0) | IMX_PLL_MFD(0x33) |
IMX_PLL_MFI(0xa) | IMX_PLL_MFN(0x0C),
MX31_CCM_BASE_ADDR + MX31_CCM_MPCTL);
- writel(IMX_PLL_PD(1) | IMX_PLL_MFD(0x43) | IMX_PLL_MFI(12) |
+ writel(IMX_PLL_PD(0) | IMX_PLL_MFD(9) | IMX_PLL_MFI(6) |
IMX_PLL_MFN(1), MX31_CCM_BASE_ADDR +
MX31_CCM_SPCTL);
+ writel(IMX_PLL_PD(1) | IMX_PLL_MFD(12) | IMX_PLL_MFI(9) |
+ IMX_PLL_MFN(3), MX31_CCM_BASE_ADDR +
+ MX31_CCM_UPCTL);
/*
* Configure IOMUXC
--
1.7.9.5
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