From: Lucas Stach <dev@lynxeye.de>
To: barebox@lists.infradead.org
Subject: [PATCH 09/18] dt-bindings: add pinctrl-tegra.h
Date: Sun, 13 Apr 2014 15:27:39 +0200 [thread overview]
Message-ID: <1397395668-9325-10-git-send-email-dev@lynxeye.de> (raw)
In-Reply-To: <1397395668-9325-1-git-send-email-dev@lynxeye.de>
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
include/dt-bindings/pinctrl/pinctrl-tegra.h | 45 +++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra.h
diff --git a/include/dt-bindings/pinctrl/pinctrl-tegra.h b/include/dt-bindings/pinctrl/pinctrl-tegra.h
new file mode 100644
index 000000000000..ebafa498be0f
--- /dev/null
+++ b/include/dt-bindings/pinctrl/pinctrl-tegra.h
@@ -0,0 +1,45 @@
+/*
+ * This header provides constants for Tegra pinctrl bindings.
+ *
+ * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Author: Laxman Dewangan <ldewangan@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_TEGRA_H
+#define _DT_BINDINGS_PINCTRL_TEGRA_H
+
+/*
+ * Enable/disable for diffeent dt properties. This is applicable for
+ * properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain,
+ * nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt.
+ */
+#define TEGRA_PIN_DISABLE 0
+#define TEGRA_PIN_ENABLE 1
+
+#define TEGRA_PIN_PULL_NONE 0
+#define TEGRA_PIN_PULL_DOWN 1
+#define TEGRA_PIN_PULL_UP 2
+
+/* Low power mode driver */
+#define TEGRA_PIN_LP_DRIVE_DIV_8 0
+#define TEGRA_PIN_LP_DRIVE_DIV_4 1
+#define TEGRA_PIN_LP_DRIVE_DIV_2 2
+#define TEGRA_PIN_LP_DRIVE_DIV_1 3
+
+/* Rising/Falling slew rate */
+#define TEGRA_PIN_SLEW_RATE_FASTEST 0
+#define TEGRA_PIN_SLEW_RATE_FAST 1
+#define TEGRA_PIN_SLEW_RATE_SLOW 2
+#define TEGRA_PIN_SLEW_RATE_SLOWEST 3
+
+#endif
--
1.9.0
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next prev parent reply other threads:[~2014-04-13 13:29 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-13 13:27 [PATCH 00/18] Tegra 3 support Lucas Stach
2014-04-13 13:27 ` [PATCH 01/18] gpio: tegra: remove dead code Lucas Stach
2014-04-13 13:27 ` [PATCH 02/18] mmc: tegra: fix typo Lucas Stach
2014-04-13 13:27 ` [PATCH 03/18] tegra: disable more lowlevel unsafe switch optimizations Lucas Stach
2014-04-13 13:27 ` [PATCH 04/18] tegra: source MSELECT clock from CLK_M Lucas Stach
2014-04-13 13:27 ` [PATCH 05/18] tegra: add Tegra3 kconfig symbol Lucas Stach
2014-04-13 13:27 ` [PATCH 06/18] tegra: add Tegra3 ramsize detection Lucas Stach
2014-04-13 13:27 ` [PATCH 07/18] tegra: add Tegra3 mem initcall Lucas Stach
2014-04-13 13:27 ` [PATCH 08/18] tegra: recognize T30 in debug UART code Lucas Stach
2014-04-13 13:27 ` Lucas Stach [this message]
2014-04-13 13:27 ` [PATCH 10/18] pinctrl: tegra: add Tegra3 driver Lucas Stach
2014-04-13 13:27 ` [PATCH 11/18] dt-bindings: add tegra30-car.h Lucas Stach
2014-04-13 13:27 ` [PATCH 12/18] clk: tegra: consider new T30 clock registers Lucas Stach
2014-04-13 13:27 ` [PATCH 13/18] clk: tegra: add Tegra3 driver Lucas Stach
2014-04-13 13:27 ` [PATCH 14/18] gpio: tegra: add Tegra3 setup Lucas Stach
2014-04-13 13:27 ` [PATCH 15/18] ARM: tegra: add basic Tegra3 DT Lucas Stach
2014-04-13 13:27 ` [PATCH 16/18] ARM: tegra: add NVidia Beaver board support Lucas Stach
2014-04-13 13:27 ` [PATCH 17/18] ARM: dts: tegra: add full Beaver pinmux Lucas Stach
2014-04-13 13:27 ` [PATCH 18/18] defconfig: tegra: add some useful options Lucas Stach
2014-04-23 9:41 ` [PATCH 00/18] Tegra 3 support Sascha Hauer
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