From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 09/12] ARM: i.MX27: Use upstream dtsi file
Date: Mon, 28 Apr 2014 09:45:58 +0200 [thread overview]
Message-ID: <1398671161-29045-9-git-send-email-s.hauer@pengutronix.de> (raw)
In-Reply-To: <1398671161-29045-1-git-send-email-s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/dts/imx27.dtsi | 553 +-----------------------------------------------
1 file changed, 1 insertion(+), 552 deletions(-)
diff --git a/arch/arm/dts/imx27.dtsi b/arch/arm/dts/imx27.dtsi
index 83a8247..49a0ddf 100644
--- a/arch/arm/dts/imx27.dtsi
+++ b/arch/arm/dts/imx27.dtsi
@@ -8,555 +8,4 @@
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
-
-#include "skeleton.dtsi"
-#include "imx27-pinfunc.h"
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
- aliases {
- ethernet0 = &fec;
- gpio0 = &gpio1;
- gpio1 = &gpio2;
- gpio2 = &gpio3;
- gpio3 = &gpio4;
- gpio4 = &gpio5;
- gpio5 = &gpio6;
- i2c0 = &i2c1;
- i2c1 = &i2c2;
- serial0 = &uart1;
- serial1 = &uart2;
- serial2 = &uart3;
- serial3 = &uart4;
- serial4 = &uart5;
- serial5 = &uart6;
- spi0 = &cspi1;
- spi1 = &cspi2;
- spi2 = &cspi3;
- };
-
- aitc: aitc-interrupt-controller@e0000000 {
- compatible = "fsl,imx27-aitc", "fsl,avic";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x10040000 0x1000>;
- };
-
- clocks {
- #address-cells = <1>;
- #size-cells = <0>;
-
- osc26m {
- compatible = "fsl,imx-osc26m", "fixed-clock";
- clock-frequency = <26000000>;
- };
- };
-
- cpus {
- #size-cells = <0>;
- #address-cells = <1>;
-
- cpu: cpu@0 {
- device_type = "cpu";
- compatible = "arm,arm926ej-s";
- operating-points = <
- /* kHz uV */
- 266000 1300000
- 399000 1450000
- >;
- clock-latency = <62500>;
- clocks = <&clks 18>;
- voltage-tolerance = <5>;
- };
- };
-
- usbphy {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- usbphy0: usbphy@0 {
- compatible = "usb-nop-xceiv";
- reg = <0>;
- clocks = <&clks 75>;
- clock-names = "main_clk";
- };
-
- usbphy2: usbphy@2 {
- compatible = "usb-nop-xceiv";
- reg = <2>;
- clocks = <&clks 75>;
- clock-names = "main_clk";
- };
- };
-
- soc {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- interrupt-parent = <&aitc>;
- ranges;
-
- aipi@10000000 { /* AIPI1 */
- compatible = "fsl,aipi-bus", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x10000000 0x20000>;
- ranges;
-
- dma: dma@10001000 {
- compatible = "fsl,imx27-dma";
- reg = <0x10001000 0x1000>;
- interrupts = <32>;
- clocks = <&clks 50>, <&clks 70>;
- clock-names = "ipg", "ahb";
- #dma-cells = <1>;
- #dma-channels = <16>;
- };
-
- wdog: wdog@10002000 {
- compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
- reg = <0x10002000 0x1000>;
- interrupts = <27>;
- clocks = <&clks 74>;
- };
-
- gpt1: timer@10003000 {
- compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
- reg = <0x10003000 0x1000>;
- interrupts = <26>;
- clocks = <&clks 46>, <&clks 61>;
- clock-names = "ipg", "per";
- };
-
- gpt2: timer@10004000 {
- compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
- reg = <0x10004000 0x1000>;
- interrupts = <25>;
- clocks = <&clks 45>, <&clks 61>;
- clock-names = "ipg", "per";
- };
-
- gpt3: timer@10005000 {
- compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
- reg = <0x10005000 0x1000>;
- interrupts = <24>;
- clocks = <&clks 44>, <&clks 61>;
- clock-names = "ipg", "per";
- };
-
- pwm: pwm@10006000 {
- #pwm-cells = <2>;
- compatible = "fsl,imx27-pwm";
- reg = <0x10006000 0x1000>;
- interrupts = <23>;
- clocks = <&clks 34>, <&clks 61>;
- clock-names = "ipg", "per";
- };
-
- kpp: kpp@10008000 {
- compatible = "fsl,imx27-kpp", "fsl,imx21-kpp";
- reg = <0x10008000 0x1000>;
- interrupts = <21>;
- clocks = <&clks 37>;
- status = "disabled";
- };
-
- owire: owire@10009000 {
- compatible = "fsl,imx27-owire", "fsl,imx21-owire";
- reg = <0x10009000 0x1000>;
- clocks = <&clks 35>;
- status = "disabled";
- };
-
- uart1: serial@1000a000 {
- compatible = "fsl,imx27-uart", "fsl,imx21-uart";
- reg = <0x1000a000 0x1000>;
- interrupts = <20>;
- clocks = <&clks 81>, <&clks 61>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
-
- uart2: serial@1000b000 {
- compatible = "fsl,imx27-uart", "fsl,imx21-uart";
- reg = <0x1000b000 0x1000>;
- interrupts = <19>;
- clocks = <&clks 80>, <&clks 61>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
-
- uart3: serial@1000c000 {
- compatible = "fsl,imx27-uart", "fsl,imx21-uart";
- reg = <0x1000c000 0x1000>;
- interrupts = <18>;
- clocks = <&clks 79>, <&clks 61>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
-
- uart4: serial@1000d000 {
- compatible = "fsl,imx27-uart", "fsl,imx21-uart";
- reg = <0x1000d000 0x1000>;
- interrupts = <17>;
- clocks = <&clks 78>, <&clks 61>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
-
- cspi1: cspi@1000e000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx27-cspi";
- reg = <0x1000e000 0x1000>;
- interrupts = <16>;
- clocks = <&clks 53>, <&clks 60>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
-
- cspi2: cspi@1000f000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx27-cspi";
- reg = <0x1000f000 0x1000>;
- interrupts = <15>;
- clocks = <&clks 52>, <&clks 60>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
-
- ssi1: ssi@10010000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
- reg = <0x10010000 0x1000>;
- interrupts = <14>;
- clocks = <&clks 26>;
- dmas = <&dma 12>, <&dma 13>, <&dma 14>, <&dma 15>;
- dma-names = "rx0", "tx0", "rx1", "tx1";
- fsl,fifo-depth = <8>;
- status = "disabled";
- };
-
- ssi2: ssi@10011000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
- reg = <0x10011000 0x1000>;
- interrupts = <13>;
- clocks = <&clks 25>;
- dmas = <&dma 8>, <&dma 9>, <&dma 10>, <&dma 11>;
- dma-names = "rx0", "tx0", "rx1", "tx1";
- fsl,fifo-depth = <8>;
- status = "disabled";
- };
-
- i2c1: i2c@10012000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
- reg = <0x10012000 0x1000>;
- interrupts = <12>;
- clocks = <&clks 40>;
- status = "disabled";
- };
-
- sdhci1: sdhci@10013000 {
- compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
- reg = <0x10013000 0x1000>;
- interrupts = <11>;
- clocks = <&clks 30>, <&clks 60>;
- clock-names = "ipg", "per";
- dmas = <&dma 7>;
- dma-names = "rx-tx";
- status = "disabled";
- };
-
- sdhci2: sdhci@10014000 {
- compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
- reg = <0x10014000 0x1000>;
- interrupts = <10>;
- clocks = <&clks 29>, <&clks 60>;
- clock-names = "ipg", "per";
- dmas = <&dma 6>;
- dma-names = "rx-tx";
- status = "disabled";
- };
-
- iomuxc: iomuxc@10015000 {
- compatible = "fsl,imx27-iomuxc";
- reg = <0x10015000 0x600>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- gpio1: gpio@10015000 {
- compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
- reg = <0x10015000 0x100>;
- interrupts = <8>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio2: gpio@10015100 {
- compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
- reg = <0x10015100 0x100>;
- interrupts = <8>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio3: gpio@10015200 {
- compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
- reg = <0x10015200 0x100>;
- interrupts = <8>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio4: gpio@10015300 {
- compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
- reg = <0x10015300 0x100>;
- interrupts = <8>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio5: gpio@10015400 {
- compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
- reg = <0x10015400 0x100>;
- interrupts = <8>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio6: gpio@10015500 {
- compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
- reg = <0x10015500 0x100>;
- interrupts = <8>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- audmux: audmux@10016000 {
- compatible = "fsl,imx27-audmux", "fsl,imx21-audmux";
- reg = <0x10016000 0x1000>;
- clocks = <&clks 0>;
- clock-names = "audmux";
- status = "disabled";
- };
-
- cspi3: cspi@10017000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx27-cspi";
- reg = <0x10017000 0x1000>;
- interrupts = <6>;
- clocks = <&clks 51>, <&clks 60>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
-
- gpt4: timer@10019000 {
- compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
- reg = <0x10019000 0x1000>;
- interrupts = <4>;
- clocks = <&clks 43>, <&clks 61>;
- clock-names = "ipg", "per";
- };
-
- gpt5: timer@1001a000 {
- compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
- reg = <0x1001a000 0x1000>;
- interrupts = <3>;
- clocks = <&clks 42>, <&clks 61>;
- clock-names = "ipg", "per";
- };
-
- uart5: serial@1001b000 {
- compatible = "fsl,imx27-uart", "fsl,imx21-uart";
- reg = <0x1001b000 0x1000>;
- interrupts = <49>;
- clocks = <&clks 77>, <&clks 61>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
-
- uart6: serial@1001c000 {
- compatible = "fsl,imx27-uart", "fsl,imx21-uart";
- reg = <0x1001c000 0x1000>;
- interrupts = <48>;
- clocks = <&clks 78>, <&clks 61>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
-
- i2c2: i2c@1001d000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
- reg = <0x1001d000 0x1000>;
- interrupts = <1>;
- clocks = <&clks 39>;
- status = "disabled";
- };
-
- sdhci3: sdhci@1001e000 {
- compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
- reg = <0x1001e000 0x1000>;
- interrupts = <9>;
- clocks = <&clks 28>, <&clks 60>;
- clock-names = "ipg", "per";
- dmas = <&dma 36>;
- dma-names = "rx-tx";
- status = "disabled";
- };
-
- gpt6: timer@1001f000 {
- compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
- reg = <0x1001f000 0x1000>;
- interrupts = <2>;
- clocks = <&clks 41>, <&clks 61>;
- clock-names = "ipg", "per";
- };
- };
-
- aipi@10020000 { /* AIPI2 */
- compatible = "fsl,aipi-bus", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x10020000 0x20000>;
- ranges;
-
- fb: fb@10021000 {
- compatible = "fsl,imx27-fb", "fsl,imx21-fb";
- interrupts = <61>;
- reg = <0x10021000 0x1000>;
- clocks = <&clks 36>, <&clks 65>, <&clks 59>;
- clock-names = "ipg", "ahb", "per";
- status = "disabled";
- };
-
- coda: coda@10023000 {
- compatible = "fsl,imx27-vpu";
- reg = <0x10023000 0x0200>;
- interrupts = <53>;
- clocks = <&clks 57>, <&clks 66>;
- clock-names = "per", "ahb";
- iram = <&iram>;
- };
-
- usbotg: usb@10024000 {
- compatible = "fsl,imx27-usb";
- reg = <0x10024000 0x200>;
- interrupts = <56>;
- clocks = <&clks 15>;
- fsl,usbmisc = <&usbmisc 0>;
- fsl,usbphy = <&usbphy0>;
- status = "disabled";
- };
-
- usbh1: usb@10024200 {
- compatible = "fsl,imx27-usb";
- reg = <0x10024200 0x200>;
- interrupts = <54>;
- clocks = <&clks 15>;
- fsl,usbmisc = <&usbmisc 1>;
- status = "disabled";
- };
-
- usbh2: usb@10024400 {
- compatible = "fsl,imx27-usb";
- reg = <0x10024400 0x200>;
- interrupts = <55>;
- clocks = <&clks 15>;
- fsl,usbmisc = <&usbmisc 2>;
- fsl,usbphy = <&usbphy2>;
- status = "disabled";
- };
-
- usbmisc: usbmisc@10024600 {
- #index-cells = <1>;
- compatible = "fsl,imx27-usbmisc";
- reg = <0x10024600 0x200>;
- clocks = <&clks 62>;
- };
-
- sahara2: sahara@10025000 {
- compatible = "fsl,imx27-sahara";
- reg = <0x10025000 0x1000>;
- interrupts = <59>;
- clocks = <&clks 32>, <&clks 64>;
- clock-names = "ipg", "ahb";
- };
-
- clks: ccm@10027000{
- compatible = "fsl,imx27-ccm";
- reg = <0x10027000 0x1000>;
- #clock-cells = <1>;
- };
-
- iim: iim@10028000 {
- compatible = "fsl,imx27-iim";
- reg = <0x10028000 0x1000>;
- interrupts = <62>;
- clocks = <&clks 38>;
- };
-
- fec: ethernet@1002b000 {
- compatible = "fsl,imx27-fec";
- reg = <0x1002b000 0x4000>;
- interrupts = <50>;
- clocks = <&clks 48>, <&clks 67>;
- clock-names = "ipg", "ahb";
- status = "disabled";
- };
- };
-
- nfc: nand@d8000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,imx27-nand";
- reg = <0xd8000000 0x1000>;
- interrupts = <29>;
- clocks = <&clks 54>;
- status = "disabled";
- };
-
- weim: weim@d8002000 {
- #address-cells = <2>;
- #size-cells = <1>;
- compatible = "fsl,imx27-weim";
- reg = <0xd8002000 0x1000>;
- clocks = <&clks 0>;
- ranges = <
- 0 0 0xc0000000 0x08000000
- 1 0 0xc8000000 0x08000000
- 2 0 0xd0000000 0x02000000
- 3 0 0xd2000000 0x02000000
- 4 0 0xd4000000 0x02000000
- 5 0 0xd6000000 0x02000000
- >;
- status = "disabled";
- };
-
- iram: iram@ffff4c00 {
- compatible = "mmio-sram";
- reg = <0xffff4c00 0xb400>;
- };
- };
-};
+#include <arm/imx27.dtsi>
--
1.9.1
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next prev parent reply other threads:[~2014-04-28 7:46 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-28 7:45 [PATCH] Add Linux dts files and use them Sascha Hauer
2014-04-28 7:45 ` [PATCH 02/12] serial: ns16550: omap: set register shift from code Sascha Hauer
2014-04-28 7:45 ` [PATCH 03/12] dts: Use dt-bindings from kernel Sascha Hauer
2014-04-28 14:22 ` Antony Pavlov
2014-04-28 18:33 ` Sascha Hauer
2014-04-30 5:49 ` [PATCH] make: dts: fix out-of-tree build Silvio Fricke
2014-05-05 7:38 ` Sascha Hauer
2014-04-28 7:45 ` [PATCH 04/12] dts: i.MX51 efika sb: Roll back pingroup changes Sascha Hauer
2014-04-28 7:45 ` [PATCH 05/12] ARM: dts: i.MX51: Use upstream dts files Sascha Hauer
2014-04-28 7:45 ` [PATCH 06/12] ARM: i.MX6: Use upstream dtsi files Sascha Hauer
2014-04-28 7:45 ` [PATCH 07/12] ARM: i.MX53: " Sascha Hauer
2014-04-28 7:45 ` [PATCH 08/12] ARM: i.MX25: Use upstream dtsi file Sascha Hauer
2014-04-28 7:45 ` Sascha Hauer [this message]
2014-04-28 7:45 ` [PATCH 10/12] ARM: AM33xx: " Sascha Hauer
2014-04-28 7:46 ` [PATCH 11/12] ARM: Tegra20: Use upstream dtsi files Sascha Hauer
2014-04-28 7:46 ` [PATCH 12/12] ARM: dove: Use upstream dtsi file Sascha Hauer
2014-04-28 17:36 ` [PATCH] fixup! " Sebastian Hesselbarth
2014-04-28 18:40 ` Sascha Hauer
2014-05-05 8:20 ` [PATCH] Add Linux dts files and use them Sascha Hauer
2014-05-05 15:57 ` Alexander Shiyan
2014-05-05 17:48 ` Sascha Hauer
2014-05-05 18:01 ` Alexander Shiyan
2014-05-08 7:39 ` Sascha Hauer
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