[PATCH 04/25] clk: tegra: reset UARTS from clock controller

[Lucas Stach <dev@lynxeye.de>]

The console devices are the only ones that can't
use the reset controller properly, as they get
registered from platform code. Reset those devices
from the clock controller.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
 drivers/clk/tegra/clk-tegra20.c |  1 +
 drivers/clk/tegra/clk-tegra30.c |  1 +
 drivers/clk/tegra/clk.c         | 11 +++++++++++
 drivers/clk/tegra/clk.h         |  2 ++
 4 files changed, 15 insertions(+)

diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c
index 7c7a915..cb0a571 100644
--- a/drivers/clk/tegra/clk-tegra20.c
+++ b/drivers/clk/tegra/clk-tegra20.c
@@ -348,6 +348,7 @@ static int tegra20_car_probe(struct device_d *dev)
 			    &clk_data);
 
 	tegra_clk_init_rst_controller(car_base, dev->device_node, 3 * 32);
+	tegra_clk_reset_uarts();
 
 	return 0;
 }
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index adb5824..9536288 100644
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -342,6 +342,7 @@ static int tegra30_car_probe(struct device_d *dev)
 			    &clk_data);
 
 	tegra_clk_init_rst_controller(car_base, dev->device_node, 6 * 32);
+	tegra_clk_reset_uarts();
 
 	return 0;
 }
diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c
index a6b81d0..cb4d920 100644
--- a/drivers/clk/tegra/clk.c
+++ b/drivers/clk/tegra/clk.c
@@ -187,3 +187,14 @@ void tegra_clk_init_rst_controller(void __iomem *base, struct device_node *np,
 	rst_ctlr.nr_resets = num;
 	reset_controller_register(&rst_ctlr);
 }
+
+void tegra_clk_reset_uarts(void) {
+	int i;
+	int console_device_ids[] = {6, 7, 55, 65, 66};
+
+	for (i = 0; i < ARRAY_SIZE(console_device_ids); i++) {
+		rst_ops.assert(&rst_ctlr, console_device_ids[i]);
+		udelay(2);
+		rst_ops.deassert(&rst_ctlr, console_device_ids[i]);
+	}
+};
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index 29d5249..6ce9f7e 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -160,3 +160,5 @@ struct tegra_clk_periph_regs {
 
 void tegra_clk_init_rst_controller(void __iomem *base, struct device_node *np,
 		unsigned int num);
+
+void tegra_clk_reset_uarts(void);
-- 
1.9.0


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