* [PATCH][RESEND] sama5d3x: fix AT91_SMC_CS offset stride
@ 2014-05-29 9:53 Matteo Fortini
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From: Matteo Fortini @ 2014-05-29 9:53 UTC (permalink / raw)
To: barebox
As stated in section 29.19.32 of SAMA5D3 Series datasheet, to move
from CS(n) to CS(n+1) the stride is 0x14 and not 0x10.
For this reason, I was unable to use the NAND memory on my board (CS
configuration was not applied and the timings were wrong).
This patch fixes the problem.
Matteo
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2014-05-29 9:53 [PATCH][RESEND] sama5d3x: fix AT91_SMC_CS offset stride Matteo Fortini
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