From: Fabio Estevam <fabio.estevam@freescale.com>
To: s.hauer@pengutronix.de
Cc: Fabio Estevam <fabio.estevam@freescale.com>, barebox@lists.infradead.org
Subject: [PATCH v2] serial: imx: Fix buggy transmissions when baudrate mismatches
Date: Mon, 2 Jun 2014 11:06:39 -0300 [thread overview]
Message-ID: <1401717999-10752-1-git-send-email-fabio.estevam@freescale.com> (raw)
Bit 7 of UCR3 is described in the i.MX reference manuals (with the exception
of i.MX1) as follows:
ADNIMP: Autobaud Detection Not Improved-. Disables new features of
autobaud detection (See Baud Rate Automatic Detection
Protocol, for more details).
0 Autobaud detection new features selected
1 Keep old autobaud detection mechanism
The "new features" mechanism occasionally causes the receiver to get out of sync
and continuously produces received characters of '0xff'.
In order to reproduce the problem:
$ cs0.baudrate=19200
- Change the terminal baudrate to 19200
- Type in the console and it should look good
- Change the terminal baudrate back to 115200
- Type 'b' in the console, then a stream of '0xff' is transmitted in loop
Setting the ADNIMP bit avoids the transmission of '0xff' in loop.
Also rename the bit definition as per the reference manual.
Tested on mx6q.
Based on a patch from Eric Nelson for U-boot.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes since v1:
- Remove the extra hunk above the --- line.
drivers/serial/serial_imx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/serial/serial_imx.c b/drivers/serial/serial_imx.c
index e0bd185..cb10627 100644
--- a/drivers/serial/serial_imx.c
+++ b/drivers/serial/serial_imx.c
@@ -79,7 +79,7 @@
#define UCR3_DSR (1<<10) /* Data set ready */
#define UCR3_DCD (1<<9) /* Data carrier detect */
#define UCR3_RI (1<<8) /* Ring indicator */
-#define UCR3_TIMEOUTEN (1<<7) /* Timeout interrupt enable */
+#define UCR3_ADNIMP (1<<7) /* Autobaud Detection Not Improved */
#define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */
#define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */
#define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */
@@ -152,7 +152,7 @@ static struct imx_serial_devtype_data imx1_data = {
static struct imx_serial_devtype_data imx21_data = {
.ucr1_val = 0,
- .ucr3_val = 0x700 | UCR3_RXDMUXSEL,
+ .ucr3_val = 0x700 | UCR3_RXDMUXSEL | UCR3_ADNIMP,
.ucr4_val = UCR4_CTSTL_32,
.uts = 0xb4,
.onems = 0xb0,
--
1.8.3.2
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next reply other threads:[~2014-06-02 14:07 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-02 14:06 Fabio Estevam [this message]
2014-06-03 6:42 ` Sascha Hauer
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