mail archive of the barebox mailing list
 help / color / mirror / Atom feed
From: Lucas Stach <dev@lynxeye.de>
To: barebox@lists.infradead.org
Subject: [PATCH 18/30] tegra: setup L2 cache on Tegra124
Date: Tue,  3 Jun 2014 22:35:05 +0200	[thread overview]
Message-ID: <1401827717-6420-19-git-send-email-dev@lynxeye.de> (raw)
In-Reply-To: <1401827717-6420-1-git-send-email-dev@lynxeye.de>

Set SRAM latency to 3 clock cycles.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
 arch/arm/mach-tegra/tegra_maincomplex_init.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-tegra/tegra_maincomplex_init.c b/arch/arm/mach-tegra/tegra_maincomplex_init.c
index 83ad33d..17490a4 100644
--- a/arch/arm/mach-tegra/tegra_maincomplex_init.c
+++ b/arch/arm/mach-tegra/tegra_maincomplex_init.c
@@ -25,6 +25,8 @@
 void tegra_maincomplex_entry(void)
 {
 	uint32_t rambase, ramsize;
+	enum tegra_chiptype chiptype;
+	u32 reg = 0;
 
 	arm_cpu_lowlevel_init();
 
@@ -36,7 +38,16 @@ void tegra_maincomplex_entry(void)
 	       TEGRA_CLK_RESET_BASE + CRC_CCLK_BURST_POLICY);
 	writel(CRC_SUPER_CDIV_ENB, TEGRA_CLK_RESET_BASE + CRC_SUPER_CCLK_DIV);
 
-	switch (tegra_get_chiptype()) {
+	chiptype = tegra_get_chiptype();
+
+	if (chiptype >= TEGRA114) {
+		asm("mrc p15, 1, %0, c9, c0, 2" : : "r" (reg));
+		reg &= ~7;
+		reg |= 2;
+		asm("mcr p15, 1, %0, c9, c0, 2" : : "r" (reg));
+	}
+
+	switch (chiptype) {
 	case TEGRA20:
 		rambase = 0x0;
 		ramsize = tegra20_get_ramsize();
-- 
1.9.3


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

  parent reply	other threads:[~2014-06-03 20:33 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-03 20:34 [PATCH 00/30] Tegra K1 support Lucas Stach
2014-06-03 20:34 ` [PATCH 01/30] mci: implement non-removable property Lucas Stach
2014-06-03 20:34 ` [PATCH 02/30] tegra: lowlevel-dvc: use __always_inline macro Lucas Stach
2014-06-03 20:34 ` [PATCH 03/30] tegra: pmc: add Tegra30 compatible Lucas Stach
2014-06-03 20:34 ` [PATCH 04/30] tegra: pmc: add command to get into RCM Lucas Stach
2014-06-03 20:34 ` [PATCH 05/30] tegra: lowlevel: setup an early stack Lucas Stach
2014-06-03 20:34 ` [PATCH 06/30] tegra: add Tegra124 id to lowlevel functions Lucas Stach
2014-06-03 20:34 ` [PATCH 07/30] tegra: lowlevel: fix ODMdata fetch on Tegra124 Lucas Stach
2014-06-03 20:34 ` [PATCH 08/30] tegra: recognize Tegra124 in maincomplex startup Lucas Stach
2014-06-03 20:34 ` [PATCH 09/30] tegra: recognize Tegra124 in common initcalls Lucas Stach
2014-06-03 20:34 ` [PATCH 10/30] tegra: add Tegra124 and AS3722 PMIC to lowlevel-dvc Lucas Stach
2014-06-03 20:34 ` [PATCH 11/30] tegra: disable IDDQ for PLL_X on Tegra124 Lucas Stach
2014-06-03 20:34 ` [PATCH 12/30] tegra: power up additional partitions " Lucas Stach
2014-06-03 20:35 ` [PATCH 13/30] tegra: fix MESLECT clock enable Lucas Stach
2014-06-03 20:35 ` [PATCH 14/30] tegra: change cpu internal reset layout for Tegra124 Lucas Stach
2014-06-03 20:35 ` [PATCH 15/30] tegra: add Tegra124 PLL_X rate setup Lucas Stach
2014-06-03 20:35 ` [PATCH 16/30] tegra: apply cluster switch logic to all SoCs >=T30 Lucas Stach
2014-06-03 20:35 ` [PATCH 17/30] tegra: hardcode entry address for main cluster Lucas Stach
2014-06-03 20:35 ` Lucas Stach [this message]
2014-06-03 20:35 ` [PATCH 19/30] tegra: add architectural timer init Lucas Stach
2014-06-03 20:35 ` [PATCH 20/30] tegra: add Tegra124 Kconfig symbol Lucas Stach
2014-06-03 20:35 ` [PATCH 21/30] pinctrl: tegra30: introduce drvdata Lucas Stach
2014-06-03 20:35 ` [PATCH 22/30] pinctrl: tegra: add Tegra124 support Lucas Stach
2014-06-03 20:35 ` [PATCH 23/30] clk: tegra: allow variable sized muxes Lucas Stach
2014-06-03 20:35 ` [PATCH 24/30] clk: tegra: don't bug out on zero PLL postdiv Lucas Stach
2014-06-03 20:35 ` [PATCH 25/30] clk: tegra: add Tegra124 driver Lucas Stach
2014-06-03 20:35 ` [PATCH 26/30] mci: tegra: add Tegra124 compatible Lucas Stach
2014-06-03 20:35 ` [PATCH 27/30] tegra: pmc: " Lucas Stach
2014-06-03 20:35 ` [PATCH 28/30] images: add Tegra124 image build rules Lucas Stach
2014-06-03 20:35 ` [PATCH 29/30] tegra: add NVIDIA Jetson-TK1 board support Lucas Stach
2014-06-03 20:35 ` [PATCH 30/30] tegra: refresh defconfig Lucas Stach
2014-06-04  5:22 ` [PATCH 00/30] Tegra K1 support Sascha Hauer

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1401827717-6420-19-git-send-email-dev@lynxeye.de \
    --to=dev@lynxeye.de \
    --cc=barebox@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox