[PATCH 0/7] Marvell MVEBU assorted fixes and cleanup

[PATCH 0/7] Marvell MVEBU assorted fixes and cleanup

[Sebastian Hesselbarth]

This patch set comprises cleanup and some fixes for outstanding bugs in
Marvell MVEBU SoC support.

Patch 1 adds default model and hostname for Dove SoCs.

Patch 2 consolidates TEXT_BASE from per-board to per-SoC selection.

Patch 3 removes an unused include.

Patch 4 consolidates lowlevel code from two different files to a single file.

Patch 5 fixes typos in Armada 370 TCLK frequencies.

Patch 6 adds a 25MHz reference clock to Armada XP SoC init.

Patch 7 splits timer initialization for Armada 370 and XP, which uses a
fixed 25MHz reference clock instead of divided TCLK.

The patches are based on today's next.

A branch based on *unstable* next is available at:
https://github.com/shesselba/barebox-dove.git mvebu/cleanup

Sebastian Hesselbarth (7):
  ARM: mvebu: set model and default hostname for Dove
  ARM: mvebu: set default TEXT_BASE by SoC
  ARM: mvebu: delete unused mach/mvebu.h
  ARM: mvebu: move lowlevel code to lowlevel.c
  clk: mvebu: fix Armada 370 TCLK frequencies
  ARM: mvebu: add 25MHz fixed clock for Armada XP
  clocksource: mvebu: split initialization for Armada 370/XP

 arch/arm/mach-mvebu/Kconfig              | 10 ++---
 arch/arm/mach-mvebu/Makefile             |  2 +-
 arch/arm/mach-mvebu/armada-370-xp.c      |  5 +++
 arch/arm/mach-mvebu/common.c             | 40 --------------------
 arch/arm/mach-mvebu/dove.c               |  3 ++
 arch/arm/mach-mvebu/include/mach/mvebu.h | 22 -----------
 arch/arm/mach-mvebu/lowlevel.c           | 37 ++++++++++++++++++
 drivers/clk/mvebu/armada-370.c           |  4 +-
 drivers/clocksource/mvebu.c              | 65 ++++++++++++++++++++------------
 9 files changed, 92 insertions(+), 96 deletions(-)
 delete mode 100644 arch/arm/mach-mvebu/include/mach/mvebu.h

---
Cc: barebox@lists.infradead.org
-- 
2.0.0


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[PATCH 1/7] ARM: mvebu: set model and default hostname for Dove

[Sebastian Hesselbarth]

Set default model and hostname based on SoC name.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: barebox@lists.infradead.org
---
 arch/arm/mach-mvebu/dove.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-mvebu/dove.c b/arch/arm/mach-mvebu/dove.c
index f081e50e7bf1..bcbf4b8ad7bd 100644
--- a/arch/arm/mach-mvebu/dove.c
+++ b/arch/arm/mach-mvebu/dove.c
@@ -71,6 +71,9 @@ static int dove_init_soc(void)
 {
 	unsigned long phys_base, phys_size;
 
+	barebox_set_model("Marvell Dove");
+	barebox_set_hostname("dove");
+
 	dove_remap_mc_regs();
 	dove_memory_find(&phys_base, &phys_size);
 	arm_add_mem_device("ram0", phys_base, phys_size);
-- 
2.0.0


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[PATCH 2/7] ARM: mvebu: set default TEXT_BASE by SoC

[Sebastian Hesselbarth]

All current boards use the same TEXT_BASE, therefore set the default
TEXT_BASE by SoC instead of by board.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: barebox@lists.infradead.org
---
 arch/arm/mach-mvebu/Kconfig | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 70c49ecc6a0a..80e8687916df 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -2,12 +2,10 @@ if ARCH_MVEBU
 
 config ARCH_TEXT_BASE
 	hex
-	default 0x2000000 if MACH_PLATHOME_OPENBLOCKS_AX3
-	default 0x2000000 if MACH_GLOBALSCALE_MIRABOX
-	default 0x2000000 if MACH_GLOBALSCALE_GURUPLUG
-	default 0x2000000 if MACH_USI_TOPKICK
-	default 0x2000000 if MACH_MARVELL_ARMADA_XP_GP
-	default 0x2000000 if MACH_SOLIDRUN_CUBOX
+	default 0x2000000 if ARCH_ARMADA_370
+	default 0x2000000 if ARCH_ARMADA_XP
+	default 0x2000000 if ARCH_DOVE
+	default 0x2000000 if ARCH_KIRKWOOD
 
 choice
 	prompt "Marvell EBU Processor"
-- 
2.0.0


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[PATCH 3/7] ARM: mvebu: delete unused mach/mvebu.h

[Sebastian Hesselbarth]

This removes the stale mach/mvebu.h include as there is no user of it.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: barebox@lists.infradead.org
---
 arch/arm/mach-mvebu/include/mach/mvebu.h | 22 ----------------------
 1 file changed, 22 deletions(-)
 delete mode 100644 arch/arm/mach-mvebu/include/mach/mvebu.h

diff --git a/arch/arm/mach-mvebu/include/mach/mvebu.h b/arch/arm/mach-mvebu/include/mach/mvebu.h
deleted file mode 100644
index e13a446fca0e..000000000000
--- a/arch/arm/mach-mvebu/include/mach/mvebu.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __MACH_MVEBU_H
-#define __MACH_MVEBU_H
-
-int mvebu_add_uart0(void);
-void __naked __noreturn mvebu_barebox_entry(void);
-
-#endif /* __MACH_MVEBU_H */
-- 
2.0.0


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[PATCH 4/7] ARM: mvebu: move lowlevel code to lowlevel.c

[Sebastian Hesselbarth]

mach-mvebu has two files containing lowlevel code. Consolidate both into
mach-mvebu/lowlevel.c. Also put the now empty mach-mvebu/common.c into
non-lowlevel obj-y as it will be used for common non-lowlevel code later.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: barebox@lists.infradead.org
---
 arch/arm/mach-mvebu/Makefile   |  2 +-
 arch/arm/mach-mvebu/common.c   | 40 ----------------------------------------
 arch/arm/mach-mvebu/lowlevel.c | 37 +++++++++++++++++++++++++++++++++++++
 3 files changed, 38 insertions(+), 41 deletions(-)

diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 6e303663ca89..80b3947cc866 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -1,5 +1,5 @@
 lwl-y				+= lowlevel.o
-lwl-y				+= common.o
+obj-y				+= common.o
 obj-$(CONFIG_ARCH_ARMADA_370)	+= armada-370-xp.o
 obj-$(CONFIG_ARCH_ARMADA_XP)	+= armada-370-xp.o
 obj-$(CONFIG_ARCH_DOVE)		+= dove.o
diff --git a/arch/arm/mach-mvebu/common.c b/arch/arm/mach-mvebu/common.c
index d52b88d71318..4a78a0f37ec5 100644
--- a/arch/arm/mach-mvebu/common.c
+++ b/arch/arm/mach-mvebu/common.c
@@ -15,43 +15,3 @@
  *
  */
 
-#include <common.h>
-#include <io.h>
-#include <sizes.h>
-#include <asm/barebox-arm.h>
-#include <mach/common.h>
-
-/*
- * All MVEBU SoCs start with internal registers at 0xd0000000.
- * To get more contiguous address space and as Linux expects them
- * there, we remap them early to 0xf1000000.
- *
- * There is no way to determine internal registers base address
- * safely later on, as the remap register itself is within the
- * internal registers.
- */
-#define MVEBU_BOOTUP_INT_REG_BASE	0xd0000000
-#define MVEBU_BRIDGE_REG_BASE		0x20000
-#define DEVICE_INTERNAL_BASE_ADDR	(MVEBU_BRIDGE_REG_BASE + 0x80)
-
-static void mvebu_remap_registers(void)
-{
-	writel(MVEBU_REMAP_INT_REG_BASE,
-	       IOMEM(MVEBU_BOOTUP_INT_REG_BASE) + DEVICE_INTERNAL_BASE_ADDR);
-}
-
-/*
- * Determining the actual memory size is highly SoC dependent,
- * but for all SoCs RAM starts at 0x00000000. Therefore, we start
- * with a minimal memory setup of 64M and probe correct memory size
- * later.
- */
-#define MVEBU_BOOTUP_MEMORY_BASE	0x00000000
-#define MVEBU_BOOTUP_MEMORY_SIZE	SZ_64M
-
-void __naked __noreturn mvebu_barebox_entry(void *boarddata)
-{
-	mvebu_remap_registers();
-	barebox_arm_entry(MVEBU_BOOTUP_MEMORY_BASE,
-			  MVEBU_BOOTUP_MEMORY_SIZE, boarddata);
-}
diff --git a/arch/arm/mach-mvebu/lowlevel.c b/arch/arm/mach-mvebu/lowlevel.c
index 147a717ad9f3..7c4facfa1c00 100644
--- a/arch/arm/mach-mvebu/lowlevel.c
+++ b/arch/arm/mach-mvebu/lowlevel.c
@@ -16,9 +16,11 @@
  */
 
 #include <common.h>
+#include <io.h>
 #include <sizes.h>
 #include <asm/barebox-arm.h>
 #include <asm/barebox-arm-head.h>
+#include <mach/common.h>
 #include <mach/lowlevel.h>
 
 void __naked barebox_arm_reset_vector(void)
@@ -26,3 +28,38 @@ void __naked barebox_arm_reset_vector(void)
 	arm_cpu_lowlevel_init();
 	mvebu_barebox_entry(NULL);
 }
+
+/*
+ * All MVEBU SoCs start with internal registers at 0xd0000000.
+ * To get more contiguous address space and as Linux expects them
+ * there, we remap them early to 0xf1000000.
+ *
+ * There is no way to determine internal registers base address
+ * safely later on, as the remap register itself is within the
+ * internal registers.
+ */
+#define MVEBU_BOOTUP_INT_REG_BASE	0xd0000000
+#define MVEBU_BRIDGE_REG_BASE		0x20000
+#define DEVICE_INTERNAL_BASE_ADDR	(MVEBU_BRIDGE_REG_BASE + 0x80)
+
+static void mvebu_remap_registers(void)
+{
+	writel(MVEBU_REMAP_INT_REG_BASE,
+	       IOMEM(MVEBU_BOOTUP_INT_REG_BASE) + DEVICE_INTERNAL_BASE_ADDR);
+}
+
+/*
+ * Determining the actual memory size is highly SoC dependent,
+ * but for all SoCs RAM starts at 0x00000000. Therefore, we start
+ * with a minimal memory setup of 64M and probe correct memory size
+ * later.
+ */
+#define MVEBU_BOOTUP_MEMORY_BASE	0x00000000
+#define MVEBU_BOOTUP_MEMORY_SIZE	SZ_64M
+
+void __naked __noreturn mvebu_barebox_entry(void *boarddata)
+{
+	mvebu_remap_registers();
+	barebox_arm_entry(MVEBU_BOOTUP_MEMORY_BASE,
+			  MVEBU_BOOTUP_MEMORY_SIZE, boarddata);
+}
-- 
2.0.0


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[PATCH 5/7] clk: mvebu: fix Armada 370 TCLK frequencies

[Sebastian Hesselbarth]

This fixes Armada 370 TCLK frequencies that are off by
a factor of 10.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: barebox@lists.infradead.org
---
 drivers/clk/mvebu/armada-370.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/mvebu/armada-370.c b/drivers/clk/mvebu/armada-370.c
index d189c6ca5704..8d02ed93d905 100644
--- a/drivers/clk/mvebu/armada-370.c
+++ b/drivers/clk/mvebu/armada-370.c
@@ -37,8 +37,8 @@ static const struct coreclk_ratio a370_coreclk_ratios[] = {
 };
 
 static const u32 a370_tclk_freqs[] = {
-	16600000,
-	20000000,
+	166000000,
+	200000000,
 };
 
 static u32 a370_get_tclk_freq(void __iomem *sar)
-- 
2.0.0


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[PATCH 6/7] ARM: mvebu: add 25MHz fixed clock for Armada XP

[Sebastian Hesselbarth]

Armada XP timers can be run from a 25MHz fixed clock. Add the corrsponding
clock and clock alias to SoC setup.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: barebox@lists.infradead.org
---
 arch/arm/mach-mvebu/armada-370-xp.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index 209be0b60335..051323eeb36c 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -27,6 +27,7 @@
 	ARMADA_370_XP_UARTn_BASE(CONFIG_MVEBU_CONSOLE_UART)
 
 static struct clk *tclk;
+static struct clk *refclk;
 
 static inline void armada_370_xp_memory_find(unsigned long *phys_base,
 					     unsigned long *phys_size)
@@ -92,6 +93,7 @@ static int armada_xp_init_clocks(void)
 {
 	/* On Armada XP, the TCLK frequency is always 250 Mhz */
 	tclk = clk_fixed("tclk", 250000000);
+	refclk = clk_fixed("ref25M", 25000000);
 	return 0;
 }
 #define armada_370_xp_init_clocks()	armada_xp_init_clocks()
@@ -106,6 +108,9 @@ static int armada_370_xp_init_soc(void)
 
 	armada_370_xp_init_clocks();
 	clkdev_add_physbase(tclk, (unsigned int)ARMADA_370_XP_TIMER_BASE, NULL);
+	if (refclk && !IS_ERR(refclk))
+		clkdev_add_physbase(refclk, (u32)ARMADA_370_XP_TIMER_BASE,
+				    "fixed");
 	add_generic_device("mvebu-timer", DEVICE_ID_SINGLE, NULL,
 			   (unsigned int)ARMADA_370_XP_TIMER_BASE, 0x30,
 			   IORESOURCE_MEM, NULL);
-- 
2.0.0


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[PATCH 7/7] clocksource: mvebu: split initialization for Armada 370/XP

[Sebastian Hesselbarth]

Timers found on Marvell Armada 370 and XP require different setup.
While timer clock on Armada 370 can be derived from a divided
reference clocks, Armada XP always uses a 25MHz reference.

This also updates compatibles to destinguish timers for both SoCs
and fixes some whitespace issues on defines.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: barebox@lists.infradead.org
---
 drivers/clocksource/mvebu.c | 65 ++++++++++++++++++++++++++++-----------------
 1 file changed, 40 insertions(+), 25 deletions(-)

diff --git a/drivers/clocksource/mvebu.c b/drivers/clocksource/mvebu.c
index e0c85edaa6b2..e5cb921d922b 100644
--- a/drivers/clocksource/mvebu.c
+++ b/drivers/clocksource/mvebu.c
@@ -19,24 +19,27 @@
 #include <linux/clk.h>
 #include <io.h>
 
-#define TIMER_CTRL_OFF          0x0000
-#define  TIMER0_EN               0x0001
-#define  TIMER0_RELOAD_EN        0x0002
-#define  TIMER0_25MHZ            0x0800
-#define  TIMER0_DIV(div)         ((div) << 19)
-#define  TIMER1_EN               0x0004
-#define  TIMER1_RELOAD_EN        0x0008
-#define  TIMER1_25MHZ            0x1000
-#define  TIMER1_DIV(div)         ((div) << 22)
-#define TIMER_EVENTS_STATUS     0x0004
-#define  TIMER0_CLR_MASK         (~0x1)
-#define  TIMER1_CLR_MASK         (~0x100)
-#define TIMER0_RELOAD_OFF       0x0010
-#define TIMER0_VAL_OFF          0x0014
-#define TIMER1_RELOAD_OFF       0x0018
-#define TIMER1_VAL_OFF          0x001c
-
-#define TIMER_DIVIDER_SHIFT     5
+#define TIMER_CTRL_OFF		0x0000
+#define  TIMER0_EN		BIT(0)
+#define  TIMER0_RELOAD_EN	BIT(1)
+#define  TIMER0_25MHZ		BIT(11)
+#define  TIMER0_DIV(div)	((div) << 19)
+#define  TIMER0_DIV_MASK	TIMER0_DIV(0x7)
+#define  TIMER1_EN		BIT(2)
+#define  TIMER1_RELOAD_EN	BIT(3)
+#define  TIMER1_25MHZ		BIT(12)
+#define  TIMER1_DIV(div)	((div) << 22)
+#define  TIMER1_DIV_MASK	TIMER1_DIV(0x7)
+#define TIMER_EVENTS_STATUS	0x0004
+#define  TIMER0_CLR_MASK	(~BIT(0))
+#define  TIMER1_CLR_MASK	(~BIT(9))
+#define TIMER0_RELOAD_OFF	0x0010
+#define TIMER0_VAL_OFF		0x0014
+#define TIMER1_RELOAD_OFF	0x0018
+#define TIMER1_VAL_OFF		0x001c
+
+#define TIMER_DIVIDER_SHIFT	5
+#define TIMER_DIVIDER		BIT(TIMER_DIVIDER_SHIFT)
 
 static __iomem void *timer_base;
 
@@ -53,24 +56,35 @@ static struct clocksource cs = {
 
 static int mvebu_timer_probe(struct device_d *dev)
 {
-	struct clk *tclk;
-	u32 val;
+	struct clk *clk;
+	u32 rate, div, val;
 
 	timer_base = dev_request_mem_region(dev, 0);
-	tclk = clk_get(dev, NULL);
 
 	val = __raw_readl(timer_base + TIMER_CTRL_OFF);
-	val &= ~TIMER0_25MHZ;
+	val &= ~(TIMER0_25MHZ | TIMER0_DIV_MASK);
+	if (of_device_is_compatible(dev->device_node,
+				    "marvell,armada-370-timer")) {
+		clk = clk_get(dev, NULL);
+		div = TIMER_DIVIDER;
+		val |= TIMER0_DIV(TIMER_DIVIDER_SHIFT);
+		rate = clk_get_rate(clk) / TIMER_DIVIDER;
+	} else {
+		clk = clk_get(dev, "fixed");
+		div = 1;
+		val |= TIMER0_25MHZ;
+		rate = clk_get_rate(clk);
+	}
 	__raw_writel(val, timer_base + TIMER_CTRL_OFF);
 
 	__raw_writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
 	__raw_writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
 
 	val = __raw_readl(timer_base + TIMER_CTRL_OFF);
-	val |= TIMER0_EN | TIMER0_RELOAD_EN | TIMER0_DIV(TIMER_DIVIDER_SHIFT);
+	val |= TIMER0_EN | TIMER0_RELOAD_EN;
 	__raw_writel(val, timer_base + TIMER_CTRL_OFF);
 
-	cs.mult = clocksource_hz2mult(clk_get_rate(tclk), cs.shift);
+	cs.mult = clocksource_hz2mult(rate, cs.shift);
 
 	init_clock(&cs);
 
@@ -78,7 +92,8 @@ static int mvebu_timer_probe(struct device_d *dev)
 }
 
 static struct of_device_id mvebu_timer_dt_ids[] = {
-	{ .compatible = "marvell,armada-370-xp-timer", },
+	{ .compatible = "marvell,armada-370-timer", },
+	{ .compatible = "marvell,armada-xp-timer", },
 	{ }
 };
 
-- 
2.0.0


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Re: [PATCH 0/7] Marvell MVEBU assorted fixes and cleanup

[Sascha Hauer]

On Mon, Jun 23, 2014 at 10:10:28PM +0200, Sebastian Hesselbarth wrote:
> This patch set comprises cleanup and some fixes for outstanding bugs in
> Marvell MVEBU SoC support.
> 
> Patch 1 adds default model and hostname for Dove SoCs.
> 
> Patch 2 consolidates TEXT_BASE from per-board to per-SoC selection.
> 
> Patch 3 removes an unused include.
> 
> Patch 4 consolidates lowlevel code from two different files to a single file.
> 
> Patch 5 fixes typos in Armada 370 TCLK frequencies.
> 
> Patch 6 adds a 25MHz reference clock to Armada XP SoC init.
> 
> Patch 7 splits timer initialization for Armada 370 and XP, which uses a
> fixed 25MHz reference clock instead of divided TCLK.
> 
> The patches are based on today's next.
> 
> A branch based on *unstable* next is available at:
> https://github.com/shesselba/barebox-dove.git mvebu/cleanup

Applied, thanks

Sascha

> 
> Sebastian Hesselbarth (7):
>   ARM: mvebu: set model and default hostname for Dove
>   ARM: mvebu: set default TEXT_BASE by SoC
>   ARM: mvebu: delete unused mach/mvebu.h
>   ARM: mvebu: move lowlevel code to lowlevel.c
>   clk: mvebu: fix Armada 370 TCLK frequencies
>   ARM: mvebu: add 25MHz fixed clock for Armada XP
>   clocksource: mvebu: split initialization for Armada 370/XP
> 
>  arch/arm/mach-mvebu/Kconfig              | 10 ++---
>  arch/arm/mach-mvebu/Makefile             |  2 +-
>  arch/arm/mach-mvebu/armada-370-xp.c      |  5 +++
>  arch/arm/mach-mvebu/common.c             | 40 --------------------
>  arch/arm/mach-mvebu/dove.c               |  3 ++
>  arch/arm/mach-mvebu/include/mach/mvebu.h | 22 -----------
>  arch/arm/mach-mvebu/lowlevel.c           | 37 ++++++++++++++++++
>  drivers/clk/mvebu/armada-370.c           |  4 +-
>  drivers/clocksource/mvebu.c              | 65 ++++++++++++++++++++------------
>  9 files changed, 92 insertions(+), 96 deletions(-)
>  delete mode 100644 arch/arm/mach-mvebu/include/mach/mvebu.h
> 
> ---
> Cc: barebox@lists.infradead.org
> -- 
> 2.0.0
> 
> 
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> 

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