From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 6/7] mtd: omap gpmc: fix bch8 nand-ecc-opt property
Date: Fri, 1 Aug 2014 15:29:14 +0200 [thread overview]
Message-ID: <1406899755-8288-7-git-send-email-s.hauer@pengutronix.de> (raw)
In-Reply-To: <1406899755-8288-1-git-send-email-s.hauer@pengutronix.de>
We interpret the ECC option "bch8" as OMAP_ECC_BCH8_CODE_HW, but the
Kernel uses OMAP_ECC_BCH8_CODE_HW_ROMCODE in this case instead. To make
the interpretation of the ti,nand-ecc-opt property compatible to the
Kernel we have to use OMAP_ECC_BCH8_CODE_HW_ROMCODE for "bch8"
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/bus/omap-gpmc.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/bus/omap-gpmc.c b/drivers/bus/omap-gpmc.c
index ad21af2..d7b02cf 100644
--- a/drivers/bus/omap-gpmc.c
+++ b/drivers/bus/omap-gpmc.c
@@ -382,9 +382,6 @@ static struct dt_eccmode modes[] = {
.mode = OMAP_ECC_BCH4_CODE_HW,
}, {
.name = "bch8",
- .mode = OMAP_ECC_BCH8_CODE_HW,
- }, {
- .name = "bch8-romcode",
.mode = OMAP_ECC_BCH8_CODE_HW_ROMCODE,
},
};
--
2.0.1
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next prev parent reply other threads:[~2014-08-01 13:29 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-01 13:29 [PATCH] Phytec phyCORE AM335x updates Sascha Hauer
2014-08-01 13:29 ` [PATCH 1/7] ARM: AM33xx: Add SDRAM size detection Sascha Hauer
2014-08-01 13:29 ` [PATCH 2/7] ARM: phyCORE-am335x: read back SDRAM controller settings Sascha Hauer
2014-08-01 13:29 ` [PATCH 3/7] ARM: phyCORE-am335x: Add support for more SDRAM configurations Sascha Hauer
2014-08-01 13:29 ` [PATCH 4/7] mtd: omap gpmc: fix ecc bytes/size Sascha Hauer
2014-08-01 13:29 ` [PATCH 5/7] mtd: omap gpmc: reserve 14 byte/subpage for ECC in BCH8 romcode Sascha Hauer
2014-08-01 13:29 ` Sascha Hauer [this message]
2014-08-01 13:29 ` [PATCH 7/7] ARM: AM3355x: Update defconfig Sascha Hauer
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