mail archive of the barebox mailing list
 help / color / mirror / Atom feed
From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 1/5] ARM: mvebu: Add common reset_cpu function
Date: Mon, 15 Sep 2014 09:41:09 +0200	[thread overview]
Message-ID: <1410766873-4393-2-git-send-email-s.hauer@pengutronix.de> (raw)
In-Reply-To: <1410766873-4393-1-git-send-email-s.hauer@pengutronix.de>

mvebu has a reset_cpu function per SoC this does not work when multiple
SoCs are selected, so add a common reset_cpu function which calls into
the SoC specific ones.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-mvebu/armada-370-xp.c       | 19 ++++++++++---------
 arch/arm/mach-mvebu/common.c              | 15 ++++++++++++++-
 arch/arm/mach-mvebu/dove.c                | 21 +++++++++++----------
 arch/arm/mach-mvebu/include/mach/common.h |  1 +
 arch/arm/mach-mvebu/kirkwood.c            | 19 ++++++++++---------
 5 files changed, 46 insertions(+), 29 deletions(-)

diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index f2b991e..6251100 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -44,11 +44,21 @@ static inline void armada_370_xp_memory_find(unsigned long *phys_base,
 	}
 }
 
+static void __noreturn armada_370_xp_reset_cpu(unsigned long addr)
+{
+	writel(0x1, ARMADA_370_XP_SYSCTL_BASE + 0x60);
+	writel(0x1, ARMADA_370_XP_SYSCTL_BASE + 0x64);
+	while (1)
+		;
+}
+
 static int armada_370_xp_init_soc(void)
 {
 	unsigned long phys_base, phys_size;
 	u32 reg;
 
+	mvebu_set_reset(armada_370_xp_reset_cpu);
+
 	barebox_set_model("Marvell Armada 370/XP");
 	barebox_set_hostname("armada");
 
@@ -65,12 +75,3 @@ static int armada_370_xp_init_soc(void)
 	return 0;
 }
 core_initcall(armada_370_xp_init_soc);
-
-void __noreturn reset_cpu(unsigned long addr)
-{
-	writel(0x1, ARMADA_370_XP_SYSCTL_BASE + 0x60);
-	writel(0x1, ARMADA_370_XP_SYSCTL_BASE + 0x64);
-	while (1)
-		;
-}
-EXPORT_SYMBOL(reset_cpu);
diff --git a/arch/arm/mach-mvebu/common.c b/arch/arm/mach-mvebu/common.c
index ac4b332..5c3ac14 100644
--- a/arch/arm/mach-mvebu/common.c
+++ b/arch/arm/mach-mvebu/common.c
@@ -21,6 +21,7 @@
 #include <of.h>
 #include <of_address.h>
 #include <linux/clk.h>
+#include <mach/common.h>
 
 /*
  * Marvell MVEBU SoC id and revision can be read from any PCIe
@@ -137,4 +138,16 @@ static int mvebu_memory_of_fixup(struct device_node *root, void *context)
 static int mvebu_memory_fixup_register(void) {
 	return of_register_fixup(mvebu_memory_of_fixup, NULL);
 }
-pure_initcall(mvebu_memory_fixup_register);
+
+static __noreturn void (*mvebu_reset_cpu)(unsigned long addr);
+
+void __noreturn reset_cpu(unsigned long addr)
+{
+	mvebu_reset_cpu(addr);
+}
+EXPORT_SYMBOL(reset_cpu);
+
+void mvebu_set_reset(void __noreturn (*reset)(unsigned long addr))
+{
+	mvebu_reset_cpu = reset;
+}
diff --git a/arch/arm/mach-mvebu/dove.c b/arch/arm/mach-mvebu/dove.c
index 69c6436..17cee0b 100644
--- a/arch/arm/mach-mvebu/dove.c
+++ b/arch/arm/mach-mvebu/dove.c
@@ -68,10 +68,21 @@ static inline void dove_memory_find(unsigned long *phys_base,
 	}
 }
 
+static void __noreturn dove_reset_cpu(unsigned long addr)
+{
+	/* enable and assert RSTOUTn */
+	writel(SOFT_RESET_OUT_EN, DOVE_BRIDGE_BASE + BRIDGE_RSTOUT_MASK);
+	writel(SOFT_RESET_EN, DOVE_BRIDGE_BASE + BRIDGE_SYS_SOFT_RESET);
+	while (1)
+		;
+}
+
 static int dove_init_soc(void)
 {
 	unsigned long phys_base, phys_size;
 
+	mvebu_set_reset(dove_reset_cpu);
+
 	barebox_set_model("Marvell Dove");
 	barebox_set_hostname("dove");
 
@@ -85,13 +96,3 @@ static int dove_init_soc(void)
 	return 0;
 }
 core_initcall(dove_init_soc);
-
-void __noreturn reset_cpu(unsigned long addr)
-{
-	/* enable and assert RSTOUTn */
-	writel(SOFT_RESET_OUT_EN, DOVE_BRIDGE_BASE + BRIDGE_RSTOUT_MASK);
-	writel(SOFT_RESET_EN, DOVE_BRIDGE_BASE + BRIDGE_SYS_SOFT_RESET);
-	while (1)
-		;
-}
-EXPORT_SYMBOL(reset_cpu);
diff --git a/arch/arm/mach-mvebu/include/mach/common.h b/arch/arm/mach-mvebu/include/mach/common.h
index 9f6118e..30862e0 100644
--- a/arch/arm/mach-mvebu/include/mach/common.h
+++ b/arch/arm/mach-mvebu/include/mach/common.h
@@ -21,5 +21,6 @@
 #define MVEBU_REMAP_INT_REG_BASE	0xf1000000
 
 void mvebu_set_memory(u64 phys_base, u64 phys_size);
+void mvebu_set_reset(void __noreturn (*reset)(unsigned long addr));
 
 #endif
diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c
index c114bdb..7c0526b 100644
--- a/arch/arm/mach-mvebu/kirkwood.c
+++ b/arch/arm/mach-mvebu/kirkwood.c
@@ -43,10 +43,20 @@ static inline void kirkwood_memory_find(unsigned long *phys_base,
 	}
 }
 
+static void __noreturn kirkwood_reset_cpu(unsigned long addr)
+{
+	writel(SOFT_RESET_OUT_EN, KIRKWOOD_BRIDGE_BASE + BRIDGE_RSTOUT_MASK);
+	writel(SOFT_RESET_EN, KIRKWOOD_BRIDGE_BASE + BRIDGE_SYS_SOFT_RESET);
+	for(;;)
+		;
+}
+
 static int kirkwood_init_soc(void)
 {
 	unsigned long phys_base, phys_size;
 
+	mvebu_set_reset(kirkwood_reset_cpu);
+
 	barebox_set_model("Marvell Kirkwood");
 	barebox_set_hostname("kirkwood");
 
@@ -58,12 +68,3 @@ static int kirkwood_init_soc(void)
 	return 0;
 }
 core_initcall(kirkwood_init_soc);
-
-void __noreturn reset_cpu(unsigned long addr)
-{
-	writel(SOFT_RESET_OUT_EN, KIRKWOOD_BRIDGE_BASE + BRIDGE_RSTOUT_MASK);
-	writel(SOFT_RESET_EN, KIRKWOOD_BRIDGE_BASE + BRIDGE_SYS_SOFT_RESET);
-	for(;;)
-		;
-}
-EXPORT_SYMBOL(reset_cpu);
-- 
2.1.0


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

  reply	other threads:[~2014-09-15  7:41 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-15  7:41 mvebu multi SoC support Sascha Hauer
2014-09-15  7:41 ` Sascha Hauer [this message]
2014-09-16 19:17   ` [PATCH 1/5] ARM: mvebu: Add common reset_cpu function Sebastian Hesselbarth
2014-09-17  6:32     ` Sascha Hauer
2014-09-15  7:41 ` [PATCH 2/5] ARM: mvebu: Simplify memory init order Sascha Hauer
2014-09-16 20:05   ` Sebastian Hesselbarth
2014-09-17  6:45     ` Sascha Hauer
2014-09-17  7:19       ` Sebastian Hesselbarth
2014-09-17  7:29         ` Sascha Hauer
2014-09-15  7:41 ` [PATCH 3/5] ARM: mvebu: Check for correct SoC in of_fixup callback Sascha Hauer
2014-09-15  7:41 ` [PATCH 4/5] ARM: mvebu: Allow multiple SoCs Sascha Hauer
2014-09-15  8:00   ` Sebastian Hesselbarth
2014-09-15  9:13     ` Sascha Hauer
2014-09-15 21:12       ` Sebastian Hesselbarth
2014-09-16  6:00         ` Sascha Hauer
2014-09-15  7:41 ` [PATCH 5/5] ARM: Add mvebu_defconfig Sascha Hauer
2014-09-15 21:15   ` Sebastian Hesselbarth
2014-09-16  6:05     ` Sascha Hauer
2014-09-15  8:09 ` mvebu multi SoC support Ezequiel Garcia

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1410766873-4393-2-git-send-email-s.hauer@pengutronix.de \
    --to=s.hauer@pengutronix.de \
    --cc=barebox@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox