From: Lucas Stach <dev@lynxeye.de>
To: barebox@lists.infradead.org
Subject: [PATCH 2/2] MIPS: malta: fix pci IO resource assignment
Date: Wed, 1 Oct 2014 21:14:15 +0200 [thread overview]
Message-ID: <1412190855-14289-3-git-send-email-dev@lynxeye.de> (raw)
In-Reply-To: <1412190855-14289-1-git-send-email-dev@lynxeye.de>
Does the same thing as the Linux kernel now.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
I tested this with qemu-malta and at least barebox is now
again able to enumerate all 4 PCI devices.
---
arch/mips/mach-malta/pci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/mips/mach-malta/pci.c b/arch/mips/mach-malta/pci.c
index 9035175..47c0e22 100644
--- a/arch/mips/mach-malta/pci.c
+++ b/arch/mips/mach-malta/pci.c
@@ -151,7 +151,7 @@ static struct pci_controller gt64120_controller = {
static int pcibios_init(void)
{
- resource_size_t start, end, map, start1, end1, map1, mask, res_end;
+ resource_size_t start, end, map, start1, end1, map1, mask;
/*
* Due to a bug in the Galileo system controller, we need
@@ -207,7 +207,7 @@ static int pcibios_init(void)
BUG_ON((start & GT_PCI_HD_MSK) != (map & GT_PCI_HD_MSK) &&
mask != ~((mask & -mask) - 1));
gt64120_io_resource.start = map & mask;
- res_end = (map & mask) | ~mask;
+ gt64120_io_resource.end = (map & mask) | ~mask;
gt64120_controller.io_offset = 0;
/* Addresses are 36-bit, so do shifts in the destinations. */
gt64120_io_resource.start <<= GT_PCI_DCRM_SHF;
--
1.9.3
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prev parent reply other threads:[~2014-10-01 19:08 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-01 19:14 [PATCH 0/2] Increamental fixes for the PCI series Lucas Stach
2014-10-01 19:14 ` [PATCH 1/2] fixup! of: import pci range parser from linux Lucas Stach
2014-10-01 19:14 ` Lucas Stach [this message]
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