* [PATCH] clock.c: fix whitespaces
@ 2014-10-07 15:42 Antony Pavlov
2014-10-07 15:42 ` [PATCH] pci: split out device init Antony Pavlov
2014-10-07 15:42 ` [PATCH] clock.c: fix whitespaces Antony Pavlov
0 siblings, 2 replies; 5+ messages in thread
From: Antony Pavlov @ 2014-10-07 15:42 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
common/clock.c | 94 +++++++++++++++++++++++++++++-----------------------------
1 file changed, 47 insertions(+), 47 deletions(-)
diff --git a/common/clock.c b/common/clock.c
index 76ce881..2ee81da 100644
--- a/common/clock.c
+++ b/common/clock.c
@@ -41,25 +41,25 @@ uint64_t time_beginning;
uint64_t get_time_ns(void)
{
struct clocksource *cs = current_clock;
- uint64_t cycle_now, cycle_delta;
- uint64_t ns_offset;
+ uint64_t cycle_now, cycle_delta;
+ uint64_t ns_offset;
if (!cs)
return 0;
- /* read clocksource: */
+ /* read clocksource: */
cycle_now = cs->read() & cs->mask;
- /* calculate the delta since the last call: */
- cycle_delta = (cycle_now - cs->cycle_last) & cs->mask;
+ /* calculate the delta since the last call: */
+ cycle_delta = (cycle_now - cs->cycle_last) & cs->mask;
- /* convert to nanoseconds: */
- ns_offset = cyc2ns(cs, cycle_delta);
+ /* convert to nanoseconds: */
+ ns_offset = cyc2ns(cs, cycle_delta);
cs->cycle_last = cycle_now;
time_ns += ns_offset;
- return time_ns;
+ return time_ns;
}
EXPORT_SYMBOL(get_time_ns);
@@ -89,32 +89,32 @@ EXPORT_SYMBOL(get_time_ns);
void clocks_calc_mult_shift(uint32_t *mult, uint32_t *shift, uint32_t from, uint32_t to, uint32_t maxsec)
{
- uint64_t tmp;
- uint32_t sft, sftacc = 32;
-
- /*
- * Calculate the shift factor which is limiting the conversion
- * range:
- */
- tmp = ((uint64_t)maxsec * from) >> 32;
- while (tmp) {
- tmp >>=1;
- sftacc--;
- }
-
- /*
- * Find the conversion shift/mult pair which has the best
- * accuracy and fits the maxsec conversion range:
- */
- for (sft = 32; sft > 0; sft--) {
- tmp = (uint64_t) to << sft;
- tmp += from / 2;
- do_div(tmp, from);
- if ((tmp >> sftacc) == 0)
- break;
- }
- *mult = tmp;
- *shift = sft;
+ uint64_t tmp;
+ uint32_t sft, sftacc = 32;
+
+ /*
+ * Calculate the shift factor which is limiting the conversion
+ * range:
+ */
+ tmp = ((uint64_t)maxsec * from) >> 32;
+ while (tmp) {
+ tmp >>= 1;
+ sftacc--;
+ }
+
+ /*
+ * Find the conversion shift/mult pair which has the best
+ * accuracy and fits the maxsec conversion range:
+ */
+ for (sft = 32; sft > 0; sft--) {
+ tmp = (uint64_t) to << sft;
+ tmp += from / 2;
+ do_div(tmp, from);
+ if ((tmp >> sftacc) == 0)
+ break;
+ }
+ *mult = tmp;
+ *shift = sft;
}
@@ -129,19 +129,19 @@ void clocks_calc_mult_shift(uint32_t *mult, uint32_t *shift, uint32_t from, uint
*/
uint32_t clocksource_hz2mult(uint32_t hz, uint32_t shift_constant)
{
- /* hz = cyc/(Billion ns)
- * mult/2^shift = ns/cyc
- * mult = ns/cyc * 2^shift
- * mult = 1Billion/hz * 2^shift
- * mult = 1000000000 * 2^shift / hz
- * mult = (1000000000<<shift) / hz
- */
- uint64_t tmp = ((uint64_t)1000000000) << shift_constant;
-
- tmp += hz/2; /* round for do_div */
- do_div(tmp, hz);
-
- return (uint32_t)tmp;
+ /* hz = cyc/(Billion ns)
+ * mult/2^shift = ns/cyc
+ * mult = ns/cyc * 2^shift
+ * mult = 1Billion/hz * 2^shift
+ * mult = 1000000000 * 2^shift / hz
+ * mult = (1000000000<<shift) / hz
+ */
+ uint64_t tmp = ((uint64_t)1000000000) << shift_constant;
+
+ tmp += hz/2; /* round for do_div */
+ do_div(tmp, hz);
+
+ return (uint32_t)tmp;
}
int is_timeout_non_interruptible(uint64_t start_ns, uint64_t time_offset_ns)
--
2.1.1
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] pci: split out device init
2014-10-07 15:42 [PATCH] clock.c: fix whitespaces Antony Pavlov
@ 2014-10-07 15:42 ` Antony Pavlov
2014-10-07 15:45 ` Antony Pavlov
2014-10-07 15:42 ` [PATCH] clock.c: fix whitespaces Antony Pavlov
1 sibling, 1 reply; 5+ messages in thread
From: Antony Pavlov @ 2014-10-07 15:42 UTC (permalink / raw)
To: barebox
From: Lucas Stach <dev@lynxeye.de>
To make it reusable and the code more readable.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
drivers/pci/pci.c | 137 +++++++++++++++++++++++++++++-------------------------
1 file changed, 74 insertions(+), 63 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index a1b7680..ef998dc 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -12,6 +12,8 @@ static struct pci_controller *hose_head, **hose_tail = &hose_head;
LIST_HEAD(pci_root_buses);
EXPORT_SYMBOL(pci_root_buses);
static u8 bus_index;
+static resource_size_t last_mem;
+static resource_size_t last_io;
static struct pci_bus *pci_alloc_bus(void)
{
@@ -45,6 +47,10 @@ void register_pci_controller(struct pci_controller *hose)
if (hose->set_busno)
hose->set_busno(hose, bus->number);
+
+ last_mem = bus->resource[0]->start;
+ last_io = bus->resource[1]->start;
+
pci_scan_bus(bus);
list_add_tail(&bus->node, &pci_root_buses);
@@ -111,27 +117,80 @@ static struct pci_dev *alloc_pci_dev(void)
return dev;
}
+static void setup_device(struct pci_dev *dev, int max_bar)
+{
+ int bar, size;
+ u32 mask;
+ u8 cmd;
+
+ pci_read_config_byte(dev, PCI_COMMAND, &cmd);
+ pci_write_config_byte(dev, PCI_COMMAND,
+ cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
+
+ for (bar = 0; bar < max_bar; bar++) {
+ resource_size_t last_addr;
+
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, 0xfffffffe);
+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, &mask);
+
+ if (mask == 0 || mask == 0xffffffff) {
+ DBG(" PCI: pbar%d set bad mask\n", bar);
+ continue;
+ }
+
+ if (mask & 0x01) { /* IO */
+ size = -(mask & 0xfffffffe);
+ DBG(" PCI: pbar%d: mask=%08x io %d bytes\n", bar, mask, size);
+ if (last_mem + size > dev->bus->resource[0]->end) {
+ DBG("BAR does not fit within bus IO res\n");
+ return;
+ }
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, last_io);
+ dev->resource[bar].flags = IORESOURCE_IO;
+ last_addr = last_io;
+ last_io += size;
+ } else { /* MEM */
+ size = -(mask & 0xfffffff0);
+ DBG(" PCI: pbar%d: mask=%08x memory %d bytes\n", bar, mask, size);
+ if (last_mem + size > dev->bus->resource[0]->end) {
+ DBG("BAR does not fit within bus mem res\n");
+ return;
+ }
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, last_mem);
+ dev->resource[bar].flags = IORESOURCE_MEM;
+ last_addr = last_mem;
+ last_mem += size;
+
+ if ((mask & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
+ PCI_BASE_ADDRESS_MEM_TYPE_64) {
+ dev->resource[bar].flags |= IORESOURCE_MEM_64;
+ pci_write_config_dword(dev,
+ PCI_BASE_ADDRESS_1 + bar * 4, 0);
+ }
+ }
+
+ dev->resource[bar].start = last_addr;
+ dev->resource[bar].end = last_addr + size - 1;
+ if (dev->resource[bar].flags & IORESOURCE_MEM_64)
+ bar++;
+ }
+
+ pci_write_config_byte(dev, PCI_COMMAND, cmd);
+ list_add_tail(&dev->bus_list, &dev->bus->devices);
+ pci_register_device(dev);
+}
+
unsigned int pci_scan_bus(struct pci_bus *bus)
{
+ struct pci_dev *dev;
unsigned int devfn, l, max, class;
unsigned char cmd, tmp, hdr_type, is_multi = 0;
- struct pci_dev *dev;
- resource_size_t last_mem;
- resource_size_t last_io;
-
- /* FIXME: use res_start() */
- last_mem = bus->resource[0]->start;
- last_io = bus->resource[1]->start;
DBG("pci_scan_bus for bus %d\n", bus->number);
DBG(" last_io = 0x%08x, last_mem = 0x%08x\n", last_io, last_mem);
max = bus->secondary;
for (devfn = 0; devfn < 0xff; ++devfn) {
- int bar;
- u32 old_bar, mask;
- int size;
-
if (PCI_FUNC(devfn) && !is_multi) {
/* not a multi-function device */
continue;
@@ -169,6 +228,8 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
dev->hdr_type = hdr_type;
DBG("PCI: class = %08x, hdr_type = %08x\n", class, hdr_type);
+ DBG("PCI: %02x:%02x [%04x:%04x]\n", bus->number, dev->devfn,
+ dev->vendor, dev->device);
switch (hdr_type & 0x7f) { /* header type */
case PCI_HEADER_TYPE_NORMAL: /* standard header */
@@ -181,6 +242,8 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
*/
pci_read_config_dword(dev, PCI_ROM_ADDRESS, &l);
dev->rom_address = (l == 0xffffffff) ? 0 : l;
+
+ setup_device(dev, 6);
break;
default: /* unknown header */
bad:
@@ -189,62 +252,10 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
continue;
}
- DBG("PCI: %02x:%02x [%04x/%04x]\n", bus->number, dev->devfn, dev->vendor, dev->device);
-
if (class == PCI_CLASS_BRIDGE_HOST) {
DBG("PCI: skip pci host bridge\n");
continue;
}
-
- pci_read_config_byte(dev, PCI_COMMAND, &cmd);
- pci_write_config_byte(dev, PCI_COMMAND,
- cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
-
- for (bar = 0; bar < 6; bar++) {
- resource_size_t last_addr;
-
- pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, &old_bar);
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, 0xfffffffe);
- pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, &mask);
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, old_bar);
-
- if (mask == 0 || mask == 0xffffffff) {
- DBG(" PCI: pbar%d set bad mask\n", bar);
- continue;
- }
-
- if (mask & 0x01) { /* IO */
- size = -(mask & 0xfffffffe);
- DBG(" PCI: pbar%d: mask=%08x io %d bytes\n", bar, mask, size);
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, last_io);
- dev->resource[bar].flags = IORESOURCE_IO;
- last_addr = last_io;
- last_io += size;
- } else { /* MEM */
- size = -(mask & 0xfffffff0);
- DBG(" PCI: pbar%d: mask=%08x memory %d bytes\n", bar, mask, size);
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, last_mem);
- dev->resource[bar].flags = IORESOURCE_MEM;
- last_addr = last_mem;
- last_mem += size;
-
- if ((mask & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
- PCI_BASE_ADDRESS_MEM_TYPE_64) {
- dev->resource[bar].flags |= IORESOURCE_MEM_64;
- pci_write_config_dword(dev,
- PCI_BASE_ADDRESS_1 + bar * 4, 0);
- }
- }
-
- dev->resource[bar].start = last_addr;
- dev->resource[bar].end = last_addr + size - 1;
- if (dev->resource[bar].flags & IORESOURCE_MEM_64)
- bar++;
- }
-
- pci_write_config_byte(dev, PCI_COMMAND, cmd);
- list_add_tail(&dev->bus_list, &bus->devices);
- pci_register_device(dev);
}
/*
--
2.1.1
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] clock.c: fix whitespaces
2014-10-07 15:42 [PATCH] clock.c: fix whitespaces Antony Pavlov
2014-10-07 15:42 ` [PATCH] pci: split out device init Antony Pavlov
@ 2014-10-07 15:42 ` Antony Pavlov
2014-10-08 9:13 ` Sascha Hauer
1 sibling, 1 reply; 5+ messages in thread
From: Antony Pavlov @ 2014-10-07 15:42 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
common/clock.c | 94 +++++++++++++++++++++++++++++-----------------------------
1 file changed, 47 insertions(+), 47 deletions(-)
diff --git a/common/clock.c b/common/clock.c
index 76ce881..2ee81da 100644
--- a/common/clock.c
+++ b/common/clock.c
@@ -41,25 +41,25 @@ uint64_t time_beginning;
uint64_t get_time_ns(void)
{
struct clocksource *cs = current_clock;
- uint64_t cycle_now, cycle_delta;
- uint64_t ns_offset;
+ uint64_t cycle_now, cycle_delta;
+ uint64_t ns_offset;
if (!cs)
return 0;
- /* read clocksource: */
+ /* read clocksource: */
cycle_now = cs->read() & cs->mask;
- /* calculate the delta since the last call: */
- cycle_delta = (cycle_now - cs->cycle_last) & cs->mask;
+ /* calculate the delta since the last call: */
+ cycle_delta = (cycle_now - cs->cycle_last) & cs->mask;
- /* convert to nanoseconds: */
- ns_offset = cyc2ns(cs, cycle_delta);
+ /* convert to nanoseconds: */
+ ns_offset = cyc2ns(cs, cycle_delta);
cs->cycle_last = cycle_now;
time_ns += ns_offset;
- return time_ns;
+ return time_ns;
}
EXPORT_SYMBOL(get_time_ns);
@@ -89,32 +89,32 @@ EXPORT_SYMBOL(get_time_ns);
void clocks_calc_mult_shift(uint32_t *mult, uint32_t *shift, uint32_t from, uint32_t to, uint32_t maxsec)
{
- uint64_t tmp;
- uint32_t sft, sftacc = 32;
-
- /*
- * Calculate the shift factor which is limiting the conversion
- * range:
- */
- tmp = ((uint64_t)maxsec * from) >> 32;
- while (tmp) {
- tmp >>=1;
- sftacc--;
- }
-
- /*
- * Find the conversion shift/mult pair which has the best
- * accuracy and fits the maxsec conversion range:
- */
- for (sft = 32; sft > 0; sft--) {
- tmp = (uint64_t) to << sft;
- tmp += from / 2;
- do_div(tmp, from);
- if ((tmp >> sftacc) == 0)
- break;
- }
- *mult = tmp;
- *shift = sft;
+ uint64_t tmp;
+ uint32_t sft, sftacc = 32;
+
+ /*
+ * Calculate the shift factor which is limiting the conversion
+ * range:
+ */
+ tmp = ((uint64_t)maxsec * from) >> 32;
+ while (tmp) {
+ tmp >>= 1;
+ sftacc--;
+ }
+
+ /*
+ * Find the conversion shift/mult pair which has the best
+ * accuracy and fits the maxsec conversion range:
+ */
+ for (sft = 32; sft > 0; sft--) {
+ tmp = (uint64_t) to << sft;
+ tmp += from / 2;
+ do_div(tmp, from);
+ if ((tmp >> sftacc) == 0)
+ break;
+ }
+ *mult = tmp;
+ *shift = sft;
}
@@ -129,19 +129,19 @@ void clocks_calc_mult_shift(uint32_t *mult, uint32_t *shift, uint32_t from, uint
*/
uint32_t clocksource_hz2mult(uint32_t hz, uint32_t shift_constant)
{
- /* hz = cyc/(Billion ns)
- * mult/2^shift = ns/cyc
- * mult = ns/cyc * 2^shift
- * mult = 1Billion/hz * 2^shift
- * mult = 1000000000 * 2^shift / hz
- * mult = (1000000000<<shift) / hz
- */
- uint64_t tmp = ((uint64_t)1000000000) << shift_constant;
-
- tmp += hz/2; /* round for do_div */
- do_div(tmp, hz);
-
- return (uint32_t)tmp;
+ /* hz = cyc/(Billion ns)
+ * mult/2^shift = ns/cyc
+ * mult = ns/cyc * 2^shift
+ * mult = 1Billion/hz * 2^shift
+ * mult = 1000000000 * 2^shift / hz
+ * mult = (1000000000<<shift) / hz
+ */
+ uint64_t tmp = ((uint64_t)1000000000) << shift_constant;
+
+ tmp += hz/2; /* round for do_div */
+ do_div(tmp, hz);
+
+ return (uint32_t)tmp;
}
int is_timeout_non_interruptible(uint64_t start_ns, uint64_t time_offset_ns)
--
2.1.1
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] pci: split out device init
2014-10-07 15:42 ` [PATCH] pci: split out device init Antony Pavlov
@ 2014-10-07 15:45 ` Antony Pavlov
0 siblings, 0 replies; 5+ messages in thread
From: Antony Pavlov @ 2014-10-07 15:45 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox
On Tue, 7 Oct 2014 19:42:06 +0400
Antony Pavlov <antonynpavlov@gmail.com> wrote:
Please ignore this message.
Sorry!
> From: Lucas Stach <dev@lynxeye.de>
>
> To make it reusable and the code more readable.
>
> Signed-off-by: Lucas Stach <dev@lynxeye.de>
> ---
> drivers/pci/pci.c | 137 +++++++++++++++++++++++++++++-------------------------
> 1 file changed, 74 insertions(+), 63 deletions(-)
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index a1b7680..ef998dc 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -12,6 +12,8 @@ static struct pci_controller *hose_head, **hose_tail = &hose_head;
> LIST_HEAD(pci_root_buses);
> EXPORT_SYMBOL(pci_root_buses);
> static u8 bus_index;
> +static resource_size_t last_mem;
> +static resource_size_t last_io;
>
> static struct pci_bus *pci_alloc_bus(void)
> {
> @@ -45,6 +47,10 @@ void register_pci_controller(struct pci_controller *hose)
>
> if (hose->set_busno)
> hose->set_busno(hose, bus->number);
> +
> + last_mem = bus->resource[0]->start;
> + last_io = bus->resource[1]->start;
> +
> pci_scan_bus(bus);
>
> list_add_tail(&bus->node, &pci_root_buses);
> @@ -111,27 +117,80 @@ static struct pci_dev *alloc_pci_dev(void)
> return dev;
> }
>
> +static void setup_device(struct pci_dev *dev, int max_bar)
> +{
> + int bar, size;
> + u32 mask;
> + u8 cmd;
> +
> + pci_read_config_byte(dev, PCI_COMMAND, &cmd);
> + pci_write_config_byte(dev, PCI_COMMAND,
> + cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
> +
> + for (bar = 0; bar < max_bar; bar++) {
> + resource_size_t last_addr;
> +
> + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, 0xfffffffe);
> + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, &mask);
> +
> + if (mask == 0 || mask == 0xffffffff) {
> + DBG(" PCI: pbar%d set bad mask\n", bar);
> + continue;
> + }
> +
> + if (mask & 0x01) { /* IO */
> + size = -(mask & 0xfffffffe);
> + DBG(" PCI: pbar%d: mask=%08x io %d bytes\n", bar, mask, size);
> + if (last_mem + size > dev->bus->resource[0]->end) {
> + DBG("BAR does not fit within bus IO res\n");
> + return;
> + }
> + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, last_io);
> + dev->resource[bar].flags = IORESOURCE_IO;
> + last_addr = last_io;
> + last_io += size;
> + } else { /* MEM */
> + size = -(mask & 0xfffffff0);
> + DBG(" PCI: pbar%d: mask=%08x memory %d bytes\n", bar, mask, size);
> + if (last_mem + size > dev->bus->resource[0]->end) {
> + DBG("BAR does not fit within bus mem res\n");
> + return;
> + }
> + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, last_mem);
> + dev->resource[bar].flags = IORESOURCE_MEM;
> + last_addr = last_mem;
> + last_mem += size;
> +
> + if ((mask & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
> + PCI_BASE_ADDRESS_MEM_TYPE_64) {
> + dev->resource[bar].flags |= IORESOURCE_MEM_64;
> + pci_write_config_dword(dev,
> + PCI_BASE_ADDRESS_1 + bar * 4, 0);
> + }
> + }
> +
> + dev->resource[bar].start = last_addr;
> + dev->resource[bar].end = last_addr + size - 1;
> + if (dev->resource[bar].flags & IORESOURCE_MEM_64)
> + bar++;
> + }
> +
> + pci_write_config_byte(dev, PCI_COMMAND, cmd);
> + list_add_tail(&dev->bus_list, &dev->bus->devices);
> + pci_register_device(dev);
> +}
> +
> unsigned int pci_scan_bus(struct pci_bus *bus)
> {
> + struct pci_dev *dev;
> unsigned int devfn, l, max, class;
> unsigned char cmd, tmp, hdr_type, is_multi = 0;
> - struct pci_dev *dev;
> - resource_size_t last_mem;
> - resource_size_t last_io;
> -
> - /* FIXME: use res_start() */
> - last_mem = bus->resource[0]->start;
> - last_io = bus->resource[1]->start;
>
> DBG("pci_scan_bus for bus %d\n", bus->number);
> DBG(" last_io = 0x%08x, last_mem = 0x%08x\n", last_io, last_mem);
> max = bus->secondary;
>
> for (devfn = 0; devfn < 0xff; ++devfn) {
> - int bar;
> - u32 old_bar, mask;
> - int size;
> -
> if (PCI_FUNC(devfn) && !is_multi) {
> /* not a multi-function device */
> continue;
> @@ -169,6 +228,8 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
> dev->hdr_type = hdr_type;
>
> DBG("PCI: class = %08x, hdr_type = %08x\n", class, hdr_type);
> + DBG("PCI: %02x:%02x [%04x:%04x]\n", bus->number, dev->devfn,
> + dev->vendor, dev->device);
>
> switch (hdr_type & 0x7f) { /* header type */
> case PCI_HEADER_TYPE_NORMAL: /* standard header */
> @@ -181,6 +242,8 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
> */
> pci_read_config_dword(dev, PCI_ROM_ADDRESS, &l);
> dev->rom_address = (l == 0xffffffff) ? 0 : l;
> +
> + setup_device(dev, 6);
> break;
> default: /* unknown header */
> bad:
> @@ -189,62 +252,10 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
> continue;
> }
>
> - DBG("PCI: %02x:%02x [%04x/%04x]\n", bus->number, dev->devfn, dev->vendor, dev->device);
> -
> if (class == PCI_CLASS_BRIDGE_HOST) {
> DBG("PCI: skip pci host bridge\n");
> continue;
> }
> -
> - pci_read_config_byte(dev, PCI_COMMAND, &cmd);
> - pci_write_config_byte(dev, PCI_COMMAND,
> - cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
> -
> - for (bar = 0; bar < 6; bar++) {
> - resource_size_t last_addr;
> -
> - pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, &old_bar);
> - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, 0xfffffffe);
> - pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, &mask);
> - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, old_bar);
> -
> - if (mask == 0 || mask == 0xffffffff) {
> - DBG(" PCI: pbar%d set bad mask\n", bar);
> - continue;
> - }
> -
> - if (mask & 0x01) { /* IO */
> - size = -(mask & 0xfffffffe);
> - DBG(" PCI: pbar%d: mask=%08x io %d bytes\n", bar, mask, size);
> - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, last_io);
> - dev->resource[bar].flags = IORESOURCE_IO;
> - last_addr = last_io;
> - last_io += size;
> - } else { /* MEM */
> - size = -(mask & 0xfffffff0);
> - DBG(" PCI: pbar%d: mask=%08x memory %d bytes\n", bar, mask, size);
> - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, last_mem);
> - dev->resource[bar].flags = IORESOURCE_MEM;
> - last_addr = last_mem;
> - last_mem += size;
> -
> - if ((mask & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
> - PCI_BASE_ADDRESS_MEM_TYPE_64) {
> - dev->resource[bar].flags |= IORESOURCE_MEM_64;
> - pci_write_config_dword(dev,
> - PCI_BASE_ADDRESS_1 + bar * 4, 0);
> - }
> - }
> -
> - dev->resource[bar].start = last_addr;
> - dev->resource[bar].end = last_addr + size - 1;
> - if (dev->resource[bar].flags & IORESOURCE_MEM_64)
> - bar++;
> - }
> -
> - pci_write_config_byte(dev, PCI_COMMAND, cmd);
> - list_add_tail(&dev->bus_list, &bus->devices);
> - pci_register_device(dev);
> }
>
> /*
> --
> 2.1.1
>
--
--
Best regards,
Antony Pavlov
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] clock.c: fix whitespaces
2014-10-07 15:42 ` [PATCH] clock.c: fix whitespaces Antony Pavlov
@ 2014-10-08 9:13 ` Sascha Hauer
0 siblings, 0 replies; 5+ messages in thread
From: Sascha Hauer @ 2014-10-08 9:13 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox
On Tue, Oct 07, 2014 at 07:42:07PM +0400, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
> ---
> common/clock.c | 94 +++++++++++++++++++++++++++++-----------------------------
> 1 file changed, 47 insertions(+), 47 deletions(-)
Applied, thanks
Sascha
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^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2014-10-08 9:14 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-10-07 15:42 [PATCH] clock.c: fix whitespaces Antony Pavlov
2014-10-07 15:42 ` [PATCH] pci: split out device init Antony Pavlov
2014-10-07 15:45 ` Antony Pavlov
2014-10-07 15:42 ` [PATCH] clock.c: fix whitespaces Antony Pavlov
2014-10-08 9:13 ` Sascha Hauer
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