From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 1/4] ARM: i.MX51: Setup MIPI
Date: Wed, 12 Nov 2014 08:21:20 +0100 [thread overview]
Message-ID: <1415776883-28870-1-git-send-email-s.hauer@pengutronix.de> (raw)
Setting up the MIPI unit is necessary for proper IPU support,
so set this up here. This is only needed for graphics in barebox,
the Kernel repeats this setup during booting.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/imx51.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c
index a0b627f..cef302b 100644
--- a/arch/arm/mach-imx/imx51.c
+++ b/arch/arm/mach-imx/imx51.c
@@ -41,11 +41,26 @@ static int imx51_silicon_revision(void)
return 0;
}
+static void imx51_ipu_mipi_setup(void)
+{
+ void __iomem *hsc_addr = (void __iomem *)MX51_MIPI_HSC_BASE_ADDR;
+ u32 val;
+
+ /* setup MIPI module to legacy mode */
+ writel(0xf00, hsc_addr);
+
+ /* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */
+ val = readl(hsc_addr + 0x800);
+ val |= 0x30ff;
+ writel(val, hsc_addr + 0x800);
+}
+
int imx51_init(void)
{
imx_set_silicon_revision("i.MX51", imx51_silicon_revision());
imx51_boot_save_loc((void *)MX51_SRC_BASE_ADDR);
add_generic_device("imx51-esdctl", 0, NULL, MX51_ESDCTL_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
+ imx51_ipu_mipi_setup();
return 0;
}
--
2.1.1
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next reply other threads:[~2014-11-12 7:21 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-12 7:21 Sascha Hauer [this message]
2014-11-12 7:21 ` [PATCH 2/4] ARM: i.MX51: Add pwm aliases to device tree Sascha Hauer
2014-11-12 7:21 ` [PATCH 3/4] ARM: i.MX51 efikasb: Use defaultenv_append_directory Sascha Hauer
2014-11-12 7:21 ` [PATCH 4/4] ARM: i.MX51 efikasb: register init callback for PMIC init Sascha Hauer
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