* [PATCH v2 2/2] i.MX6: phytec: Distil common code pattern into a macro
2014-12-03 13:53 [PATCH v2 1/2] i.MX6: phytec: Distil different startup functions Andrey Smirnov
@ 2014-12-03 13:53 ` Andrey Smirnov
2014-12-04 7:23 ` [PATCH v2 1/2] i.MX6: phytec: Distil different startup functions Sascha Hauer
1 sibling, 0 replies; 3+ messages in thread
From: Andrey Smirnov @ 2014-12-03 13:53 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Distil common code pattern for Phytec entry functions into a macro and
use it instead. This way a new board derivateve that differs only in device
tree file can be added with just one line.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/boards/phytec-phyflex-imx6/lowlevel.c | 82 +++++++-------------------
1 file changed, 22 insertions(+), 60 deletions(-)
diff --git a/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c b/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c
index e8937b9..90e0969 100644
--- a/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c
+++ b/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c
@@ -54,16 +54,12 @@ static inline void setup_uart(void)
putc_ll('>');
}
-extern char __dtb_imx6q_phytec_pbab01_start[];
-extern char __dtb_imx6dl_phytec_pbab01_start[];
-extern char __dtb_imx6s_phytec_pbab01_start[];
-extern char __dtb_imx6q_phytec_phyboard_alcor_start[];
-extern char __dtb_imx6dl_phytec_phyboard_subra_start[];
+#define SZ_4G 0xEFFFFFF8
-BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_512M, IMD_TYPE_PARAMETER, "memsize=512", 0);
-BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_1G, IMD_TYPE_PARAMETER, "memsize=1024", 0);
-BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_2G, IMD_TYPE_PARAMETER, "memsize=2048", 0);
-BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_4G, IMD_TYPE_PARAMETER, "memsize=4096", 0);
+BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_SZ_512M, IMD_TYPE_PARAMETER, "memsize=512", 0);
+BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_SZ_1G, IMD_TYPE_PARAMETER, "memsize=1024", 0);
+BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_SZ_2G, IMD_TYPE_PARAMETER, "memsize=2048", 0);
+BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_SZ_4G, IMD_TYPE_PARAMETER, "memsize=4096", 0);
static void __noreturn start_imx6_phytec_common(uint32_t size,
bool do_early_uart_config,
@@ -82,58 +78,24 @@ static void __noreturn start_imx6_phytec_common(uint32_t size,
barebox_arm_entry(0x10000000, size, fdt);
}
-ENTRY_FUNCTION(start_phytec_pbab01_1gib, r0, r1, r2)
-{
- IMD_USED(phyflex_mx6_memsize_1G);
-
- start_imx6_phytec_common(SZ_1G, true,
- __dtb_imx6q_phytec_pbab01_start);
-}
-
-ENTRY_FUNCTION(start_phytec_pbab01_2gib, r0, r1, r2)
-{
- IMD_USED(phyflex_mx6_memsize_2G);
-
- start_imx6_phytec_common(SZ_2G, true,
- __dtb_imx6q_phytec_pbab01_start);
-}
-
-ENTRY_FUNCTION(start_phytec_pbab01_4gib, r0, r1, r2)
-{
- IMD_USED(phyflex_mx6_memsize_4G);
+#define PHYTEC_ENTRY(name, fdt_name, memory_size, do_early_uart_config) \
+ ENTRY_FUNCTION(name, r0, r1, r2) \
+ { \
+ extern char __dtb_##fdt_name##_start[]; \
+ \
+ IMD_USED(phyflex_mx6_memsize_##memory_size); \
+ \
+ start_imx6_phytec_common(memory_size, do_early_uart_config, \
+ __dtb_##fdt_name##_start); \
+ }
- start_imx6_phytec_common(0xEFFFFFF8, true,
- __dtb_imx6q_phytec_pbab01_start);
-}
+PHYTEC_ENTRY(start_phytec_pbab01_1gib, imx6q_phytec_pbab01, SZ_1G, true);
+PHYTEC_ENTRY(start_phytec_pbab01_2gib, imx6q_phytec_pbab01, SZ_2G, true);
+PHYTEC_ENTRY(start_phytec_pbab01_4gib, imx6q_phytec_pbab01, SZ_4G, true);
+PHYTEC_ENTRY(start_phytec_pbab01dl_1gib, imx6dl_phytec_pbab01, SZ_1G, false);
+PHYTEC_ENTRY(start_phytec_pbab01s_512mb, imx6s_phytec_pbab01, SZ_512M, false);
+PHYTEC_ENTRY(start_phytec_phyboard_alcor_1gib, imx6q_phytec_phyboard_alcor, SZ_1G, false);
+PHYTEC_ENTRY(start_phytec_phyboard_subra_512mb, imx6dl_phytec_phyboard_subra, SZ_512M, false);
-ENTRY_FUNCTION(start_phytec_pbab01dl_1gib, r0, r1, r2)
-{
- IMD_USED(phyflex_mx6_memsize_1G);
- start_imx6_phytec_common(SZ_1G, false,
- __dtb_imx6dl_phytec_pbab01_start);
-}
-ENTRY_FUNCTION(start_phytec_pbab01s_512mb, r0, r1, r2)
-{
- IMD_USED(phyflex_mx6_memsize_512M);
-
- start_imx6_phytec_common(SZ_512M, false,
- __dtb_imx6s_phytec_pbab01_start);
-}
-
-ENTRY_FUNCTION(start_phytec_phyboard_alcor_1gib, r0, r1, r2)
-{
- IMD_USED(phyflex_mx6_memsize_1G);
-
- start_imx6_phytec_common(SZ_1G, false,
- __dtb_imx6q_phytec_phyboard_alcor_start);
-}
-
-ENTRY_FUNCTION(start_phytec_phyboard_subra_512mb, r0, r1, r2)
-{
- IMD_USED(phyflex_mx6_memsize_512M);
-
- start_imx6_phytec_common(SZ_512M, false,
- __dtb_imx6dl_phytec_phyboard_subra_start);
-}
--
2.1.0
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^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH v2 1/2] i.MX6: phytec: Distil different startup functions
2014-12-03 13:53 [PATCH v2 1/2] i.MX6: phytec: Distil different startup functions Andrey Smirnov
2014-12-03 13:53 ` [PATCH v2 2/2] i.MX6: phytec: Distil common code pattern into a macro Andrey Smirnov
@ 2014-12-04 7:23 ` Sascha Hauer
1 sibling, 0 replies; 3+ messages in thread
From: Sascha Hauer @ 2014-12-04 7:23 UTC (permalink / raw)
To: Andrey Smirnov; +Cc: barebox
On Wed, Dec 03, 2014 at 05:53:05AM -0800, Andrey Smirnov wrote:
> Distil different startup functions into a generic one, different
> behavioral aspects of which can be influenced by its parameters.
>
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> ---
Applied both, thanks
Sascha
> arch/arm/boards/phytec-phyflex-imx6/lowlevel.c | 68 +++++++-------------------
> 1 file changed, 19 insertions(+), 49 deletions(-)
>
> diff --git a/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c b/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c
> index e6f9d03..e8937b9 100644
> --- a/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c
> +++ b/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c
> @@ -65,7 +65,9 @@ BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_1G, IMD_TYPE_PARAMETER, "memsize=1024
> BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_2G, IMD_TYPE_PARAMETER, "memsize=2048", 0);
> BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_4G, IMD_TYPE_PARAMETER, "memsize=4096", 0);
>
> -static void __noreturn start_imx6q_phytec_pbab01_common(uint32_t size)
> +static void __noreturn start_imx6_phytec_common(uint32_t size,
> + bool do_early_uart_config,
> + void *fdt_blob_fixed_offset)
> {
> void *fdt;
>
> @@ -73,25 +75,10 @@ static void __noreturn start_imx6q_phytec_pbab01_common(uint32_t size)
>
> arm_setup_stack(0x00920000 - 8);
>
> - if (IS_ENABLED(CONFIG_DEBUG_LL))
> + if (do_early_uart_config && IS_ENABLED(CONFIG_DEBUG_LL))
> setup_uart();
>
> - fdt = __dtb_imx6q_phytec_pbab01_start - get_runtime_offset();
> -
> - barebox_arm_entry(0x10000000, size, fdt);
> -}
> -
> -
> -static void __noreturn start_imx6dl_phytec_pbab01_common(uint32_t size)
> -{
> - void *fdt;
> -
> - imx6_cpu_lowlevel_init();
> -
> - arm_setup_stack(0x00920000 - 8);
> -
> - fdt = __dtb_imx6dl_phytec_pbab01_start - get_runtime_offset();
> -
> + fdt = fdt_blob_fixed_offset - get_runtime_offset();
> barebox_arm_entry(0x10000000, size, fdt);
> }
>
> @@ -99,71 +86,54 @@ ENTRY_FUNCTION(start_phytec_pbab01_1gib, r0, r1, r2)
> {
> IMD_USED(phyflex_mx6_memsize_1G);
>
> - start_imx6q_phytec_pbab01_common(SZ_1G);
> + start_imx6_phytec_common(SZ_1G, true,
> + __dtb_imx6q_phytec_pbab01_start);
> }
>
> ENTRY_FUNCTION(start_phytec_pbab01_2gib, r0, r1, r2)
> {
> IMD_USED(phyflex_mx6_memsize_2G);
>
> - start_imx6q_phytec_pbab01_common(SZ_2G);
> + start_imx6_phytec_common(SZ_2G, true,
> + __dtb_imx6q_phytec_pbab01_start);
> }
>
> ENTRY_FUNCTION(start_phytec_pbab01_4gib, r0, r1, r2)
> {
> IMD_USED(phyflex_mx6_memsize_4G);
>
> - start_imx6q_phytec_pbab01_common(0xEFFFFFF8);
> + start_imx6_phytec_common(0xEFFFFFF8, true,
> + __dtb_imx6q_phytec_pbab01_start);
> }
>
> ENTRY_FUNCTION(start_phytec_pbab01dl_1gib, r0, r1, r2)
> {
> IMD_USED(phyflex_mx6_memsize_1G);
>
> - start_imx6dl_phytec_pbab01_common(SZ_1G);
> + start_imx6_phytec_common(SZ_1G, false,
> + __dtb_imx6dl_phytec_pbab01_start);
> }
>
> ENTRY_FUNCTION(start_phytec_pbab01s_512mb, r0, r1, r2)
> {
> - void *fdt;
> -
> - imx6_cpu_lowlevel_init();
> -
> - arm_setup_stack(0x00920000 - 8);
> -
> IMD_USED(phyflex_mx6_memsize_512M);
>
> - fdt = __dtb_imx6s_phytec_pbab01_start - get_runtime_offset();
> -
> - barebox_arm_entry(0x10000000, SZ_512M, fdt);
> + start_imx6_phytec_common(SZ_512M, false,
> + __dtb_imx6s_phytec_pbab01_start);
> }
>
> ENTRY_FUNCTION(start_phytec_phyboard_alcor_1gib, r0, r1, r2)
> {
> - void *fdt;
> -
> - imx6_cpu_lowlevel_init();
> -
> - arm_setup_stack(0x00920000 - 8);
> -
> IMD_USED(phyflex_mx6_memsize_1G);
>
> - fdt = __dtb_imx6q_phytec_phyboard_alcor_start - get_runtime_offset();
> -
> - barebox_arm_entry(0x10000000, SZ_1G, fdt);
> + start_imx6_phytec_common(SZ_1G, false,
> + __dtb_imx6q_phytec_phyboard_alcor_start);
> }
>
> ENTRY_FUNCTION(start_phytec_phyboard_subra_512mb, r0, r1, r2)
> {
> - void *fdt;
> -
> - imx6_cpu_lowlevel_init();
> -
> - arm_setup_stack(0x00920000 - 8);
> -
> IMD_USED(phyflex_mx6_memsize_512M);
>
> - fdt = __dtb_imx6dl_phytec_phyboard_subra_start - get_runtime_offset();
> -
> - barebox_arm_entry(0x10000000, SZ_512M, fdt);
> + start_imx6_phytec_common(SZ_512M, false,
> + __dtb_imx6dl_phytec_phyboard_subra_start);
> }
> --
> 2.1.0
>
>
--
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