[PATCH 1/5] ARM: am335x: phyFLEX-AM335x: Split DT and add MLO DT

[PATCH 1/5] ARM: am335x: phyFLEX-AM335x: Split DT and add MLO DT

[Wadim Egorov]

To support different module variants, this patch splits the phyFLEX DT
in dts and dtsi.

And we are also adding a DT for the MLO, which has all bootable devices
disabled. The bootsource is checked in the board file and only the needed
device is enabled and registered.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
---
 arch/arm/boards/phytec-phyflex-am335x/board.c    |   4 +
 arch/arm/boards/phytec-phyflex-am335x/lowlevel.c |   7 +-
 arch/arm/dts/Makefile                            |   2 +-
 arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts   |  28 ++
 arch/arm/dts/am335x-phytec-phyflex-som.dts       |  24 ++
 arch/arm/dts/am335x-phytec-phyflex-som.dtsi      | 362 ++++++++++++++++++++++
 arch/arm/dts/am335x-phytec-phyflex.dts           | 368 -----------------------
 7 files changed, 423 insertions(+), 372 deletions(-)
 create mode 100644 arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts
 create mode 100644 arch/arm/dts/am335x-phytec-phyflex-som.dts
 create mode 100644 arch/arm/dts/am335x-phytec-phyflex-som.dtsi
 delete mode 100644 arch/arm/dts/am335x-phytec-phyflex.dts

diff --git a/arch/arm/boards/phytec-phyflex-am335x/board.c b/arch/arm/boards/phytec-phyflex-am335x/board.c
index e635532..aed5c31 100644
--- a/arch/arm/boards/phytec-phyflex-am335x/board.c
+++ b/arch/arm/boards/phytec-phyflex-am335x/board.c
@@ -87,6 +87,10 @@ static int pfla03_devices_init(void)
 		xloadslots, ARRAY_SIZE(xloadslots));
 	am33xx_bbu_nand_register_handler("nand", "/dev/nand0.barebox.bb");
 
+	if (IS_ENABLED(CONFIG_SHELL_NONE))
+		return am33xx_of_register_bootdevice();
+
+
 	return 0;
 }
 device_initcall(pfla03_devices_init);
diff --git a/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c b/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c
index a240401..f6029cd 100644
--- a/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c
+++ b/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c
@@ -102,7 +102,8 @@ struct pfla03_sdram_timings pfla03_timings[] = {
 	},
 };
 
-extern char __dtb_am335x_phytec_phyflex_start[];
+extern char __dtb_am335x_phytec_phyflex_som_start[];
+extern char __dtb_am335x_phytec_phyflex_som_mlo_start[];
 
 /**
  * @brief The basic entry point for board initialization.
@@ -139,7 +140,7 @@ static noinline void pfla03_board_init(int sdram)
 	omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
 	putc_ll('>');
 
-	fdt = __dtb_am335x_phytec_phyflex_start - get_runtime_offset();
+	fdt = __dtb_am335x_phytec_phyflex_som_mlo_start - get_runtime_offset();
 
 	am335x_barebox_entry(fdt);
 }
@@ -174,7 +175,7 @@ ENTRY_FUNCTION(start_am33xx_phytec_phyflex_sdram, r0, r1, r2)
 {
 	void *fdt;
 
-	fdt = __dtb_am335x_phytec_phyflex_start - get_runtime_offset();
+	fdt = __dtb_am335x_phytec_phyflex_som_start - get_runtime_offset();
 
 	am335x_barebox_entry(fdt);
 }
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index dc32dd3..e87e612 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -29,7 +29,7 @@ pbl-dtb-$(CONFIG_MACH_PCA100) += imx27-phytec-phycard-s-rdk-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_PCAAXL3) += imx6q-phytec-pbaa03.dtb.o
 pbl-dtb-$(CONFIG_MACH_PCM038) += imx27-phytec-phycore-rdk.dtb.o
 pbl-dtb-$(CONFIG_MACH_PCM051) += am335x-phytec-phycore-som.dtb.o am335x-phytec-phycore-som-no-spi.dtb.o am335x-phytec-phycore-som-mlo.dtb.o
-pbl-dtb-$(CONFIG_MACH_PFLA03) += am335x-phytec-phyflex.dtb.o
+pbl-dtb-$(CONFIG_MACH_PFLA03) += am335x-phytec-phyflex-som.dtb.o am335x-phytec-phyflex-som-mlo.dtb.o
 pbl-dtb-$(CONFIG_MACH_PHYTEC_PFLA02) += imx6s-phytec-pbab01.dtb.o imx6dl-phytec-pbab01.dtb.o imx6q-phytec-pbab01.dtb.o imx6q-phytec-phyboard-alcor.dtb.o imx6dl-phytec-phyboard-subra.dtb.o
 pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += armada-xp-openblocks-ax3-4-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += kirkwood-openblocks_a6-bb.dtb.o
diff --git a/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts b/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts
new file mode 100644
index 0000000..ab9a9ec
--- /dev/null
+++ b/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2015 Wadim Egorov <w.egorov@phytec.de> PHYTEC Messtechnik GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-phytec-phyflex-som.dtsi"
+
+/ {
+	model = "Phytec phyFLEX AM335x";
+	compatible = "phytec,phyflex-am335x-som", "ti,am33xx";
+};
+
+/* Keep all bootsources disabled, we enable and register them
+ * later while booting.
+ */
+
+&mmc1 {
+	status = "disabled";
+};
+
+&gpmc {
+	status = "disabled";
+};
diff --git a/arch/arm/dts/am335x-phytec-phyflex-som.dts b/arch/arm/dts/am335x-phytec-phyflex-som.dts
new file mode 100644
index 0000000..2239f07
--- /dev/null
+++ b/arch/arm/dts/am335x-phytec-phyflex-som.dts
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2015 Wadim Egorov <w.egorov@phytec.de> PHYTEC Messtechnik GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-phytec-phyflex-som.dtsi"
+
+/ {
+	model = "Phytec phyFLEX AM335x";
+	compatible = "phytec,phyflex-am335x-som", "ti,am33xx";
+};
+
+&spi0 {
+	status = "okay";
+};
+
+&at24c32 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/am335x-phytec-phyflex-som.dtsi b/arch/arm/dts/am335x-phytec-phyflex-som.dtsi
new file mode 100644
index 0000000..1837636
--- /dev/null
+++ b/arch/arm/dts/am335x-phytec-phyflex-som.dtsi
@@ -0,0 +1,362 @@
+/ {
+	chosen {
+		linux,stdout-path = &uart0;
+
+		environment-spi {
+			compatible = "barebox,environment";
+			device-path = &flash, "partname:bareboxenv";
+			status = "disabled";
+		};
+
+		environment-nand {
+			compatible = "barebox,environment";
+			device-path = &nand, "partname:bareboxenv";
+			status = "disabled";
+		};
+	};
+
+	vcc5v: fixedregulator@0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+	};
+
+	vcc3v3: fixedregulator@1 {
+		compatible = "regulator-fixed";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+	};
+
+};
+
+&am33xx_pinmux {
+	i2c0_pins: pinmux_i2c0_pins {
+			pinctrl-single,pins = <
+			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda */
+			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl */
+		>;
+	};
+
+	spi0_pins: pinmux_spi0_pins {
+		pinctrl-single,pins = <
+			0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* spi0_clk.spi0_clk */
+			0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* spi0_d0.spi0_d0 */
+			0x158 (PIN_INPUT_PULLUP | MUX_MODE0)    /* spi0_d1.spi0_d1 */
+			0x15c (PIN_INPUT_PULLUP | MUX_MODE0)	/* spi0_cs0.spi0_cs0 */
+		>;
+	};
+
+	uart0_pins: pinmux_uart0_pins {
+		pinctrl-single,pins = <
+			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd */
+			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd */
+		>;
+	};
+
+	mmc1_pins: pinmux_mmc1_pins {
+		pinctrl-single,pins = <
+			0x0f0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3 */
+			0x0f4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2 */
+			0x0f8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1 */
+			0x0fc (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0 */
+			0x100 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk */
+			0x104 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd */
+		>;
+	};
+
+	emac_rgmii1_pins: pinmux_emac_rgmii1_pins {
+		pinctrl-single,pins = <
+			0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_tx_en.rgmii1_tctl */
+			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rx_dv.rgmii1_rctl */
+			0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
+			0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
+			0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
+			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
+			0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_tx_clk.rgmii1_tclk */
+			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rx_clk.rgmii1_rclk */
+			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
+			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
+			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
+			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
+		>;
+	};
+
+	emac_rmii2_pins: pinmux_emac_rmii2_pins {
+		pinctrl-single,pins = <
+			0x040 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* gpmc_a0.rmii2_txen */
+			0x050 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* gpmc_a4.rmii2_txd1 */
+			0x054 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* gpmc_a5.rmii2_txd0 */
+			0x068 (PIN_INPUT_PULLDOWN | MUX_MODE3)	/* gpmc_a10.rmii2_rxd1 */
+			0x06c (PIN_INPUT_PULLDOWN | MUX_MODE3)	/* gpmc_a11.rmii2_rxd0 */
+			0x074 (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_wpn.rmii2_rxer */
+			0x108 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_col.rmii2_refclk */
+		>;
+	};
+
+	davinci_mdio_default: davinci_mdio_default {
+		pinctrl-single,pins = <
+			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data */
+			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk */
+		>;
+	};
+
+	nandflash_pins_s0: nandflash_pins_s0 {
+		pinctrl-single,pins = <
+			0x000 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0 */
+			0x004 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1 */
+			0x008 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2 */
+			0x00c (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3 */
+			0x010 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4 */
+			0x014 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5 */
+			0x018 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6 */
+			0x01c (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7 */
+			0x070 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0 */
+			0x07c (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* gpmc_csn0 */
+			0x090 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* gpmc_advn_ale */
+			0x094 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* gpmc_oen_ren */
+			0x098 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* gpmc_wen */
+			0x09c (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* gpmc_be0n_cle */
+		>;
+	};
+};
+
+&i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_pins>;
+	status = "okay";
+	clock-frequency = <400000>;
+
+	tps: pmic@2d {
+		reg = <0x2d>;
+	};
+
+	at24c32: eeprom@52 {
+		compatible = "atmel,24c32";
+		byte_len = <4096>;
+		pagesize = <32>;
+		reg = <0x52>;
+	};
+};
+
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins>;
+	status = "okay";
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_pins>;
+	status = "disabled";
+	flash: m25p80 {
+		compatible = "m25p80";
+		spi-max-frequency = <48000000>;
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		m25p,fast-read;
+
+		partition@0 {
+			label = "xload";
+			reg = <0x0 0x20000>;
+		};
+
+		partition@1 {
+			label = "barebox";
+			reg = <0x20000 0x80000>;
+		};
+
+		partition@2 {
+			label = "bareboxenv";
+			reg = <0xa0000 0x20000>;
+		};
+
+		partition@3 {
+			label = "oftree";
+			reg = <0xc0000 0x20000>;
+                };
+
+		partition@4 {
+			label = "kernel";
+			reg = <0xe0000 0x0>;
+		};
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
+	status = "okay";
+};
+
+&davinci_mdio {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&davinci_mdio_default>;
+	status = "okay";
+};
+
+&phy_sel {
+	rmii-clock-ext;
+};
+
+&cpsw_emac0 {
+	phy_id = <&davinci_mdio>, <1>;
+	phy-mode = "rgmii";
+	dual_emac_res_vlan = <1>;
+
+	/* clock skew correction, maximum possible on KSZ9031 is
+	2^5 - 1 * 0,06ns = 1860ps, micrel datasheet M9999-081712-0.11 p.58*/
+	rxc-skew-ps = <1860>;
+	txc-skew-ps = <1860>;
+
+	/* align tx signals to zero, leave rx to default */
+	txd0-skew-ps = <0>;
+	txd1-skew-ps = <0>;
+	txd2-skew-ps = <0>;
+	txd3-skew-ps = <0>;
+};
+
+&cpsw_emac1 {
+	phy_id = <&davinci_mdio>, <2>;
+	phy-mode = "rmii";
+	dual_emac_res_vlan = <2>;
+};
+
+&mac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&emac_rgmii1_pins &emac_rmii2_pins>;
+	dual_emac;
+	status = "okay";
+};
+
+&elm {
+	status = "okay";
+};
+
+&gpmc {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&nandflash_pins_s0>;
+	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
+	nand: nand@0,0 {
+		reg = <0 0 0>; /* CS0, offset 0 */
+		nand-bus-width = <8>;
+		ti,nand-ecc-opt = "bch8";
+		gpmc,device-nand = "true";
+		gpmc,device-width = <1>;
+		gpmc,sync-clk-ps = <0>;
+		gpmc,cs-on-ns = <0>;
+		gpmc,cs-rd-off-ns = <30>;
+		gpmc,cs-wr-off-ns = <30>;
+		gpmc,adv-on-ns = <0>;
+		gpmc,adv-rd-off-ns = <30>;
+		gpmc,adv-wr-off-ns = <30>;
+		gpmc,we-on-ns = <0>;
+		gpmc,we-off-ns = <20>;
+		gpmc,oe-on-ns = <10>;
+		gpmc,oe-off-ns = <30>;
+		gpmc,access-ns = <30>;
+		gpmc,rd-cycle-ns = <30>;
+		gpmc,wr-cycle-ns = <30>;
+		gpmc,wait-pin = <1>;
+		gpmc,wait-on-read = "true";
+		gpmc,wait-on-write = "true";
+		gpmc,bus-turnaround-ns = <0>;
+		gpmc,cycle2cycle-delay-ns = <50>;
+		gpmc,cycle2cycle-diffcsen;
+		gpmc,clk-activation-ns = <0>;
+		gpmc,wait-monitoring-ns = <0>;
+		gpmc,wr-access-ns = <0>;
+		gpmc,wr-data-mux-bus-ns = <0>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+		elm_id = <&elm>;
+
+		partition@0 {
+			label = "xload";
+			reg = <0x0 0x20000>;
+		};
+
+		partition@1 {
+			label = "xload_backup1";
+			reg = <0x20000 0x20000>;
+		};
+
+		partition@2 {
+			label = "xload_backup2";
+			reg = <0x40000 0x20000>;
+		};
+
+		partition@3 {
+			label = "xload_backup3";
+			reg = <0x60000 0x20000>;
+		};
+
+		partition@4 {
+			label = "barebox";
+			reg = <0x80000 0x80000>;
+		};
+
+		partition@5 {
+			label = "bareboxenv";
+			reg = <0x100000 0x20000>;
+		};
+
+		partition@6 {
+			label = "oftree";
+			reg = <0x120000 0x20000>;
+		};
+
+		partition@7 {
+			label = "kernel";
+			reg = <0x140000 0x800000>;
+		};
+
+		partition@8 {
+			label = "root";
+			reg = <0x940000 0x0>;
+		};
+	};
+};
+
+/include/ "tps65217.dtsi"
+&tps {
+	vcc1-supply = <&vcc5v>;
+	vcc2-supply = <&vcc5v>;
+	vcc3-supply = <&vcc5v>;
+	vcc4-supply = <&vcc5v>;
+	vcc5-supply = <&vcc5v>;
+	vcc6-supply = <&vcc5v>;
+	vcc7-supply = <&vcc5v>;
+	vccio-supply = <&vcc5v>;
+
+	regulators {
+		vdd1_reg: regulator@2 {
+			/* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
+			regulator-name = "vdd_mpu";
+			regulator-min-microvolt = <912500>;
+			regulator-max-microvolt = <1378000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		vdd2_reg: regulator@3 {
+			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+			regulator-name = "vdd_core";
+			regulator-min-microvolt = <912500>;
+			regulator-max-microvolt = <1150000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		vmmc_reg: regulator@12 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <3300000>;
+		};
+
+	};
+};
diff --git a/arch/arm/dts/am335x-phytec-phyflex.dts b/arch/arm/dts/am335x-phytec-phyflex.dts
deleted file mode 100644
index 6c49567..0000000
--- a/arch/arm/dts/am335x-phytec-phyflex.dts
+++ /dev/null
@@ -1,368 +0,0 @@
-/dts-v1/;
-
-#include "am33xx.dtsi"
-
-/ {
-	model = "Phytec phyFLEX AM335x";
-	compatible = "phytec,phyflex-am335x-som", "ti,am33xx";
-
-	chosen {
-		linux,stdout-path = &uart0;
-
-		environment-spi {
-			compatible = "barebox,environment";
-			device-path = &flash, "partname:bareboxenv";
-			status = "disabled";
-		};
-
-		environment-nand {
-			compatible = "barebox,environment";
-			device-path = &nand, "partname:bareboxenv";
-			status = "disabled";
-		};
-	};
-
-	vcc5v: fixedregulator@0 {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-boot-on;
-	};
-
-	vcc3v3: fixedregulator@1 {
-		compatible = "regulator-fixed";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		regulator-boot-on;
-	};
-};
-
-&am33xx_pinmux {
-	i2c0_pins: pinmux_i2c0_pins {
-			pinctrl-single,pins = <
-			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda */
-			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl */
-		>;
-	};
-
-	spi0_pins: pinmux_spi0_pins {
-		pinctrl-single,pins = <
-			0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* spi0_clk.spi0_clk */
-			0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* spi0_d0.spi0_d0 */
-			0x158 (PIN_INPUT_PULLUP | MUX_MODE0)    /* spi0_d1.spi0_d1 */
-			0x15c (PIN_INPUT_PULLUP | MUX_MODE0)	/* spi0_cs0.spi0_cs0 */
-		>;
-	};
-
-	uart0_pins: pinmux_uart0_pins {
-		pinctrl-single,pins = <
-			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd */
-			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd */
-		>;
-	};
-
-	mmc1_pins: pinmux_mmc1_pins {
-		pinctrl-single,pins = <
-			0x0f0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3 */
-			0x0f4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2 */
-			0x0f8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1 */
-			0x0fc (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0 */
-			0x100 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk */
-			0x104 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd */
-			>;
-	};
-
-	emac_rgmii1_pins: pinmux_emac_rgmii1_pins {
-		pinctrl-single,pins = <
-			0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_tx_en.rgmii1_tctl */
-			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rx_dv.rgmii1_rctl */
-			0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
-			0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
-			0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
-			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
-			0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_tx_clk.rgmii1_tclk */
-			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rx_clk.rgmii1_rclk */
-			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
-			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
-			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
-			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
-		>;
-	};
-
-	emac_rmii2_pins: pinmux_emac_rmii2_pins {
-		pinctrl-single,pins = <
-			0x040 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* gpmc_a0.rmii2_txen */
-			0x050 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* gpmc_a4.rmii2_txd1 */
-			0x054 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* gpmc_a5.rmii2_txd0 */
-			0x068 (PIN_INPUT_PULLDOWN | MUX_MODE3)	/* gpmc_a10.rmii2_rxd1 */
-			0x06c (PIN_INPUT_PULLDOWN | MUX_MODE3)	/* gpmc_a11.rmii2_rxd0 */
-			0x074 (PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_wpn.rmii2_rxer */
-			0x108 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_col.rmii2_refclk */
-		>;
-	};
-
-	davinci_mdio_default: davinci_mdio_default {
-		pinctrl-single,pins = <
-			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data */
-			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk */
-		>;
-	};
-
-	nandflash_pins_s0: nandflash_pins_s0 {
-		pinctrl-single,pins = <
-			0x000 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0 */
-			0x004 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1 */
-			0x008 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2 */
-			0x00c (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3 */
-			0x010 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4 */
-			0x014 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5 */
-			0x018 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6 */
-			0x01c (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7 */
-			0x070 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0 */
-			0x07c (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* gpmc_csn0 */
-			0x090 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* gpmc_advn_ale */
-			0x094 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* gpmc_oen_ren */
-			0x098 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* gpmc_wen */
-			0x09c (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* gpmc_be0n_cle */
-		>;
-	};
-};
-
-&i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins>;
-	status = "okay";
-	clock-frequency = <400000>;
-
-	tps: pmic@2d {
-		reg = <0x2d>;
-	};
-
-	at24c32: eeprom@52 {
-		compatible = "atmel,24c32";
-		byte_len = <4096>;
-		pagesize = <32>;
-		reg = <0x52>;
-	};
-};
-
-&mmc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins>;
-	status = "okay";
-};
-
-&spi0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&spi0_pins>;
-	status = "okay";
-	flash: m25p80 {
-		compatible = "m25p80";
-		spi-max-frequency = <48000000>;
-		reg = <0>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		m25p,fast-read;
-
-		partition@0 {
-			label = "xload";
-			reg = <0x0 0x20000>;
-		};
-
-		partition@1 {
-			label = "barebox";
-			reg = <0x20000 0x80000>;
-		};
-
-		partition@2 {
-			label = "bareboxenv";
-			reg = <0xa0000 0x20000>;
-		};
-
-		partition@3 {
-			label = "oftree";
-			reg = <0xc0000 0x20000>;
-                };
-
-		partition@4 {
-			label = "kernel";
-			reg = <0xe0000 0x0>;
-		};
-	};
-};
-
-&uart0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins>;
-	status = "okay";
-};
-
-&davinci_mdio {
-	pinctrl-names = "default", "sleep";
-	pinctrl-0 = <&davinci_mdio_default>;
-	status = "okay";
-};
-
-&phy_sel {
-	rmii-clock-ext;
-};
-
-&cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <1>;
-	phy-mode = "rgmii";
-	dual_emac_res_vlan = <1>;
-
-	/* clock skew correction, maximum possible on KSZ9031 is
-	2^5 - 1 * 0,06ns = 1860ps, micrel datasheet M9999-081712-0.11 p.58*/
-	rxc-skew-ps = <1860>;
-	txc-skew-ps = <1860>;
-
-	/* align tx signals to zero, leave rx to default */
-	txd0-skew-ps = <0>;
-	txd1-skew-ps = <0>;
-	txd2-skew-ps = <0>;
-	txd3-skew-ps = <0>;
-};
-
-&cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <2>;
-	phy-mode = "rmii";
-	dual_emac_res_vlan = <2>;
-};
-
-&mac {
-	pinctrl-names = "default";
-	pinctrl-0 = <&emac_rgmii1_pins &emac_rmii2_pins>;
-	dual_emac;
-	status = "okay";
-};
-
-&elm {
-	status = "okay";
-};
-
-&gpmc {
-	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&nandflash_pins_s0>;
-	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
-	nand: nand@0,0 {
-		reg = <0 0 0>; /* CS0, offset 0 */
-		nand-bus-width = <8>;
-		ti,nand-ecc-opt = "bch8";
-		gpmc,device-nand = "true";
-		gpmc,device-width = <1>;
-		gpmc,sync-clk-ps = <0>;
-		gpmc,cs-on-ns = <0>;
-		gpmc,cs-rd-off-ns = <30>;
-		gpmc,cs-wr-off-ns = <30>;
-		gpmc,adv-on-ns = <0>;
-		gpmc,adv-rd-off-ns = <30>;
-		gpmc,adv-wr-off-ns = <30>;
-		gpmc,we-on-ns = <0>;
-		gpmc,we-off-ns = <20>;
-		gpmc,oe-on-ns = <10>;
-		gpmc,oe-off-ns = <30>;
-		gpmc,access-ns = <30>;
-		gpmc,rd-cycle-ns = <30>;
-		gpmc,wr-cycle-ns = <30>;
-		gpmc,wait-pin = <1>;
-		gpmc,wait-on-read = "true";
-		gpmc,wait-on-write = "true";
-		gpmc,bus-turnaround-ns = <0>;
-		gpmc,cycle2cycle-delay-ns = <50>;
-		gpmc,cycle2cycle-diffcsen;
-		gpmc,clk-activation-ns = <0>;
-		gpmc,wait-monitoring-ns = <0>;
-		gpmc,wr-access-ns = <0>;
-		gpmc,wr-data-mux-bus-ns = <0>;
-
-		#address-cells = <1>;
-		#size-cells = <1>;
-		elm_id = <&elm>;
-
-		partition@0 {
-			label = "xload";
-			reg = <0x0 0x20000>;
-		};
-
-		partition@1 {
-			label = "xload_backup1";
-			reg = <0x20000 0x20000>;
-		};
-
-		partition@2 {
-			label = "xload_backup2";
-			reg = <0x40000 0x20000>;
-		};
-
-		partition@3 {
-			label = "xload_backup3";
-			reg = <0x60000 0x20000>;
-		};
-
-		partition@4 {
-			label = "barebox";
-			reg = <0x80000 0x80000>;
-		};
-
-		partition@5 {
-			label = "bareboxenv";
-			reg = <0x100000 0x20000>;
-		};
-
-		partition@6 {
-			label = "oftree";
-			reg = <0x120000 0x20000>;
-		};
-
-		partition@7 {
-			label = "kernel";
-			reg = <0x140000 0x800000>;
-		};
-
-		partition@8 {
-			label = "root";
-			reg = <0x940000 0x0>;
-		};
-	};
-};
-
-/include/ "tps65217.dtsi"
-&tps {
-	vcc1-supply = <&vcc5v>;
-	vcc2-supply = <&vcc5v>;
-	vcc3-supply = <&vcc5v>;
-	vcc4-supply = <&vcc5v>;
-	vcc5-supply = <&vcc5v>;
-	vcc6-supply = <&vcc5v>;
-	vcc7-supply = <&vcc5v>;
-	vccio-supply = <&vcc5v>;
-
-	regulators {
-		vdd1_reg: regulator@2 {
-			/* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
-			regulator-name = "vdd_mpu";
-			regulator-min-microvolt = <912500>;
-			regulator-max-microvolt = <1378000>;
-			regulator-boot-on;
-			regulator-always-on;
-		};
-
-		vdd2_reg: regulator@3 {
-			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
-			regulator-name = "vdd_core";
-			regulator-min-microvolt = <912500>;
-			regulator-max-microvolt = <1150000>;
-			regulator-boot-on;
-			regulator-always-on;
-		};
-
-		vmmc_reg: regulator@12 {
-			regulator-min-microvolt = <1800000>;
-			regulator-max-microvolt = <3300000>;
-		};
-
-	};
-};
-- 
1.9.1


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[PATCH 2/5] ARM: dts: Add a new compatible type for am335x phytec SOMs

[Wadim Egorov]

Added a new compatible type for am335x phytec SOMs

  "phytec,am335x-som"

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
---
 arch/arm/dts/am335x-phytec-phycore-som-mlo.dts | 2 +-
 arch/arm/dts/am335x-phytec-phycore-som.dts     | 2 +-
 arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts | 2 +-
 arch/arm/dts/am335x-phytec-phyflex-som.dts     | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts b/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts
index d8fceff..b08a59e 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts
+++ b/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts
@@ -12,7 +12,7 @@
 
 / {
 	model = "Phytec phyCORE AM335x";
-	compatible = "phytec,phycore-am335x-som", "ti,am33xx";
+	compatible = "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx";
 };
 
 /* Keep all bootsources disabled, we enable and register them
diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dts b/arch/arm/dts/am335x-phytec-phycore-som.dts
index 93f09e2..f13e0d6 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som.dts
+++ b/arch/arm/dts/am335x-phytec-phycore-som.dts
@@ -12,7 +12,7 @@
 
 / {
 	model = "Phytec phyCORE AM335x";
-	compatible = "phytec,phycore-am335x-som", "ti,am33xx";
+	compatible = "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx";
 };
 
 &spi0 {
diff --git a/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts b/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts
index ab9a9ec..5294ff5 100644
--- a/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts
+++ b/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts
@@ -12,7 +12,7 @@
 
 / {
 	model = "Phytec phyFLEX AM335x";
-	compatible = "phytec,phyflex-am335x-som", "ti,am33xx";
+	compatible = "phytec,phyflex-am335x-som", "phytec,am335x-som", "ti,am33xx";
 };
 
 /* Keep all bootsources disabled, we enable and register them
diff --git a/arch/arm/dts/am335x-phytec-phyflex-som.dts b/arch/arm/dts/am335x-phytec-phyflex-som.dts
index 2239f07..2be83b6 100644
--- a/arch/arm/dts/am335x-phytec-phyflex-som.dts
+++ b/arch/arm/dts/am335x-phytec-phyflex-som.dts
@@ -12,7 +12,7 @@
 
 / {
 	model = "Phytec phyFLEX AM335x";
-	compatible = "phytec,phyflex-am335x-som", "ti,am33xx";
+	compatible = "phytec,phyflex-am335x-som", "phytec,am335x-som", "ti,am33xx";
 };
 
 &spi0 {
-- 
1.9.1


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[PATCH 3/5] boards: Add phytec-som-am335x

[Wadim Egorov]

The main idea behind this patch is to avoid redundant board code.
Because of the module similarities of all am335x based phytec boards, we can
merge its code.
The phytec-som-am335x merges the code of all am335x based phytec SOMs.
So we will have only one "board" in the barebox for phyCORE, phyFLEX.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
---
 arch/arm/boards/Makefile                           |   1 +
 arch/arm/boards/phytec-som-am335x/Makefile         |   3 +
 arch/arm/boards/phytec-som-am335x/board.c          | 104 ++++++++++++++
 .../defaultenv-physom-am335x/boot/mmc              |   8 ++
 .../defaultenv-physom-am335x/boot/nand             |   8 ++
 .../defaultenv-physom-am335x/boot/spi              |   9 ++
 .../defaultenv-physom-am335x/init/bootsource       |  15 ++
 .../defaultenv-physom-am335x/nv/bootargs.base      |   1 +
 arch/arm/boards/phytec-som-am335x/lowlevel.c       | 133 ++++++++++++++++++
 arch/arm/boards/phytec-som-am335x/ram-timings.h    | 154 +++++++++++++++++++++
 arch/arm/configs/am335x_defconfig                  |   1 +
 arch/arm/configs/am335x_mlo_defconfig              |   1 +
 arch/arm/dts/Makefile                              |   1 +
 arch/arm/mach-omap/Kconfig                         |   6 +
 images/Makefile.am33xx                             |  36 +++++
 15 files changed, 481 insertions(+)
 create mode 100644 arch/arm/boards/phytec-som-am335x/Makefile
 create mode 100644 arch/arm/boards/phytec-som-am335x/board.c
 create mode 100644 arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/boot/mmc
 create mode 100644 arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/boot/nand
 create mode 100644 arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/boot/spi
 create mode 100644 arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/init/bootsource
 create mode 100644 arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/nv/bootargs.base
 create mode 100644 arch/arm/boards/phytec-som-am335x/lowlevel.c
 create mode 100644 arch/arm/boards/phytec-som-am335x/ram-timings.h

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 9961ca8..88de2b6 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -80,6 +80,7 @@ obj-$(CONFIG_MACH_PCM043)			+= phytec-phycore-imx35/
 obj-$(CONFIG_MACH_PCM049)			+= phytec-phycore-omap4460/
 obj-$(CONFIG_MACH_PCM051)			+= phytec-phycore-am335x/
 obj-$(CONFIG_MACH_PFLA03)			+= phytec-phyflex-am335x/
+obj-$(CONFIG_MACH_PHYTEC_SOM_AM335X)		+= phytec-som-am335x/
 obj-$(CONFIG_MACH_PHYTEC_PFLA02)		+= phytec-phyflex-imx6/
 obj-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3)	+= plathome-openblocks-ax3/
 obj-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6)	+= plathome-openblocks-a6/
diff --git a/arch/arm/boards/phytec-som-am335x/Makefile b/arch/arm/boards/phytec-som-am335x/Makefile
new file mode 100644
index 0000000..78397bd
--- /dev/null
+++ b/arch/arm/boards/phytec-som-am335x/Makefile
@@ -0,0 +1,3 @@
+lwl-y += lowlevel.o
+obj-y += board.o
+bbenv-y += defaultenv-physom-am335x
diff --git a/arch/arm/boards/phytec-som-am335x/board.c b/arch/arm/boards/phytec-som-am335x/board.c
new file mode 100644
index 0000000..d084898
--- /dev/null
+++ b/arch/arm/boards/phytec-som-am335x/board.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2015 Wadim Egorov, PHYTEC Messtechnik GmbH
+ *
+ * Device initialization for the following modules and board variants:
+ *   - phyCORE: PCM-953, phyBOARD-MAIA, phyBOARD-WEGA
+ *   - phyFLEX: PBA-B-01
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <bootsource.h>
+#include <common.h>
+#include <nand.h>
+#include <init.h>
+#include <io.h>
+#include <linux/sizes.h>
+#include <envfs.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <linux/phy.h>
+#include <linux/micrel_phy.h>
+#include <mach/am33xx-generic.h>
+#include <mach/am33xx-silicon.h>
+#include <mach/bbu.h>
+
+static int physom_coredevice_init(void)
+{
+	if (!of_machine_is_compatible("phytec,am335x-som"))
+		return 0;
+
+	am33xx_register_ethaddr(0, 0);
+
+	return 0;
+}
+coredevice_initcall(physom_coredevice_init);
+
+static struct omap_barebox_part physom_barebox_part = {
+	.nand_offset = SZ_512K,
+	.nand_size = SZ_512K,
+	.nor_offset = SZ_128K,
+	.nor_size = SZ_512K,
+};
+
+static char *xloadslots[] = {
+	"/dev/nand0.xload.bb",
+	"/dev/nand0.xload_backup1.bb",
+	"/dev/nand0.xload_backup2.bb",
+	"/dev/nand0.xload_backup3.bb"
+};
+
+static int physom_devices_init(void)
+{
+	if (!of_machine_is_compatible("phytec,am335x-som"))
+		return 0;
+
+	switch (bootsource_get()) {
+	case BOOTSOURCE_SPI:
+		of_device_enable_path("/chosen/environment-spi");
+		break;
+	case BOOTSOURCE_MMC:
+		omap_set_bootmmc_devname("mmc0");
+		break;
+	default:
+		of_device_enable_path("/chosen/environment-nand");
+		break;
+	}
+
+	omap_set_barebox_part(&physom_barebox_part);
+	defaultenv_append_directory(defaultenv_physom_am335x);
+
+	/* Special module set up */
+	if (of_machine_is_compatible("phytec,phycore-am335x-som")) {
+		armlinux_set_architecture(MACH_TYPE_PCM051);
+		barebox_set_hostname("pcm051");
+	}
+
+	if (of_machine_is_compatible("phytec,phyflex-am335x-som")) {
+		armlinux_set_architecture(MACH_TYPE_PFLA03);
+		am33xx_select_rmii2_crs_dv();
+		barebox_set_hostname("pfla03");
+	}
+
+	/* Register update handler */
+	am33xx_bbu_spi_nor_mlo_register_handler("MLO.spi", "/dev/m25p0.xload");
+	am33xx_bbu_spi_nor_register_handler("spi", "/dev/m25p0.barebox");
+	am33xx_bbu_nand_xloadslots_register_handler("MLO.nand",
+		xloadslots, ARRAY_SIZE(xloadslots));
+	am33xx_bbu_nand_register_handler("nand", "/dev/nand0.barebox.bb");
+
+	if (IS_ENABLED(CONFIG_SHELL_NONE))
+		return am33xx_of_register_bootdevice();
+
+	return 0;
+}
+device_initcall(physom_devices_init);
diff --git a/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/boot/mmc b/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/boot/mmc
new file mode 100644
index 0000000..1a642f9
--- /dev/null
+++ b/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/boot/mmc
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+global.bootm.image=/boot/linuximage
+global.bootm.oftree=/boot/oftree
+
+bootargs-ip
+
+global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2 rootfstype=ext3 rw rootwait"
diff --git a/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/boot/nand b/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/boot/nand
new file mode 100644
index 0000000..c6e49be
--- /dev/null
+++ b/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/boot/nand
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+global.bootm.image="/dev/nand0.kernel.bb"
+global.bootm.oftree="/dev/nand0.oftree.bb"
+
+bootargs-ip
+
+global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=root rw rootfstype=ubifs"
diff --git a/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/boot/spi b/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/boot/spi
new file mode 100644
index 0000000..a9c0fe8
--- /dev/null
+++ b/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/boot/spi
@@ -0,0 +1,9 @@
+#!/bin/sh
+
+global.bootm.image="/dev/m25p0.kernel"
+global.bootm.oftree="/dev/m25p0.oftree"
+
+bootargs-ip
+
+# Use rootfs from NAND
+global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=nand0.root,2048 rw rootfstype=ubifs"
diff --git a/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/init/bootsource b/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/init/bootsource
new file mode 100644
index 0000000..3f2ff4b
--- /dev/null
+++ b/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/init/bootsource
@@ -0,0 +1,15 @@
+#!/bin/sh
+
+if [ -n "$nv.boot.default" ]; then
+	exit
+fi
+
+if [ $bootsource = mmc ]; then
+	global.boot.default="mmc nand spi net"
+elif [ $bootsource = nand ]; then
+	global.boot.default="nand spi mmc net"
+elif [ $bootsource = spi ]; then
+	global.boot.default="spi nand mmc net"
+elif [ $bootsource = net ]; then
+	global.boot.default="net nand spi mmc"
+fi
diff --git a/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/nv/bootargs.base b/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/nv/bootargs.base
new file mode 100644
index 0000000..d7b01a1
--- /dev/null
+++ b/arch/arm/boards/phytec-som-am335x/defaultenv-physom-am335x/nv/bootargs.base
@@ -0,0 +1 @@
+console=ttyO0,115200
diff --git a/arch/arm/boards/phytec-som-am335x/lowlevel.c b/arch/arm/boards/phytec-som-am335x/lowlevel.c
new file mode 100644
index 0000000..87ad1f3
--- /dev/null
+++ b/arch/arm/boards/phytec-som-am335x/lowlevel.c
@@ -0,0 +1,133 @@
+/*
+ * Copyright (C) 2015 Wadim Egorov, PHYTEC Messtechnik GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <linux/sizes.h>
+#include <io.h>
+#include <init.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <mach/am33xx-silicon.h>
+#include <mach/am33xx-clock.h>
+#include <mach/generic.h>
+#include <mach/sdrc.h>
+#include <mach/sys_info.h>
+#include <mach/syslib.h>
+#include <mach/am33xx-mux.h>
+#include <mach/am33xx-generic.h>
+#include <mach/wdt.h>
+#include <debug_ll.h>
+
+#include "ram-timings.h"
+
+#define CLK_M_OSC_MHZ	25
+#define DDR_IOCTRL	0x18B
+
+static const struct am33xx_cmd_control physom_cmd = {
+	.slave_ratio0	= 0x80,
+	.dll_lock_diff0	= 0x0,
+	.invert_clkout0	= 0x0,
+	.slave_ratio1	= 0x80,
+	.dll_lock_diff1	= 0x0,
+	.invert_clkout1	= 0x0,
+	.slave_ratio2	= 0x80,
+	.dll_lock_diff2	= 0x0,
+	.invert_clkout2	= 0x0,
+};
+
+/**
+ * @brief The basic entry point for board initialization.
+ *
+ * This is called as part of machine init (after arch init).
+ * This is again called with stack in SRAM, so not too many
+ * constructs possible here.
+ *
+ * @return void
+ */
+static noinline void physom_board_init(int sdram, void *fdt)
+{
+	struct am335x_sdram_timings *timing = &physom_timings[sdram];
+
+	/*
+	 * WDT1 is already running when the bootloader gets control
+	 * Disable it to avoid "random" resets
+	 */
+	writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR));
+	while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);
+
+
+	writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
+	while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);
+
+	am33xx_pll_init(MPUPLL_M_600, CLK_M_OSC_MHZ, DDRPLL_M_400);
+
+	am335x_sdram_init(DDR_IOCTRL, &physom_cmd,
+			&timing->regs,
+			&timing->data);
+
+	am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE);
+	am33xx_enable_uart0_pin_mux();
+	omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
+	putc_ll('>');
+
+	am335x_barebox_entry(fdt);
+}
+
+static noinline void physom_board_entry(unsigned long bootinfo, int sdram, void *fdt)
+{
+	am33xx_save_bootinfo((void *)bootinfo);
+
+	arm_cpu_lowlevel_init();
+
+	/*
+	 * Setup C environment, the board init code uses global variables.
+	 * Stackpointer has already been initialized by the ROM code.
+	 */
+	relocate_to_current_adr();
+	setup_c();
+
+	physom_board_init(sdram, fdt);
+}
+
+#define PHYTEC_ENTRY_MLO(name, fdt_name, sdram)			\
+	ENTRY_FUNCTION(name, bootinfo, r1, r2)			\
+	{							\
+		extern char __dtb_##fdt_name##_start[];		\
+		void *fdt =__dtb_##fdt_name##_start -		\
+			get_runtime_offset();			\
+		physom_board_entry(bootinfo, sdram, fdt);	\
+	}
+
+#define PHYTEC_ENTRY(name, fdt_name)				\
+	ENTRY_FUNCTION(name, r0, r1, r2)			\
+	{							\
+		extern char __dtb_##fdt_name##_start[];		\
+		void *fdt =__dtb_##fdt_name##_start -		\
+			get_runtime_offset();			\
+		am335x_barebox_entry(fdt);			\
+	}
+
+/* phycore-som */
+PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_128mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J64M1615IT_128MB);
+PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_256mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J128M16125IT_256MB);
+PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J256M16HA15EIT_512MB);
+PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_2x512mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J512M8125IT_2x512MB);
+PHYTEC_ENTRY(start_am33xx_phytec_phycore_sdram, am335x_phytec_phycore_som);
+PHYTEC_ENTRY(start_am33xx_phytec_phycore_no_spi_sdram, am335x_phytec_phycore_som_no_spi);
+
+/* phyflex-som */
+PHYTEC_ENTRY_MLO(start_am33xx_phytec_phyflex_sram_256mb, am335x_phytec_phyflex_som_mlo, PHYFLEX_MT41K128M16JT_256MB);
+PHYTEC_ENTRY_MLO(start_am33xx_phytec_phyflex_sram_512mb, am335x_phytec_phyflex_som_mlo, PHYFLEX_MT41K256M16HA_512MB);
+PHYTEC_ENTRY(start_am33xx_phytec_phyflex_sdram, am335x_phytec_phyflex_som);
diff --git a/arch/arm/boards/phytec-som-am335x/ram-timings.h b/arch/arm/boards/phytec-som-am335x/ram-timings.h
new file mode 100644
index 0000000..6d1993e
--- /dev/null
+++ b/arch/arm/boards/phytec-som-am335x/ram-timings.h
@@ -0,0 +1,154 @@
+/*
+ * Copyright (C) 2015 Wadim Egorov, PHYTEC Messtechnik GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __RAM_TIMINGS_H
+#define __RAM_TIMINGS_H
+
+struct am335x_sdram_timings {
+	struct am33xx_emif_regs regs;
+	struct am33xx_ddr_data data;
+};
+
+enum {
+	PHYFLEX_MT41K128M16JT_256MB,
+	PHYFLEX_MT41K256M16HA_512MB,
+
+	PHYCORE_MT41J128M16125IT_256MB,
+	PHYCORE_MT41J64M1615IT_128MB,
+	PHYCORE_MT41J256M16HA15EIT_512MB,
+	PHYCORE_MT41J512M8125IT_2x512MB,
+};
+
+struct am335x_sdram_timings physom_timings[] = {
+	/* 256 MB */
+	[PHYFLEX_MT41K128M16JT_256MB] = {
+		.regs = {
+			.emif_read_latency	= 0x7,
+			.emif_tim1		= 0x0AAAD4DB,
+			.emif_tim2		= 0x26437FDA,
+			.emif_tim3		= 0x501F83FF,
+			.sdram_config		= 0x61C052B2,
+			.zq_config		= 0x50074BE4,
+			.sdram_ref_ctrl		= 0x00000C30,
+		},
+		.data = {
+			.rd_slave_ratio0	= 0x34,
+			.wr_dqs_slave_ratio0	= 0x47,
+			.fifo_we_slave_ratio0	= 0x9a,
+			.wr_slave_ratio0	= 0x7e,
+			.use_rank0_delay	= 0x0,
+			.dll_lock_diff0		= 0x0,
+		},
+	},
+
+	/* 512 MB */
+	[PHYFLEX_MT41K256M16HA_512MB] = {
+		.regs = {
+			.emif_read_latency	= 0x7,
+			.emif_tim1		= 0x0AAAE4DB,
+			.emif_tim2		= 0x266B7FDA,
+			.emif_tim3		= 0x501F867F,
+			.sdram_config		= 0x61C05332,
+			.zq_config		= 0x50074BE4,
+			.sdram_ref_ctrl		= 0x00000C30,
+		},
+		.data = {
+			.rd_slave_ratio0	= 0x36,
+			.wr_dqs_slave_ratio0	= 0x47,
+			.fifo_we_slave_ratio0	= 0x95,
+			.wr_slave_ratio0	= 0x7f,
+			.use_rank0_delay	= 0x0,
+			.dll_lock_diff0		= 0x0,
+		},
+	},
+
+	/* 256MB */
+	[PHYCORE_MT41J128M16125IT_256MB] = {
+		.regs = {
+			.emif_read_latency	= 0x7,
+			.emif_tim1		= 0x0AAAD4DB,
+			.emif_tim2		= 0x26437FDA,
+			.emif_tim3		= 0x501F83FF,
+			.sdram_config		= 0x61C052B2,
+			.zq_config		= 0x50074BE4,
+			.sdram_ref_ctrl		= 0x00000C30,
+		},
+		.data = {
+			.rd_slave_ratio0	= 0x3B,
+			.wr_dqs_slave_ratio0	= 0x33,
+			.fifo_we_slave_ratio0	= 0x9c,
+			.wr_slave_ratio0	= 0x6f,
+		},
+	},
+
+	/* 128MB */
+	[PHYCORE_MT41J64M1615IT_128MB] = {
+		.regs =  {
+			.emif_read_latency	= 0x7,
+			.emif_tim1		= 0x0AAAE4DB,
+			.emif_tim2		= 0x262F7FDA,
+			.emif_tim3		= 0x501F82BF,
+			.sdram_config		= 0x61C05232,
+			.zq_config		= 0x50074BE4,
+			.sdram_ref_ctrl		= 0x00000C30,
+		},
+		.data = {
+			.rd_slave_ratio0	= 0x38,
+			.wr_dqs_slave_ratio0	= 0x34,
+			.fifo_we_slave_ratio0	= 0xA2,
+			.wr_slave_ratio0	= 0x72,
+		},
+	},
+
+	/* 512MB */
+	[PHYCORE_MT41J256M16HA15EIT_512MB] = {
+		.regs = {
+			.emif_read_latency	= 0x7,
+			.emif_tim1		= 0x0AAAE4DB,
+			.emif_tim2		= 0x266B7FDA,
+			.emif_tim3		= 0x501F867F,
+			.sdram_config		= 0x61C05332,
+			.zq_config		= 0x50074BE4,
+			.sdram_ref_ctrl		= 0x00000C30
+		},
+		.data = {
+			.rd_slave_ratio0	= 0x35,
+			.wr_dqs_slave_ratio0	= 0x43,
+			.fifo_we_slave_ratio0	= 0x97,
+			.wr_slave_ratio0	= 0x7b,
+		},
+	},
+
+	/* 1024MB */
+	[PHYCORE_MT41J512M8125IT_2x512MB] = {
+		.regs = {
+			.emif_read_latency	= 0x7,
+			.emif_tim1		= 0x0AAAE4DB,
+			.emif_tim2		= 0x266B7FDA,
+			.emif_tim3		= 0x501F867F,
+			.sdram_config		= 0x61C053B2,
+			.zq_config		= 0x50074BE4,
+			.sdram_ref_ctrl		= 0x00000C30
+		},
+		.data = {
+			.rd_slave_ratio0	= 0x32,
+			.wr_dqs_slave_ratio0	= 0x48,
+			.fifo_we_slave_ratio0	= 0x99,
+			.wr_slave_ratio0	= 0x80,
+		},
+	},
+};
+
+#endif
diff --git a/arch/arm/configs/am335x_defconfig b/arch/arm/configs/am335x_defconfig
index e9bc1ba..5387548 100644
--- a/arch/arm/configs/am335x_defconfig
+++ b/arch/arm/configs/am335x_defconfig
@@ -6,6 +6,7 @@ CONFIG_MACH_AFI_GF=y
 CONFIG_MACH_BEAGLEBONE=y
 CONFIG_MACH_PCM051=y
 CONFIG_MACH_PFLA03=y
+CONFIG_MACH_PHYTEC_SOM_AM335X=y
 CONFIG_THUMB2_BAREBOX=y
 CONFIG_ARM_BOARD_APPEND_ATAG=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
diff --git a/arch/arm/configs/am335x_mlo_defconfig b/arch/arm/configs/am335x_mlo_defconfig
index 9734da6..c06519c 100644
--- a/arch/arm/configs/am335x_mlo_defconfig
+++ b/arch/arm/configs/am335x_mlo_defconfig
@@ -6,6 +6,7 @@ CONFIG_MACH_AFI_GF=y
 CONFIG_MACH_BEAGLEBONE=y
 CONFIG_MACH_PCM051=y
 CONFIG_MACH_PFLA03=y
+CONFIG_MACH_PHYTEC_SOM_AM335X=y
 CONFIG_THUMB2_BAREBOX=y
 # CONFIG_MEMINFO is not set
 CONFIG_MMU=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e87e612..a228b2d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -30,6 +30,7 @@ pbl-dtb-$(CONFIG_MACH_PCAAXL3) += imx6q-phytec-pbaa03.dtb.o
 pbl-dtb-$(CONFIG_MACH_PCM038) += imx27-phytec-phycore-rdk.dtb.o
 pbl-dtb-$(CONFIG_MACH_PCM051) += am335x-phytec-phycore-som.dtb.o am335x-phytec-phycore-som-no-spi.dtb.o am335x-phytec-phycore-som-mlo.dtb.o
 pbl-dtb-$(CONFIG_MACH_PFLA03) += am335x-phytec-phyflex-som.dtb.o am335x-phytec-phyflex-som-mlo.dtb.o
+pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am335x-phytec-phyflex-som-mlo.dtb.o am335x-phytec-phycore-som.dtb.o am335x-phytec-phycore-som-no-spi.dtb.o am335x-phytec-phycore-som-mlo.dtb.o
 pbl-dtb-$(CONFIG_MACH_PHYTEC_PFLA02) += imx6s-phytec-pbab01.dtb.o imx6dl-phytec-pbab01.dtb.o imx6q-phytec-pbab01.dtb.o imx6q-phytec-phyboard-alcor.dtb.o imx6dl-phytec-phyboard-subra.dtb.o
 pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += armada-xp-openblocks-ax3-4-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += kirkwood-openblocks_a6-bb.dtb.o
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index 7aa37eb..32efe5c 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -158,6 +158,12 @@ config MACH_PFLA03
 	select ARCH_AM33XX
 	help
 	  Say Y here if you are using Phytecs phyFLEX pfla03 board
+
+config MACH_PHYTEC_SOM_AM335X
+	bool "Phytec AM335X SOMs"
+	select ARCH_AM33XX
+	help
+	  Say Y here if you are using a am335x based Phytecs SOM
 endif
 
 choice
diff --git a/images/Makefile.am33xx b/images/Makefile.am33xx
index 002c103..75dfb9a 100644
--- a/images/Makefile.am33xx
+++ b/images/Makefile.am33xx
@@ -51,6 +51,42 @@ pblx-$(CONFIG_MACH_PFLA03) += start_am33xx_phytec_phyflex_sram_512mb
 FILE_barebox-am33xx-phytec-phyflex-mlo-512mb.img = start_am33xx_phytec_phyflex_sram_512mb.pblx.mlo
 am33xx-mlo-$(CONFIG_MACH_PFLA03) += barebox-am33xx-phytec-phyflex-mlo-512mb.img
 
+pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sdram
+FILE_barebox-am33xx-phytec-phycore.img = start_am33xx_phytec_phycore_sdram.pblx
+am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore.img
+
+pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_no_spi_sdram
+FILE_barebox-am33xx-phytec-phycore-no-spi.img = start_am33xx_phytec_phycore_no_spi_sdram.pblx
+am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-no-spi.img
+
+pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_256mb
+FILE_barebox-am33xx-phytec-phycore-mlo-256mb.img = start_am33xx_phytec_phycore_sram_256mb.pblx.mlo
+am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-256mb.img
+
+pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_128mb
+FILE_barebox-am33xx-phytec-phycore-mlo-128mb.img = start_am33xx_phytec_phycore_sram_128mb.pblx.mlo
+am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-128mb.img
+
+pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_512mb
+FILE_barebox-am33xx-phytec-phycore-mlo-512mb.img = start_am33xx_phytec_phycore_sram_512mb.pblx.mlo
+am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-512mb.img
+
+pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_2x512mb
+FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.img = start_am33xx_phytec_phycore_sram_2x512mb.pblx.mlo
+am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-2x512mb.img
+
+pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_sdram
+FILE_barebox-am33xx-phytec-phyflex.img = start_am33xx_phytec_phyflex_sdram.pblx
+am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phyflex.img
+
+pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_sram_256mb
+FILE_barebox-am33xx-phytec-phyflex-mlo-256mb.img = start_am33xx_phytec_phyflex_sram_256mb.pblx.mlo
+am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phyflex-mlo-256mb.img
+
+pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_sram_512mb
+FILE_barebox-am33xx-phytec-phyflex-mlo-512mb.img = start_am33xx_phytec_phyflex_sram_512mb.pblx.mlo
+am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phyflex-mlo-512mb.img
+
 pblx-$(CONFIG_MACH_BEAGLEBONE) += start_am33xx_beaglebone_sdram
 FILE_barebox-am33xx-beaglebone.img = start_am33xx_beaglebone_sdram.pblx
 am33xx-barebox-$(CONFIG_MACH_BEAGLEBONE) += barebox-am33xx-beaglebone.img
-- 
1.9.1


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[PATCH 4/5] Docs: Add phytec-som-am335x documentation

[Wadim Egorov]

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
---
 Documentation/boards/am335x.rst            | 22 ++++++++++++++++++---
 Documentation/boards/am335x/phytec-som.rst | 31 ++++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/boards/am335x/phytec-som.rst

diff --git a/Documentation/boards/am335x.rst b/Documentation/boards/am335x.rst
index 7959b84..671c3aa 100644
--- a/Documentation/boards/am335x.rst
+++ b/Documentation/boards/am335x.rst
@@ -13,14 +13,20 @@ for the MLO and ``am335x_defconfig`` for the regular barebox image. The
 resulting images will be placed under ``images/``:
 
 ::
+
   barebox-am33xx-afi-gf.img
   barebox-am33xx-afi-gf-mlo.img
   barebox-am33xx-beaglebone.img
   barebox-am33xx-beaglebone-mlo.img
+  barebox-am33xx-phytec-phycore-mlo-256mb.img
+  barebox-am33xx-phytec-phycore-mlo-128mb.img
+  barebox-am33xx-phytec-phycore-mlo-512mb.img
+  barebox-am33xx-phytec-phycore-mlo-2x512mb.img
+  barebox-am33xx-phytec-phyflex-mlo-256mb.img
+  barebox-am33xx-phytec-phyflex-mlo-512mb.img
   barebox-am33xx-phytec-phycore.img
-  barebox-am33xx-phytec-phycore-mlo-1x128m16.img
-  barebox-am33xx-phytec-phycore-mlo-1x256m16.img
-  barebox-am33xx-phytec-phycore-mlo-1x512m16.img
+  barebox-am33xx-phytec-phycore-no-spi.img
+  barebox-am33xx-phytec-phyflex.img
 
 Some boards come in different variants, make sure to pick the correct one.
 
@@ -40,3 +46,13 @@ SD/MMC
 To start barebox from SD/MMC prepare a card with a FAT filesystem. Copy the MLO
 file for your board to the card and name it ``MLO``. Copy the regular image
 for your board to the card and name it ``barebox.bin``.
+
+AM335x Boards
+------
+
+.. toctree::
+  :glob:
+  :numbered:
+  :maxdepth: 1
+
+  am335x/*
diff --git a/Documentation/boards/am335x/phytec-som.rst b/Documentation/boards/am335x/phytec-som.rst
new file mode 100644
index 0000000..b415f7c
--- /dev/null
+++ b/Documentation/boards/am335x/phytec-som.rst
@@ -0,0 +1,31 @@
+Phytec AM335x based SOMs
+========================
+
+The phycore-som-am335x is actually not a real board. It represents a set of
+am335x based Phytec module families and its boards in the barebox.
+You can find out more about the Phytec SOM concept on the website:
+
+  http://phytec.com/products/system-on-modules/
+
+
+Supported modules and boards
+----------------------------
+
+Currently, barebox supports the following SOMs and boards:
+
+  - phyCORE
+
+    - PCM-953
+    - phyBOARD-MAIA
+    - phyBOARD-WEGA
+
+  - phyFLEX
+
+    - PBA-B-01
+
+
+Building phycore-som-am335x
+---------------------------
+
+The phycore-som-am335x boards are covered by the ``am335x_mlo_defconfig``
+for the MLO and ``am335x_defconfig`` for the regular barebox image.
-- 
1.9.1


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[PATCH 5/5] boards: Drop phytec-phycore-am335x, phytec-phyflex-am335x

[Wadim Egorov]

Both boards are now merged in the phycore-som-am335x board.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
---
 arch/arm/boards/Makefile                           |   2 -
 arch/arm/boards/phytec-phycore-am335x/Makefile     |   3 -
 arch/arm/boards/phytec-phycore-am335x/board.c      |  91 ---------
 .../defaultenv-phycore-am335x/boot/mmc             |   8 -
 .../defaultenv-phycore-am335x/boot/nand            |   8 -
 .../defaultenv-phycore-am335x/boot/spi             |   8 -
 .../defaultenv-phycore-am335x/init/bootsource      |  15 --
 .../defaultenv-phycore-am335x/init/init-usbserial  |   4 -
 .../defaultenv-phycore-am335x/nv/bootargs.base     |   1 -
 .../defaultenv-phycore-am335x/nv/hostname          |   1 -
 arch/arm/boards/phytec-phycore-am335x/lowlevel.c   | 215 ---------------------
 arch/arm/boards/phytec-phyflex-am335x/Makefile     |   3 -
 arch/arm/boards/phytec-phyflex-am335x/board.c      |  96 ---------
 .../defaultenv-phyflex-am335x/boot/mmc             |   8 -
 .../defaultenv-phyflex-am335x/boot/nand            |   8 -
 .../defaultenv-phyflex-am335x/boot/spi             |   8 -
 .../defaultenv-phyflex-am335x/init/bootsource      |  15 --
 .../defaultenv-phyflex-am335x/nv/hostname          |   1 -
 .../nv/linux.bootargs.base                         |   1 -
 arch/arm/boards/phytec-phyflex-am335x/lowlevel.c   | 181 -----------------
 arch/arm/configs/am335x_defconfig                  |   2 -
 arch/arm/configs/am335x_mlo_defconfig              |   2 -
 arch/arm/mach-omap/Kconfig                         |  12 --
 images/Makefile.am33xx                             |  36 ----
 24 files changed, 729 deletions(-)
 delete mode 100644 arch/arm/boards/phytec-phycore-am335x/Makefile
 delete mode 100644 arch/arm/boards/phytec-phycore-am335x/board.c
 delete mode 100644 arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/mmc
 delete mode 100644 arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/nand
 delete mode 100644 arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/spi
 delete mode 100644 arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/init/bootsource
 delete mode 100644 arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/init/init-usbserial
 delete mode 100644 arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/nv/bootargs.base
 delete mode 100644 arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/nv/hostname
 delete mode 100644 arch/arm/boards/phytec-phycore-am335x/lowlevel.c
 delete mode 100644 arch/arm/boards/phytec-phyflex-am335x/Makefile
 delete mode 100644 arch/arm/boards/phytec-phyflex-am335x/board.c
 delete mode 100644 arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/mmc
 delete mode 100644 arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/nand
 delete mode 100644 arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/spi
 delete mode 100644 arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/init/bootsource
 delete mode 100644 arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/nv/hostname
 delete mode 100644 arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/nv/linux.bootargs.base
 delete mode 100644 arch/arm/boards/phytec-phyflex-am335x/lowlevel.c

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 88de2b6..4662f53 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -78,8 +78,6 @@ obj-$(CONFIG_MACH_PCM037)			+= phytec-phycore-imx31/
 obj-$(CONFIG_MACH_PCM038)			+= phytec-phycore-imx27/
 obj-$(CONFIG_MACH_PCM043)			+= phytec-phycore-imx35/
 obj-$(CONFIG_MACH_PCM049)			+= phytec-phycore-omap4460/
-obj-$(CONFIG_MACH_PCM051)			+= phytec-phycore-am335x/
-obj-$(CONFIG_MACH_PFLA03)			+= phytec-phyflex-am335x/
 obj-$(CONFIG_MACH_PHYTEC_SOM_AM335X)		+= phytec-som-am335x/
 obj-$(CONFIG_MACH_PHYTEC_PFLA02)		+= phytec-phyflex-imx6/
 obj-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3)	+= plathome-openblocks-ax3/
diff --git a/arch/arm/boards/phytec-phycore-am335x/Makefile b/arch/arm/boards/phytec-phycore-am335x/Makefile
deleted file mode 100644
index 173a6b6..0000000
--- a/arch/arm/boards/phytec-phycore-am335x/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-lwl-y += lowlevel.o
-obj-y += board.o
-bbenv-y += defaultenv-phycore-am335x
diff --git a/arch/arm/boards/phytec-phycore-am335x/board.c b/arch/arm/boards/phytec-phycore-am335x/board.c
deleted file mode 100644
index 61a11cf..0000000
--- a/arch/arm/boards/phytec-phycore-am335x/board.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * pcm051 - phyCORE-AM335x Board Initalization Code
- *
- * Copyright (C) 2012 Teresa Gámez, Phytec Messtechnik GmbH
- *
- * Based on arch/arm/boards/omap/board-beagle.c
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#include <bootsource.h>
-#include <common.h>
-#include <nand.h>
-#include <init.h>
-#include <io.h>
-#include <linux/sizes.h>
-#include <envfs.h>
-#include <asm/armlinux.h>
-#include <generated/mach-types.h>
-#include <linux/phy.h>
-#include <mach/am33xx-generic.h>
-#include <mach/am33xx-silicon.h>
-#include <mach/bbu.h>
-
-
-static int pcm051_coredevice_init(void)
-{
-	if (!of_machine_is_compatible("phytec,phycore-am335x-som"))
-		return 0;
-
-	am33xx_register_ethaddr(0, 0);
-	return 0;
-}
-coredevice_initcall(pcm051_coredevice_init);
-
-static struct omap_barebox_part pcm051_barebox_part = {
-	.nand_offset = SZ_512K,
-	.nand_size = SZ_512K,
-	.nor_offset = SZ_128K,
-	.nor_size = SZ_512K,
-};
-
-static char *xloadslots[] = {
-	"/dev/nand0.xload.bb",
-	"/dev/nand0.xload_backup1.bb",
-	"/dev/nand0.xload_backup2.bb",
-	"/dev/nand0.xload_backup3.bb"
-};
-
-static int pcm051_devices_init(void)
-{
-	if (!of_machine_is_compatible("phytec,phycore-am335x-som"))
-		return 0;
-
-	switch (bootsource_get()) {
-	case BOOTSOURCE_SPI:
-		of_device_enable_path("/chosen/environment-spi");
-		break;
-	case BOOTSOURCE_MMC:
-		omap_set_bootmmc_devname("mmc0");
-		break;
-	default:
-		of_device_enable_path("/chosen/environment-nand");
-		break;
-	}
-
-	omap_set_barebox_part(&pcm051_barebox_part);
-	armlinux_set_architecture(MACH_TYPE_PCM051);
-	defaultenv_append_directory(defaultenv_phycore_am335x);
-
-	am33xx_bbu_spi_nor_mlo_register_handler("MLO.spi", "/dev/m25p0.xload");
-	am33xx_bbu_spi_nor_register_handler("spi", "/dev/m25p0.barebox");
-	am33xx_bbu_nand_xloadslots_register_handler("MLO.nand",
-		xloadslots, ARRAY_SIZE(xloadslots));
-	am33xx_bbu_nand_register_handler("nand", "/dev/nand0.barebox.bb");
-
-	if (IS_ENABLED(CONFIG_SHELL_NONE))
-		return am33xx_of_register_bootdevice();
-
-	return 0;
-}
-device_initcall(pcm051_devices_init);
diff --git a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/mmc b/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/mmc
deleted file mode 100644
index 6a60761..0000000
--- a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/mmc
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/sh
-
-global.bootm.image=/boot/linuximage
-#global.bootm.oftree=/boot/oftree
-
-bootargs-ip
-
-global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2 rootfstype=ext3 rw rootwait"
diff --git a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/nand b/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/nand
deleted file mode 100644
index 1dfbef9..0000000
--- a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/nand
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/sh
-
-global.bootm.image="/dev/nand0.kernel.bb"
-#global.bootm.oftree="/env/oftree"
-
-bootargs-ip
-
-global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=root rw rootfstype=ubifs"
diff --git a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/spi b/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/spi
deleted file mode 100644
index 2f858bd..0000000
--- a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/spi
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/sh
-
-global.bootm.image="/dev/m25p0.kernel"
-
-bootargs-ip
-
-# Use rootfs from NAND
-global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=nand0.root,2048 rw rootfstype=ubifs"
diff --git a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/init/bootsource b/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/init/bootsource
deleted file mode 100644
index 3f2ff4b..0000000
--- a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/init/bootsource
+++ /dev/null
@@ -1,15 +0,0 @@
-#!/bin/sh
-
-if [ -n "$nv.boot.default" ]; then
-	exit
-fi
-
-if [ $bootsource = mmc ]; then
-	global.boot.default="mmc nand spi net"
-elif [ $bootsource = nand ]; then
-	global.boot.default="nand spi mmc net"
-elif [ $bootsource = spi ]; then
-	global.boot.default="spi nand mmc net"
-elif [ $bootsource = net ]; then
-	global.boot.default="net nand spi mmc"
-fi
diff --git a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/init/init-usbserial b/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/init/init-usbserial
deleted file mode 100644
index a154fd1..0000000
--- a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/init/init-usbserial
+++ /dev/null
@@ -1,4 +0,0 @@
-#!/bin/sh
-
-#otg1.mode=peripheral
-usbgadget -a -A /dev/nand0.kernel.bb(kernel)
diff --git a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/nv/bootargs.base b/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/nv/bootargs.base
deleted file mode 100644
index d7b01a1..0000000
--- a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/nv/bootargs.base
+++ /dev/null
@@ -1 +0,0 @@
-console=ttyO0,115200
diff --git a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/nv/hostname b/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/nv/hostname
deleted file mode 100644
index 988ab6d..0000000
--- a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/nv/hostname
+++ /dev/null
@@ -1 +0,0 @@
-pcm051
diff --git a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
deleted file mode 100644
index 843929e..0000000
--- a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
+++ /dev/null
@@ -1,215 +0,0 @@
-#include <common.h>
-#include <linux/sizes.h>
-#include <io.h>
-#include <init.h>
-#include <asm/barebox-arm-head.h>
-#include <asm/barebox-arm.h>
-#include <mach/am33xx-silicon.h>
-#include <mach/am33xx-clock.h>
-#include <mach/generic.h>
-#include <mach/sdrc.h>
-#include <mach/sys_info.h>
-#include <mach/syslib.h>
-#include <mach/am33xx-mux.h>
-#include <mach/am33xx-generic.h>
-#include <mach/wdt.h>
-#include <debug_ll.h>
-
-static const struct am33xx_cmd_control pcm051_cmd = {
-	.slave_ratio0 = 0x80,
-	.dll_lock_diff0 = 0x0,
-	.invert_clkout0 = 0x0,
-	.slave_ratio1 = 0x80,
-	.dll_lock_diff1 = 0x0,
-	.invert_clkout1 = 0x0,
-	.slave_ratio2 = 0x80,
-	.dll_lock_diff2 = 0x0,
-	.invert_clkout2 = 0x0,
-};
-
-struct pcm051_sdram_timings {
-	struct am33xx_emif_regs regs;
-	struct am33xx_ddr_data data;
-};
-
-enum {
-	MT41J128M16125IT_256MB,
-	MT41J64M1615IT_128MB,
-	MT41J256M16HA15EIT_512MB,
-	MT41J512M8125IT_2x512MB,
-};
-
-struct pcm051_sdram_timings timings[] = {
-	/* 256MB */
-	[MT41J128M16125IT_256MB] = {
-		.regs = {
-			.emif_read_latency	= 0x7,
-			.emif_tim1		= 0x0AAAD4DB,
-			.emif_tim2		= 0x26437FDA,
-			.emif_tim3		= 0x501F83FF,
-			.sdram_config		= 0x61C052B2,
-			.zq_config		= 0x50074BE4,
-			.sdram_ref_ctrl		= 0x00000C30,
-		},
-		.data = {
-			.rd_slave_ratio0	= 0x3B,
-			.wr_dqs_slave_ratio0	= 0x33,
-			.fifo_we_slave_ratio0	= 0x9c,
-			.wr_slave_ratio0	= 0x6f,
-		},
-	},
-
-	/* 128MB */
-	[MT41J64M1615IT_128MB] = {
-		.regs =  {
-			.emif_read_latency	= 0x7,
-			.emif_tim1		= 0x0AAAE4DB,
-			.emif_tim2		= 0x262F7FDA,
-			.emif_tim3		= 0x501F82BF,
-			.sdram_config		= 0x61C05232,
-			.zq_config		= 0x50074BE4,
-			.sdram_ref_ctrl		= 0x00000C30,
-		},
-		.data = {
-			.rd_slave_ratio0	= 0x38,
-			.wr_dqs_slave_ratio0	= 0x34,
-			.fifo_we_slave_ratio0	= 0xA2,
-			.wr_slave_ratio0	= 0x72,
-		},
-	},
-
-	/* 512MB */
-	[MT41J256M16HA15EIT_512MB] = {
-		.regs = {
-			.emif_read_latency	= 0x7,
-			.emif_tim1		= 0x0AAAE4DB,
-			.emif_tim2		= 0x266B7FDA,
-			.emif_tim3		= 0x501F867F,
-			.sdram_config		= 0x61C05332,
-			.zq_config		= 0x50074BE4,
-			.sdram_ref_ctrl		= 0x00000C30
-		},
-		.data = {
-			.rd_slave_ratio0	= 0x35,
-			.wr_dqs_slave_ratio0	= 0x43,
-			.fifo_we_slave_ratio0	= 0x97,
-			.wr_slave_ratio0	= 0x7b,
-		},
-	},
-
-	/* 1024MB */
-	[MT41J512M8125IT_2x512MB] = {
-		.regs = {
-			.emif_read_latency	= 0x7,
-			.emif_tim1		= 0x0AAAE4DB,
-			.emif_tim2		= 0x266B7FDA,
-			.emif_tim3		= 0x501F867F,
-			.sdram_config		= 0x61C053B2,
-			.zq_config		= 0x50074BE4,
-			.sdram_ref_ctrl		= 0x00000C30
-		},
-		.data = {
-			.rd_slave_ratio0	= 0x32,
-			.wr_dqs_slave_ratio0	= 0x48,
-			.fifo_we_slave_ratio0	= 0x99,
-			.wr_slave_ratio0	= 0x80,
-		},
-	},
-};
-
-extern char __dtb_am335x_phytec_phycore_som_start[];
-extern char __dtb_am335x_phytec_phycore_som_mlo_start[];
-extern char __dtb_am335x_phytec_phycore_som_no_spi_start[];
-
-/**
- * @brief The basic entry point for board initialization.
- *
- * This is called as part of machine init (after arch init).
- * This is again called with stack in SRAM, so not too many
- * constructs possible here.
- *
- * @return void
- */
-static noinline void pcm051_board_init(int sdram)
-{
-	void *fdt;
-	struct pcm051_sdram_timings *timing = &timings[sdram];
-
-	/* WDT1 is already running when the bootloader gets control
-	 * Disable it to avoid "random" resets
-	 */
-	writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR));
-	while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);
-
-	writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
-	while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);
-
-	am33xx_pll_init(MPUPLL_M_600, 25, DDRPLL_M_400);
-
-	am335x_sdram_init(0x18B, &pcm051_cmd,
-			&timing->regs,
-			&timing->data);
-
-	am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE);
-	am33xx_enable_uart0_pin_mux();
-	omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
-	putc_ll('>');
-
-	fdt = __dtb_am335x_phytec_phycore_som_mlo_start - get_runtime_offset();
-
-	am335x_barebox_entry(fdt);
-}
-
-static noinline void pcm051_board_entry(unsigned long bootinfo, int sdram)
-{
-	am33xx_save_bootinfo((void *)bootinfo);
-
-	arm_cpu_lowlevel_init();
-
-	/*
-	 * Setup C environment, the board init code uses global variables.
-	 * Stackpointer has already been initialized by the ROM code.
-	 */
-	relocate_to_current_adr();
-	setup_c();
-
-	pcm051_board_init(sdram);
-}
-
-ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_256mb, bootinfo, r1, r2)
-{
-	pcm051_board_entry(bootinfo, MT41J128M16125IT_256MB);
-}
-
-ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_128mb, bootinfo, r1, r2)
-{
-	pcm051_board_entry(bootinfo, MT41J64M1615IT_128MB);
-}
-
-ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_512mb, bootinfo, r1, r2)
-{
-	pcm051_board_entry(bootinfo, MT41J256M16HA15EIT_512MB);
-}
-
-ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_2x512mb, bootinfo, r1, r2)
-{
-	pcm051_board_entry(bootinfo, MT41J512M8125IT_2x512MB);
-}
-
-ENTRY_FUNCTION(start_am33xx_phytec_phycore_sdram, r0, r1, r2)
-{
-	void *fdt;
-
-	fdt = __dtb_am335x_phytec_phycore_som_start - get_runtime_offset();
-
-	am335x_barebox_entry(fdt);
-}
-
-ENTRY_FUNCTION(start_am33xx_phytec_phycore_no_spi_sdram, r0, r1, r2)
-{
-	void *fdt;
-
-	fdt = __dtb_am335x_phytec_phycore_som_no_spi_start - get_runtime_offset();
-
-	am335x_barebox_entry(fdt);
-}
diff --git a/arch/arm/boards/phytec-phyflex-am335x/Makefile b/arch/arm/boards/phytec-phyflex-am335x/Makefile
deleted file mode 100644
index 54734b5..0000000
--- a/arch/arm/boards/phytec-phyflex-am335x/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-lwl-y += lowlevel.o
-obj-y += board.o
-bbenv-y += defaultenv-phyflex-am335x
diff --git a/arch/arm/boards/phytec-phyflex-am335x/board.c b/arch/arm/boards/phytec-phyflex-am335x/board.c
deleted file mode 100644
index aed5c31..0000000
--- a/arch/arm/boards/phytec-phyflex-am335x/board.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * pfla03 - phyFLEX-AM335x Board Initalization Code
- *
- * Copyright (C) 2014 Stefan Müller-Klieser, Phytec Messtechnik GmbH
- *
- * Based on arch/arm/boards/omap/board-beagle.c
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#include <bootsource.h>
-#include <common.h>
-#include <nand.h>
-#include <init.h>
-#include <io.h>
-#include <linux/sizes.h>
-#include <envfs.h>
-#include <asm/armlinux.h>
-#include <generated/mach-types.h>
-#include <linux/phy.h>
-#include <linux/micrel_phy.h>
-#include <mach/am33xx-generic.h>
-#include <mach/am33xx-silicon.h>
-#include <mach/bbu.h>
-
-static int pfla03_coredevice_init(void)
-{
-	if (!of_machine_is_compatible("phytec,phyflex-am335x-som"))
-		return 0;
-
-	am33xx_register_ethaddr(0, 0);
-	am33xx_register_ethaddr(1, 1);
-
-	return 0;
-}
-coredevice_initcall(pfla03_coredevice_init);
-
-static struct omap_barebox_part pfla03_barebox_part = {
-	.nand_offset = SZ_512K,
-	.nand_size = SZ_512K,
-	.nor_offset = SZ_128K,
-	.nor_size = SZ_512K,
-};
-
-static char *xloadslots[] = {
-	"/dev/nand0.xload.bb",
-	"/dev/nand0.xload_backup1.bb",
-	"/dev/nand0.xload_backup2.bb",
-	"/dev/nand0.xload_backup3.bb"
-};
-
-static int pfla03_devices_init(void)
-{
-	if (!of_machine_is_compatible("phytec,phyflex-am335x-som"))
-		return 0;
-
-	switch (bootsource_get()) {
-	case BOOTSOURCE_SPI:
-		of_device_enable_path("/chosen/environment-spi");
-		break;
-	case BOOTSOURCE_MMC:
-		omap_set_bootmmc_devname("mmc0");
-		break;
-	default:
-		of_device_enable_path("/chosen/environment-nand");
-		break;
-	}
-
-	omap_set_barebox_part(&pfla03_barebox_part);
-	armlinux_set_architecture(MACH_TYPE_PFLA03);
-	defaultenv_append_directory(defaultenv_phyflex_am335x);
-
-	am33xx_select_rmii2_crs_dv();
-
-	am33xx_bbu_spi_nor_mlo_register_handler("MLO.spi", "/dev/m25p0.xload");
-	am33xx_bbu_spi_nor_register_handler("spi", "/dev/m25p0.barebox");
-	am33xx_bbu_nand_xloadslots_register_handler("MLO.nand",
-		xloadslots, ARRAY_SIZE(xloadslots));
-	am33xx_bbu_nand_register_handler("nand", "/dev/nand0.barebox.bb");
-
-	if (IS_ENABLED(CONFIG_SHELL_NONE))
-		return am33xx_of_register_bootdevice();
-
-
-	return 0;
-}
-device_initcall(pfla03_devices_init);
diff --git a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/mmc b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/mmc
deleted file mode 100644
index 6a60761..0000000
--- a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/mmc
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/sh
-
-global.bootm.image=/boot/linuximage
-#global.bootm.oftree=/boot/oftree
-
-bootargs-ip
-
-global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2 rootfstype=ext3 rw rootwait"
diff --git a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/nand b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/nand
deleted file mode 100644
index 1dfbef9..0000000
--- a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/nand
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/sh
-
-global.bootm.image="/dev/nand0.kernel.bb"
-#global.bootm.oftree="/env/oftree"
-
-bootargs-ip
-
-global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=root rw rootfstype=ubifs"
diff --git a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/spi b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/spi
deleted file mode 100644
index 2f858bd..0000000
--- a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/spi
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/sh
-
-global.bootm.image="/dev/m25p0.kernel"
-
-bootargs-ip
-
-# Use rootfs from NAND
-global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=nand0.root,2048 rw rootfstype=ubifs"
diff --git a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/init/bootsource b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/init/bootsource
deleted file mode 100644
index 3f2ff4b..0000000
--- a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/init/bootsource
+++ /dev/null
@@ -1,15 +0,0 @@
-#!/bin/sh
-
-if [ -n "$nv.boot.default" ]; then
-	exit
-fi
-
-if [ $bootsource = mmc ]; then
-	global.boot.default="mmc nand spi net"
-elif [ $bootsource = nand ]; then
-	global.boot.default="nand spi mmc net"
-elif [ $bootsource = spi ]; then
-	global.boot.default="spi nand mmc net"
-elif [ $bootsource = net ]; then
-	global.boot.default="net nand spi mmc"
-fi
diff --git a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/nv/hostname b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/nv/hostname
deleted file mode 100644
index 09c5821..0000000
--- a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/nv/hostname
+++ /dev/null
@@ -1 +0,0 @@
-pfla03
diff --git a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/nv/linux.bootargs.base b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/nv/linux.bootargs.base
deleted file mode 100644
index d7b01a1..0000000
--- a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/nv/linux.bootargs.base
+++ /dev/null
@@ -1 +0,0 @@
-console=ttyO0,115200
diff --git a/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c b/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c
deleted file mode 100644
index f6029cd..0000000
--- a/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * pfla03 - phyFLEX-AM335x lowlevel code
- *
- * Copyright (C) 2014 Stefan Müller-Klieser, Phytec Messtechnik GmbH
- *
- * Based on arch/arm/boards/omap/board-beagle.c
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#include <common.h>
-#include <linux/sizes.h>
-#include <io.h>
-#include <init.h>
-#include <asm/barebox-arm-head.h>
-#include <asm/barebox-arm.h>
-#include <mach/am33xx-silicon.h>
-#include <mach/am33xx-clock.h>
-#include <mach/generic.h>
-#include <mach/sdrc.h>
-#include <mach/sys_info.h>
-#include <mach/syslib.h>
-#include <mach/am33xx-mux.h>
-#include <mach/am33xx-generic.h>
-#include <mach/wdt.h>
-#include <debug_ll.h>
-
-#define CLK_M_OSC_MHZ	25
-#define DDR_IOCTRL	0x18B
-
-static const struct am33xx_cmd_control pfla03_cmd = {
-	.slave_ratio0	= 0x80,
-	.dll_lock_diff0	= 0x0,
-	.invert_clkout0	= 0x0,
-	.slave_ratio1	= 0x80,
-	.dll_lock_diff1	= 0x0,
-	.invert_clkout1	= 0x0,
-	.slave_ratio2	= 0x80,
-	.dll_lock_diff2	= 0x0,
-	.invert_clkout2	= 0x0,
-};
-
-struct pfla03_sdram_timings {
-	struct am33xx_emif_regs regs;
-	struct am33xx_ddr_data data;
-};
-
-enum {
-	MT41K128M16JT_256MB,
-	MT41K256M16HA_512MB,
-};
-
-struct pfla03_sdram_timings pfla03_timings[] = {
-	/* 256 MB */
-	[MT41K128M16JT_256MB] = {
-		.regs = {
-			.emif_read_latency	= 0x7,
-			.emif_tim1		= 0x0AAAD4DB,
-			.emif_tim2		= 0x26437FDA,
-			.emif_tim3		= 0x501F83FF,
-			.sdram_config		= 0x61C052B2,
-			.zq_config		= 0x50074BE4,
-			.sdram_ref_ctrl		= 0x00000C30,
-		},
-		.data = {
-			.rd_slave_ratio0	= 0x34,
-			.wr_dqs_slave_ratio0	= 0x47,
-			.fifo_we_slave_ratio0	= 0x9a,
-			.wr_slave_ratio0	= 0x7e,
-			.use_rank0_delay	= 0x0,
-			.dll_lock_diff0		= 0x0,
-		},
-	},
-	/* 512 MB */
-	[MT41K256M16HA_512MB] = {
-		.regs = {
-			.emif_read_latency	= 0x7,
-			.emif_tim1		= 0x0AAAE4DB,
-			.emif_tim2		= 0x266B7FDA,
-			.emif_tim3		= 0x501F867F,
-			.sdram_config		= 0x61C05332,
-			.zq_config		= 0x50074BE4,
-			.sdram_ref_ctrl		= 0x00000C30,
-		},
-		.data = {
-			.rd_slave_ratio0	= 0x36,
-			.wr_dqs_slave_ratio0	= 0x47,
-			.fifo_we_slave_ratio0	= 0x95,
-			.wr_slave_ratio0	= 0x7f,
-			.use_rank0_delay	= 0x0,
-			.dll_lock_diff0		= 0x0,
-		},
-	},
-};
-
-extern char __dtb_am335x_phytec_phyflex_som_start[];
-extern char __dtb_am335x_phytec_phyflex_som_mlo_start[];
-
-/**
- * @brief The basic entry point for board initialization.
- *
- * This is called as part of machine init (after arch init).
- * This is again called with stack in SRAM, so not too many
- * constructs possible here.
- *
- * @return void
- */
-static noinline void pfla03_board_init(int sdram)
-{
-	void *fdt;
-	struct pfla03_sdram_timings *timing = &pfla03_timings[sdram];
-
-	/*
-	 * WDT1 is already running when the bootloader gets control
-	 * Disable it to avoid "random" resets
-	 */
-	writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR));
-	while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);
-
-	writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
-	while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);
-
-	am33xx_pll_init(MPUPLL_M_600, CLK_M_OSC_MHZ, DDRPLL_M_400);
-
-	am335x_sdram_init(DDR_IOCTRL, &pfla03_cmd,
-			&timing->regs,
-			&timing->data);
-
-	am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE);
-	am33xx_enable_uart0_pin_mux();
-	omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
-	putc_ll('>');
-
-	fdt = __dtb_am335x_phytec_phyflex_som_mlo_start - get_runtime_offset();
-
-	am335x_barebox_entry(fdt);
-}
-
-static noinline void pfla03_board_entry(unsigned long bootinfo, int sdram)
-{
-	am33xx_save_bootinfo((void *)bootinfo);
-
-	arm_cpu_lowlevel_init();
-
-	/*
-	 * Setup C environment, the board init code uses global variables.
-	 * Stackpointer has already been initialized by the ROM code.
-	 */
-	relocate_to_current_adr();
-	setup_c();
-
-	pfla03_board_init(sdram);
-}
-
-ENTRY_FUNCTION(start_am33xx_phytec_phyflex_sram_256mb, bootinfo, r1, r2)
-{
-	pfla03_board_entry(bootinfo, MT41K128M16JT_256MB);
-}
-
-ENTRY_FUNCTION(start_am33xx_phytec_phyflex_sram_512mb, bootinfo, r1, r2)
-{
-	pfla03_board_entry(bootinfo, MT41K256M16HA_512MB);
-}
-
-ENTRY_FUNCTION(start_am33xx_phytec_phyflex_sdram, r0, r1, r2)
-{
-	void *fdt;
-
-	fdt = __dtb_am335x_phytec_phyflex_som_start - get_runtime_offset();
-
-	am335x_barebox_entry(fdt);
-}
diff --git a/arch/arm/configs/am335x_defconfig b/arch/arm/configs/am335x_defconfig
index 5387548..f34a4c6 100644
--- a/arch/arm/configs/am335x_defconfig
+++ b/arch/arm/configs/am335x_defconfig
@@ -4,8 +4,6 @@ CONFIG_BAREBOX_UPDATE_AM33XX_NAND=y
 CONFIG_OMAP_MULTI_BOARDS=y
 CONFIG_MACH_AFI_GF=y
 CONFIG_MACH_BEAGLEBONE=y
-CONFIG_MACH_PCM051=y
-CONFIG_MACH_PFLA03=y
 CONFIG_MACH_PHYTEC_SOM_AM335X=y
 CONFIG_THUMB2_BAREBOX=y
 CONFIG_ARM_BOARD_APPEND_ATAG=y
diff --git a/arch/arm/configs/am335x_mlo_defconfig b/arch/arm/configs/am335x_mlo_defconfig
index c06519c..1dd7567 100644
--- a/arch/arm/configs/am335x_mlo_defconfig
+++ b/arch/arm/configs/am335x_mlo_defconfig
@@ -4,8 +4,6 @@ CONFIG_OMAP_SERIALBOOT=y
 CONFIG_OMAP_MULTI_BOARDS=y
 CONFIG_MACH_AFI_GF=y
 CONFIG_MACH_BEAGLEBONE=y
-CONFIG_MACH_PCM051=y
-CONFIG_MACH_PFLA03=y
 CONFIG_MACH_PHYTEC_SOM_AM335X=y
 CONFIG_THUMB2_BAREBOX=y
 # CONFIG_MEMINFO is not set
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index 32efe5c..444ddf8 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -147,18 +147,6 @@ config MACH_BEAGLEBONE
 	help
 	  Say Y here if you are using Beagle Bone
 
-config MACH_PCM051
-	bool "Phytec phyCORE pcm051"
-	select ARCH_AM33XX
-	help
-	  Say Y here if you are using Phytecs phyCORE pcm051 board
-
-config MACH_PFLA03
-	bool "Phytec phyFLEX am335x pfla03"
-	select ARCH_AM33XX
-	help
-	  Say Y here if you are using Phytecs phyFLEX pfla03 board
-
 config MACH_PHYTEC_SOM_AM335X
 	bool "Phytec AM335X SOMs"
 	select ARCH_AM33XX
diff --git a/images/Makefile.am33xx b/images/Makefile.am33xx
index 75dfb9a..00e0092 100644
--- a/images/Makefile.am33xx
+++ b/images/Makefile.am33xx
@@ -15,42 +15,6 @@ pblx-$(CONFIG_MACH_AFI_GF) += start_am33xx_afi_gf_sram
 FILE_barebox-am33xx-afi-gf-mlo.img = start_am33xx_afi_gf_sram.pblx.mlo
 am33xx-mlo-$(CONFIG_MACH_AFI_GF) += barebox-am33xx-afi-gf-mlo.img
 
-pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sdram
-FILE_barebox-am33xx-phytec-phycore.img = start_am33xx_phytec_phycore_sdram.pblx
-am33xx-barebox-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore.img
-
-pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_no_spi_sdram
-FILE_barebox-am33xx-phytec-phycore-no-spi.img = start_am33xx_phytec_phycore_no_spi_sdram.pblx
-am33xx-barebox-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore-no-spi.img
-
-pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sram_256mb
-FILE_barebox-am33xx-phytec-phycore-mlo-256mb.img = start_am33xx_phytec_phycore_sram_256mb.pblx.mlo
-am33xx-mlo-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore-mlo-256mb.img
-
-pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sram_128mb
-FILE_barebox-am33xx-phytec-phycore-mlo-128mb.img = start_am33xx_phytec_phycore_sram_128mb.pblx.mlo
-am33xx-mlo-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore-mlo-128mb.img
-
-pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sram_512mb
-FILE_barebox-am33xx-phytec-phycore-mlo-512mb.img = start_am33xx_phytec_phycore_sram_512mb.pblx.mlo
-am33xx-mlo-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore-mlo-512mb.img
-
-pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sram_2x512mb
-FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.img = start_am33xx_phytec_phycore_sram_2x512mb.pblx.mlo
-am33xx-mlo-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore-mlo-2x512mb.img
-
-pblx-$(CONFIG_MACH_PFLA03) += start_am33xx_phytec_phyflex_sdram
-FILE_barebox-am33xx-phytec-phyflex.img = start_am33xx_phytec_phyflex_sdram.pblx
-am33xx-barebox-$(CONFIG_MACH_PFLA03) += barebox-am33xx-phytec-phyflex.img
-
-pblx-$(CONFIG_MACH_PFLA03) += start_am33xx_phytec_phyflex_sram_256mb
-FILE_barebox-am33xx-phytec-phyflex-mlo-256mb.img = start_am33xx_phytec_phyflex_sram_256mb.pblx.mlo
-am33xx-mlo-$(CONFIG_MACH_PFLA03) += barebox-am33xx-phytec-phyflex-mlo-256mb.img
-
-pblx-$(CONFIG_MACH_PFLA03) += start_am33xx_phytec_phyflex_sram_512mb
-FILE_barebox-am33xx-phytec-phyflex-mlo-512mb.img = start_am33xx_phytec_phyflex_sram_512mb.pblx.mlo
-am33xx-mlo-$(CONFIG_MACH_PFLA03) += barebox-am33xx-phytec-phyflex-mlo-512mb.img
-
 pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sdram
 FILE_barebox-am33xx-phytec-phycore.img = start_am33xx_phytec_phycore_sdram.pblx
 am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore.img
-- 
1.9.1


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Re: [PATCH 1/5] ARM: am335x: phyFLEX-AM335x: Split DT and add MLO DT

[Sascha Hauer]

On Wed, Feb 04, 2015 at 03:00:49PM +0100, Wadim Egorov wrote:
> To support different module variants, this patch splits the phyFLEX DT
> in dts and dtsi.
> 
> And we are also adding a DT for the MLO, which has all bootable devices
> disabled. The bootsource is checked in the board file and only the needed
> device is enabled and registered.
> 
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> ---
>  arch/arm/boards/phytec-phyflex-am335x/board.c    |   4 +
>  arch/arm/boards/phytec-phyflex-am335x/lowlevel.c |   7 +-
>  arch/arm/dts/Makefile                            |   2 +-
>  arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts   |  28 ++
>  arch/arm/dts/am335x-phytec-phyflex-som.dts       |  24 ++
>  arch/arm/dts/am335x-phytec-phyflex-som.dtsi      | 362 ++++++++++++++++++++++
>  arch/arm/dts/am335x-phytec-phyflex.dts           | 368 -----------------------
>  7 files changed, 423 insertions(+), 372 deletions(-)
>  create mode 100644 arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts
>  create mode 100644 arch/arm/dts/am335x-phytec-phyflex-som.dts
>  create mode 100644 arch/arm/dts/am335x-phytec-phyflex-som.dtsi
>  delete mode 100644 arch/arm/dts/am335x-phytec-phyflex.dts

Applied all, thanks

BTW we will probably get device tree overlay support soon. I hope that
can make such SoMs easier to handle. You could then have some core
device tree builtin and load the rest later.

Sascha

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