From: Lucas Stach <dev@lynxeye.de>
To: barebox@lists.infradead.org
Subject: [PATCH] tegra: avp_init: write DT address register earlier
Date: Mon, 2 Mar 2015 22:47:20 +0100 [thread overview]
Message-ID: <1425332840-13427-1-git-send-email-dev@lynxeye.de> (raw)
Otherwise the write would be skipped if we are already running on the main CPU
cluster. In practice this means that a second stage barebox will reuse the DT
of the first stage, instead of using it's own.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
Sascha, it would be nice if you could squeeze into master as this is
clearly a simple bugfix.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
arch/arm/mach-tegra/tegra_avp_init.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-tegra/tegra_avp_init.c b/arch/arm/mach-tegra/tegra_avp_init.c
index 619fecf..91fd894 100644
--- a/arch/arm/mach-tegra/tegra_avp_init.c
+++ b/arch/arm/mach-tegra/tegra_avp_init.c
@@ -262,6 +262,9 @@ void tegra_avp_reset_vector(uint32_t boarddata)
int num_cores;
unsigned int entry_address = 0;
+ /* put boarddata in scratch reg, for main CPU to fetch after startup */
+ writel(boarddata, TEGRA_PMC_BASE + PMC_SCRATCH(10));
+
if (tegra_cpu_is_maincomplex())
tegra_maincomplex_entry();
@@ -291,9 +294,6 @@ void tegra_avp_reset_vector(uint32_t boarddata)
}
writel(entry_address, TEGRA_EXCEPTION_VECTORS_BASE + 0x100);
- /* put boarddata in scratch reg, for main CPU to fetch after startup */
- writel(boarddata, TEGRA_PMC_BASE + PMC_SCRATCH(10));
-
/* bring up main CPU complex */
start_cpu0_clocks();
maincomplex_powerup();
--
2.1.0
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next reply other threads:[~2015-03-02 21:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-02 21:47 Lucas Stach [this message]
2015-03-03 7:38 ` Sascha Hauer
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