From: Andrey Panov <rockford@yandex.ru>
To: barebox@lists.infradead.org
Subject: [PATCH v2 03/18] CLK: Add fractional divider clock support from Linux kernel
Date: Wed, 4 Mar 2015 23:11:31 +0300 [thread overview]
Message-ID: <1425499906-32125-4-git-send-email-rockford@yandex.ru> (raw)
In-Reply-To: <1425499906-32125-1-git-send-email-rockford@yandex.ru>
Signed-off-by: Andrey Panov <rockford@yandex.ru>
---
drivers/clk/Makefile | 3 +-
drivers/clk/clk-fractional-divider.c | 152 +++++++++++++++++++++++++++++++++++
include/linux/clk.h | 9 +++
3 files changed, 163 insertions(+), 1 deletion(-)
create mode 100644 drivers/clk/clk-fractional-divider.c
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 9df98c8..47ed7b1 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -1,5 +1,6 @@
obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed.o clk-divider.o clk-fixed-factor.o \
- clk-mux.o clk-gate.o clk-composite.o
+ clk-mux.o clk-gate.o clk-composite.o \
+ clk-fractional-divider.o
obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o
obj-$(CONFIG_ARCH_MVEBU) += mvebu/
diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c
new file mode 100644
index 0000000..59b98aa
--- /dev/null
+++ b/drivers/clk/clk-fractional-divider.c
@@ -0,0 +1,152 @@
+/*
+ * Copyright (C) 2014 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Adjustable fractional divider clock implementation.
+ * Output rate = (m / n) * parent_rate.
+ */
+
+#include <common.h>
+#include <io.h>
+#include <malloc.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/gcd.h>
+#include <linux/math64.h>
+#include <linux/barebox-wrapper.h>
+
+#define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, clk)
+
+struct clk_fractional_divider {
+ struct clk clk;
+ void __iomem *reg;
+ u8 mshift;
+ u32 mmask;
+ u8 nshift;
+ u32 nmask;
+ u8 flags;
+};
+
+static unsigned long clk_fd_recalc_rate(struct clk *hw,
+ unsigned long parent_rate)
+{
+ struct clk_fractional_divider *fd = to_clk_fd(hw);
+ u32 val, m, n;
+ u64 ret;
+
+ val = readl(fd->reg);
+
+ m = (val & fd->mmask) >> fd->mshift;
+ n = (val & fd->nmask) >> fd->nshift;
+
+ ret = (u64)parent_rate * m;
+ do_div(ret, n);
+
+ return ret;
+}
+
+static long clk_fd_round_rate(struct clk *hw, unsigned long rate,
+ unsigned long *prate)
+{
+ struct clk_fractional_divider *fd = to_clk_fd(hw);
+ unsigned maxn = (fd->nmask >> fd->nshift) + 1;
+ unsigned div;
+
+ if (!rate || rate >= *prate)
+ return *prate;
+
+ div = gcd(*prate, rate);
+
+ while ((*prate / div) > maxn) {
+ div <<= 1;
+ rate <<= 1;
+ }
+
+ return rate;
+}
+
+static int clk_fd_set_rate(struct clk *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct clk_fractional_divider *fd = to_clk_fd(hw);
+ unsigned long div;
+ unsigned n, m;
+ u32 val;
+
+ div = gcd(parent_rate, rate);
+ m = rate / div;
+ n = parent_rate / div;
+
+ val = readl(fd->reg);
+ val &= ~(fd->mmask | fd->nmask);
+ val |= (m << fd->mshift) | (n << fd->nshift);
+ writel(val, fd->reg);
+
+ return 0;
+}
+
+const struct clk_ops clk_fractional_divider_ops = {
+ .recalc_rate = clk_fd_recalc_rate,
+ .round_rate = clk_fd_round_rate,
+ .set_rate = clk_fd_set_rate,
+};
+EXPORT_SYMBOL_GPL(clk_fractional_divider_ops);
+
+struct clk *clk_fractional_divider_alloc(
+ const char *name, const char *parent_name, unsigned long flags,
+ void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
+ u8 clk_divider_flags)
+{
+ struct clk_fractional_divider *fd;
+
+ fd = xzalloc(sizeof(*fd));
+
+ fd->reg = reg;
+ fd->mshift = mshift;
+ fd->mmask = (BIT(mwidth) - 1) << mshift;
+ fd->nshift = nshift;
+ fd->nmask = (BIT(nwidth) - 1) << nshift;
+ fd->flags = clk_divider_flags;
+ fd->clk.name = name;
+ fd->clk.ops = &clk_fractional_divider_ops;
+ fd->clk.flags = flags;
+ fd->clk.parent_names = parent_name ? &parent_name : NULL;
+ fd->clk.num_parents = parent_name ? 1 : 0;
+
+ return &fd->clk;
+}
+
+void clk_fractional_divider_free(struct clk *clk_fd)
+{
+ struct clk_fractional_divider *fd = to_clk_fd(clk_fd);
+
+ free(fd);
+}
+
+struct clk *clk_fractional_divider(
+ const char *name, const char *parent_name, unsigned long flags,
+ void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
+ u8 clk_divider_flags)
+{
+ struct clk *fd;
+ int ret;
+
+ fd = clk_fractional_divider_alloc(name, parent_name, flags,
+ reg, mshift, mwidth, nshift, nwidth,
+ clk_divider_flags);
+
+ if (IS_ERR(fd))
+ return fd;
+
+ ret = clk_register(fd);
+ if (ret) {
+ clk_fractional_divider_free(fd);
+ return ERR_PTR(ret);
+ }
+
+ return fd;
+}
+EXPORT_SYMBOL_GPL(clk_register_fractional_divider);
diff --git a/include/linux/clk.h b/include/linux/clk.h
index fe8ae5c..de2d4a5 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -260,6 +260,15 @@ struct clk *clk_divider_table(const char *name,
struct clk *clk_fixed_factor(const char *name,
const char *parent, unsigned int mult, unsigned int div,
unsigned flags);
+struct clk *clk_fractional_divider_alloc(
+ const char *name, const char *parent_name, unsigned long flags,
+ void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
+ u8 clk_divider_flags);
+struct clk *clk_fractional_divider(
+ const char *name, const char *parent_name, unsigned long flags,
+ void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
+ u8 clk_divider_flags);
+void clk_fractional_divider_free(struct clk *clk_fd);
struct clk *clk_mux_alloc(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parents, u8 num_parents,
--
2.1.4
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next prev parent reply other threads:[~2015-03-04 20:12 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-04 20:11 [PATCH v2 00/18] Update support for RK3188, Radxa Rock board Andrey Panov
2015-03-04 20:11 ` [PATCH v2 01/18] lib: Add gcd() function Andrey Panov
2015-03-04 20:11 ` [PATCH v2 02/18] CLK: Add support for composite clock from Linux kernel Andrey Panov
2015-03-04 20:11 ` Andrey Panov [this message]
2015-03-04 20:11 ` [PATCH v2 04/18] CLK: clk-mux: Respect CLK_MUX_HIWORD_MASK flag Andrey Panov
2015-03-04 20:11 ` [PATCH v2 05/18] CLK: clk-divider: Respect CLK_DIVIDER_HIWORD_MASK flag Andrey Panov
2015-03-04 20:11 ` [PATCH v2 06/18] CLK: clk-divider: Introduce clk_divider_alloc() and *_free() routines Andrey Panov
2015-03-04 20:11 ` [PATCH v2 07/18] CLK: clk-divider: Respect CLK_DIVIDER_POWER_OF_TWO flag Andrey Panov
2015-03-04 20:11 ` [PATCH v2 08/18] CLK: Check and do not allow to register clock twice Andrey Panov
2015-03-04 20:11 ` [PATCH v2 09/18] CLK: Add helper defines to barebox-wrapper.h for easier porting of drivers from Linux kernel Andrey Panov
2015-03-04 20:11 ` [PATCH v2 10/18] NET: arc_emac: Update for newer DTS, support for Rockchip .compatible Andrey Panov
2015-03-04 20:11 ` [PATCH v2 11/18] MMC: dw_mmc: Add support for PIO mode and Rockchip variant of this hardware Andrey Panov
2015-03-04 20:11 ` [PATCH v2 12/18] ARM: Rockchip: Remove unused files from mach-rockchip Andrey Panov
2015-03-04 20:11 ` [PATCH v2 13/18] ARM: Rockchip: Update Kconfig Andrey Panov
2015-03-04 20:11 ` [PATCH v2 14/18] ARM: Rockchip: Update clk driver from Linux kernel for use with newer DTS Andrey Panov
2015-03-04 20:11 ` [PATCH v2 15/18] ARM: Rockchip: Use newer DTS for Radxa Rock board Andrey Panov
2015-03-04 20:11 ` [PATCH v2 16/18] ARM: Rockchip: Update " Andrey Panov
2015-03-04 20:11 ` [PATCH v2 17/18] ARM: Rockchip: Add Radxa Rock defconfig Andrey Panov
2015-03-04 20:11 ` [PATCH v2 18/18] ARM: Rockchip: Add documentation Andrey Panov
2015-03-05 8:44 ` [PATCH v2 00/18] Update support for RK3188, Radxa Rock board Sascha Hauer
2015-03-05 18:46 ` Панов Андрей
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