* [PATCH 1/3] ppc: replace extern inline with static inline
@ 2015-07-02 6:45 Sascha Hauer
2015-07-02 6:45 ` [PATCH 2/3] blackfin: " Sascha Hauer
2015-07-02 6:45 ` [PATCH 3/3] treewide: replace __inline__ with inline Sascha Hauer
0 siblings, 2 replies; 3+ messages in thread
From: Sascha Hauer @ 2015-07-02 6:45 UTC (permalink / raw)
To: Barebox List
Replaced in the kernel a long time ago, not compatible with gcc5.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/ppc/include/asm/atomic.h | 8 ++++----
arch/ppc/include/asm/bitops.h | 18 +++++++++---------
arch/ppc/include/asm/io.h | 20 ++++++++++----------
3 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/arch/ppc/include/asm/atomic.h b/arch/ppc/include/asm/atomic.h
index 23f22df..a98d892 100644
--- a/arch/ppc/include/asm/atomic.h
+++ b/arch/ppc/include/asm/atomic.h
@@ -21,7 +21,7 @@ typedef struct { int counter; } atomic_t;
extern void atomic_clear_mask(unsigned long mask, unsigned long *addr);
extern void atomic_set_mask(unsigned long mask, unsigned long *addr);
-extern __inline__ int atomic_add_return(int a, atomic_t *v)
+static inline int atomic_add_return(int a, atomic_t *v)
{
int t;
@@ -37,7 +37,7 @@ extern __inline__ int atomic_add_return(int a, atomic_t *v)
return t;
}
-extern __inline__ int atomic_sub_return(int a, atomic_t *v)
+static inline int atomic_sub_return(int a, atomic_t *v)
{
int t;
@@ -53,7 +53,7 @@ extern __inline__ int atomic_sub_return(int a, atomic_t *v)
return t;
}
-extern __inline__ int atomic_inc_return(atomic_t *v)
+static inline int atomic_inc_return(atomic_t *v)
{
int t;
@@ -69,7 +69,7 @@ extern __inline__ int atomic_inc_return(atomic_t *v)
return t;
}
-extern __inline__ int atomic_dec_return(atomic_t *v)
+static inline int atomic_dec_return(atomic_t *v)
{
int t;
diff --git a/arch/ppc/include/asm/bitops.h b/arch/ppc/include/asm/bitops.h
index e4572bc..f126b48 100644
--- a/arch/ppc/include/asm/bitops.h
+++ b/arch/ppc/include/asm/bitops.h
@@ -28,7 +28,7 @@
* These used to be if'd out here because using : "cc" as a constraint
* resulted in errors from egcs. Things may be OK with gcc-2.95.
*/
-extern __inline__ void set_bit(int nr, volatile void * addr)
+static inline void set_bit(int nr, volatile void * addr)
{
unsigned long old;
unsigned long mask = 1 << (nr & 0x1f);
@@ -45,7 +45,7 @@ extern __inline__ void set_bit(int nr, volatile void * addr)
: "cc" );
}
-extern __inline__ void clear_bit(int nr, volatile void *addr)
+static inline void clear_bit(int nr, volatile void *addr)
{
unsigned long old;
unsigned long mask = 1 << (nr & 0x1f);
@@ -62,7 +62,7 @@ extern __inline__ void clear_bit(int nr, volatile void *addr)
: "cc");
}
-extern __inline__ void change_bit(int nr, volatile void *addr)
+static inline void change_bit(int nr, volatile void *addr)
{
unsigned long old;
unsigned long mask = 1 << (nr & 0x1f);
@@ -79,7 +79,7 @@ extern __inline__ void change_bit(int nr, volatile void *addr)
: "cc");
}
-extern __inline__ int test_and_set_bit(int nr, volatile void *addr)
+static inline int test_and_set_bit(int nr, volatile void *addr)
{
unsigned int old, t;
unsigned int mask = 1 << (nr & 0x1f);
@@ -98,7 +98,7 @@ extern __inline__ int test_and_set_bit(int nr, volatile void *addr)
return (old & mask) != 0;
}
-extern __inline__ int test_and_clear_bit(int nr, volatile void *addr)
+static inline int test_and_clear_bit(int nr, volatile void *addr)
{
unsigned int old, t;
unsigned int mask = 1 << (nr & 0x1f);
@@ -117,7 +117,7 @@ extern __inline__ int test_and_clear_bit(int nr, volatile void *addr)
return (old & mask) != 0;
}
-extern __inline__ int test_and_change_bit(int nr, volatile void *addr)
+static inline int test_and_change_bit(int nr, volatile void *addr)
{
unsigned int old, t;
unsigned int mask = 1 << (nr & 0x1f);
@@ -138,7 +138,7 @@ extern __inline__ int test_and_change_bit(int nr, volatile void *addr)
#endif /* __INLINE_BITOPS */
/* Return the bit position of the most significant 1 bit in a word */
-extern __inline__ int __ilog2(unsigned int x)
+static inline int __ilog2(unsigned int x)
{
int lz;
@@ -146,7 +146,7 @@ extern __inline__ int __ilog2(unsigned int x)
return 31 - lz;
}
-extern __inline__ int ffz(unsigned int x)
+static inline int ffz(unsigned int x)
{
if ((x = ~x) == 0)
return 32;
@@ -177,7 +177,7 @@ static inline int fls(unsigned int x)
* the libc and compiler builtin ffs routines, therefore
* differs in spirit from the above ffz (man ffs).
*/
-extern __inline__ int ffs(int x)
+static inline int ffs(int x)
{
return __ilog2(x & -x) + 1;
}
diff --git a/arch/ppc/include/asm/io.h b/arch/ppc/include/asm/io.h
index 98bf513..f83ab6e 100644
--- a/arch/ppc/include/asm/io.h
+++ b/arch/ppc/include/asm/io.h
@@ -136,7 +136,7 @@ static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
/*
* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
*/
-extern inline u8 in_8(const volatile u8 __iomem *addr)
+static inline u8 in_8(const volatile u8 __iomem *addr)
{
u8 ret;
@@ -145,12 +145,12 @@ extern inline u8 in_8(const volatile u8 __iomem *addr)
return ret;
}
-extern inline void out_8(volatile u8 __iomem *addr, u8 val)
+static inline void out_8(volatile u8 __iomem *addr, u8 val)
{
__asm__ __volatile__("sync;stb%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
}
-extern inline u16 in_le16(const volatile u16 __iomem *addr)
+static inline u16 in_le16(const volatile u16 __iomem *addr)
{
u16 ret;
@@ -159,7 +159,7 @@ extern inline u16 in_le16(const volatile u16 __iomem *addr)
return ret;
}
-extern inline u16 in_be16(const volatile u16 __iomem *addr)
+static inline u16 in_be16(const volatile u16 __iomem *addr)
{
u16 ret;
@@ -168,18 +168,18 @@ extern inline u16 in_be16(const volatile u16 __iomem *addr)
return ret;
}
-extern inline void out_le16(volatile u16 __iomem *addr, u16 val)
+static inline void out_le16(volatile u16 __iomem *addr, u16 val)
{
__asm__ __volatile__("sync; sthbrx %1,0,%2"
: "=m" (*addr) : "r" (val), "r" (addr));
}
-extern inline void out_be16(volatile u16 __iomem *addr, u16 val)
+static inline void out_be16(volatile u16 __iomem *addr, u16 val)
{
__asm__ __volatile__("sync;sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
}
-extern inline u32 in_le32(const volatile u32 __iomem *addr)
+static inline u32 in_le32(const volatile u32 __iomem *addr)
{
u32 ret;
@@ -188,7 +188,7 @@ extern inline u32 in_le32(const volatile u32 __iomem *addr)
return ret;
}
-extern inline u32 in_be32(const volatile u32 __iomem *addr)
+static inline u32 in_be32(const volatile u32 __iomem *addr)
{
u32 ret;
@@ -197,13 +197,13 @@ extern inline u32 in_be32(const volatile u32 __iomem *addr)
return ret;
}
-extern inline void out_le32(volatile u32 __iomem *addr, u32 val)
+static inline void out_le32(volatile u32 __iomem *addr, u32 val)
{
__asm__ __volatile__("sync; stwbrx %1,0,%2"
: "=m" (*addr) : "r" (val), "r" (addr));
}
-extern inline void out_be32(volatile u32 __iomem *addr, u32 val)
+static inline void out_be32(volatile u32 __iomem *addr, u32 val)
{
__asm__ __volatile__("sync;stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
}
--
2.1.4
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^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 2/3] blackfin: replace extern inline with static inline
2015-07-02 6:45 [PATCH 1/3] ppc: replace extern inline with static inline Sascha Hauer
@ 2015-07-02 6:45 ` Sascha Hauer
2015-07-02 6:45 ` [PATCH 3/3] treewide: replace __inline__ with inline Sascha Hauer
1 sibling, 0 replies; 3+ messages in thread
From: Sascha Hauer @ 2015-07-02 6:45 UTC (permalink / raw)
To: Barebox List
Replaced in the kernel a long time ago, not compatible with gcc5.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/blackfin/include/asm/io.h | 8 ++++----
arch/blackfin/include/asm/processor.h | 6 +++---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h
index 2837b6a..703104e 100644
--- a/arch/blackfin/include/asm/io.h
+++ b/arch/blackfin/include/asm/io.h
@@ -90,21 +90,21 @@ extern void *__ioremap(unsigned long physaddr, unsigned long size,
int cacheflag);
extern void __iounmap(void *addr, unsigned long size);
-extern inline void *ioremap(unsigned long physaddr, unsigned long size)
+static inline void *ioremap(unsigned long physaddr, unsigned long size)
{
return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
}
-extern inline void *ioremap_nocache(unsigned long physaddr,
+static inline void *ioremap_nocache(unsigned long physaddr,
unsigned long size)
{
return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
}
-extern inline void *ioremap_writethrough(unsigned long physaddr,
+static inline void *ioremap_writethrough(unsigned long physaddr,
unsigned long size)
{
return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
}
-extern inline void *ioremap_fullcache(unsigned long physaddr,
+static inline void *ioremap_fullcache(unsigned long physaddr,
unsigned long size)
{
return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
diff --git a/arch/blackfin/include/asm/processor.h b/arch/blackfin/include/asm/processor.h
index eaa1e4a..f463637 100644
--- a/arch/blackfin/include/asm/processor.h
+++ b/arch/blackfin/include/asm/processor.h
@@ -36,7 +36,7 @@
#include <asm/ptrace.h>
#include <asm/current.h>
-extern inline unsigned long rdusp(void)
+static inline unsigned long rdusp(void)
{
unsigned long usp;
@@ -44,7 +44,7 @@ extern inline unsigned long rdusp(void)
return usp;
}
-extern inline void wrusp(unsigned long usp)
+static inline void wrusp(unsigned long usp)
{
__asm__ __volatile__("usp = %0;\n\t"::"da"(usp));
}
@@ -130,7 +130,7 @@ static inline void exit_thread(void)
/*
* Return saved PC of a blocked thread.
*/
-extern inline unsigned long thread_saved_pc(struct thread_struct *t)
+static inline unsigned long thread_saved_pc(struct thread_struct *t)
{
extern void scheduling_functions_start_here(void);
extern void scheduling_functions_end_here(void);
--
2.1.4
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^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 3/3] treewide: replace __inline__ with inline
2015-07-02 6:45 [PATCH 1/3] ppc: replace extern inline with static inline Sascha Hauer
2015-07-02 6:45 ` [PATCH 2/3] blackfin: " Sascha Hauer
@ 2015-07-02 6:45 ` Sascha Hauer
1 sibling, 0 replies; 3+ messages in thread
From: Sascha Hauer @ 2015-07-02 6:45 UTC (permalink / raw)
To: Barebox List
inline is preferred over __inline__
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/blackfin/include/asm/swab.h | 8 ++++----
arch/ppc/include/asm/bitops.h | 2 +-
arch/ppc/include/asm/swab.h | 8 ++++----
include/linux/bitops.h | 4 ++--
4 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/blackfin/include/asm/swab.h b/arch/blackfin/include/asm/swab.h
index 89de650..1f645db 100644
--- a/arch/blackfin/include/asm/swab.h
+++ b/arch/blackfin/include/asm/swab.h
@@ -12,7 +12,7 @@
#ifdef __GNUC__
-static __inline__ __attribute_const__ __u32 __arch_swahb32(__u32 xx)
+static inline __attribute_const__ __u32 __arch_swahb32(__u32 xx)
{
__u32 tmp;
__asm__("%1 = %0 >> 8 (V);\n\t"
@@ -23,7 +23,7 @@ static __inline__ __attribute_const__ __u32 __arch_swahb32(__u32 xx)
}
#define __arch_swahb32 __arch_swahb32
-static __inline__ __attribute_const__ __u32 __arch_swahw32(__u32 xx)
+static inline __attribute_const__ __u32 __arch_swahw32(__u32 xx)
{
__u32 rv;
__asm__("%0 = PACK(%1.L, %1.H);\n\t": "=d"(rv): "d"(xx));
@@ -31,13 +31,13 @@ static __inline__ __attribute_const__ __u32 __arch_swahw32(__u32 xx)
}
#define __arch_swahw32 __arch_swahw32
-static __inline__ __attribute_const__ __u32 __arch_swab32(__u32 xx)
+static inline __attribute_const__ __u32 __arch_swab32(__u32 xx)
{
return __arch_swahb32(__arch_swahw32(xx));
}
#define __arch_swab32 __arch_swab32
-static __inline__ __attribute_const__ __u16 __arch_swab16(__u16 xx)
+static inline __attribute_const__ __u16 __arch_swab16(__u16 xx)
{
__u32 xw = xx;
__asm__("%0 <<= 8;\n %0.L = %0.L + %0.H (NS);\n": "+d"(xw));
diff --git a/arch/ppc/include/asm/bitops.h b/arch/ppc/include/asm/bitops.h
index f126b48..2fdd57e 100644
--- a/arch/ppc/include/asm/bitops.h
+++ b/arch/ppc/include/asm/bitops.h
@@ -153,7 +153,7 @@ static inline int ffz(unsigned int x)
return __ilog2(x & -x);
}
-static __inline__ int __ffs(unsigned long x)
+static inline int __ffs(unsigned long x)
{
return __ilog2(x & -x);
}
diff --git a/arch/ppc/include/asm/swab.h b/arch/ppc/include/asm/swab.h
index c581e3e..110488e 100644
--- a/arch/ppc/include/asm/swab.h
+++ b/arch/ppc/include/asm/swab.h
@@ -19,7 +19,7 @@
#ifdef __KERNEL__
-static __inline__ __u16 ld_le16(const volatile __u16 *addr)
+static inline __u16 ld_le16(const volatile __u16 *addr)
{
__u16 val;
@@ -28,7 +28,7 @@ static __inline__ __u16 ld_le16(const volatile __u16 *addr)
}
#define __arch_swab16p ld_le16
-static __inline__ void st_le16(volatile __u16 *addr, const __u16 val)
+static inline void st_le16(volatile __u16 *addr, const __u16 val)
{
__asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
}
@@ -39,7 +39,7 @@ static inline void __arch_swab16s(__u16 *addr)
}
#define __arch_swab16s __arch_swab16s
-static __inline__ __u32 ld_le32(const volatile __u32 *addr)
+static inline __u32 ld_le32(const volatile __u32 *addr)
{
__u32 val;
@@ -48,7 +48,7 @@ static __inline__ __u32 ld_le32(const volatile __u32 *addr)
}
#define __arch_swab32p ld_le32
-static __inline__ void st_le32(volatile __u32 *addr, const __u32 val)
+static inline void st_le32(volatile __u32 *addr, const __u32 val)
{
__asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
}
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index be5fd38..f3a740c 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -54,7 +54,7 @@ extern unsigned long __sw_hweight64(__u64 w);
(bit) < (size); \
(bit) = find_next_zero_bit((addr), (size), (bit) + 1))
-static __inline__ int get_bitmask_order(unsigned int count)
+static inline int get_bitmask_order(unsigned int count)
{
int order;
@@ -62,7 +62,7 @@ static __inline__ int get_bitmask_order(unsigned int count)
return order; /* We could be slightly more clever with -1 here... */
}
-static __inline__ int get_count_order(unsigned int count)
+static inline int get_count_order(unsigned int count)
{
int order;
--
2.1.4
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2015-07-02 6:45 [PATCH 1/3] ppc: replace extern inline with static inline Sascha Hauer
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2015-07-02 6:45 ` [PATCH 3/3] treewide: replace __inline__ with inline Sascha Hauer
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