[PATCH 01/16] i.MX6: dts: Include local .dtsi's last

[PATCH 01/16] i.MX6: dts: Include local .dtsi's last

[Andrey Smirnov]

Make sure that Barebox specific .dtsi files are included after .dtsi
files imported from Linux kernel. This way those local .dtsi files can
reference phandles defined in Linux kernel files.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/dts/imx6dl-cm-fx6.dts           | 2 +-
 arch/arm/dts/imx6dl-dfi-fs700-m60-6s.dts | 2 +-
 arch/arm/dts/imx6dl-eltec-hipercam.dts   | 2 +-
 arch/arm/dts/imx6dl-nitrogen6x.dts       | 2 +-
 arch/arm/dts/imx6dl-phytec-pfla02.dtsi   | 2 +-
 arch/arm/dts/imx6dl-sabrelite.dts        | 2 +-
 arch/arm/dts/imx6dl-tqma6s.dtsi          | 2 +-
 arch/arm/dts/imx6s-phytec-pfla02.dtsi    | 2 +-
 arch/arm/dts/imx6s-riotboard.dts         | 2 +-
 9 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/dts/imx6dl-cm-fx6.dts b/arch/arm/dts/imx6dl-cm-fx6.dts
index 0d96b46..cc426e2 100644
--- a/arch/arm/dts/imx6dl-cm-fx6.dts
+++ b/arch/arm/dts/imx6dl-cm-fx6.dts
@@ -12,8 +12,8 @@
  */
 
 /dts-v1/;
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-cm-fx6.dtsi"
 
 / {
diff --git a/arch/arm/dts/imx6dl-dfi-fs700-m60-6s.dts b/arch/arm/dts/imx6dl-dfi-fs700-m60-6s.dts
index bee4c76..b6df37f 100644
--- a/arch/arm/dts/imx6dl-dfi-fs700-m60-6s.dts
+++ b/arch/arm/dts/imx6dl-dfi-fs700-m60-6s.dts
@@ -14,8 +14,8 @@
 /dts-v1/;
 #endif
 
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-dfi-fs700-m60.dtsi"
 
 / {
diff --git a/arch/arm/dts/imx6dl-eltec-hipercam.dts b/arch/arm/dts/imx6dl-eltec-hipercam.dts
index 592358f..f272e78 100644
--- a/arch/arm/dts/imx6dl-eltec-hipercam.dts
+++ b/arch/arm/dts/imx6dl-eltec-hipercam.dts
@@ -1,7 +1,7 @@
 /dts-v1/;
 
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 
 / {
 	model = "ELTEC HiPerCam";
diff --git a/arch/arm/dts/imx6dl-nitrogen6x.dts b/arch/arm/dts/imx6dl-nitrogen6x.dts
index 3ac9ff3..50267b1 100644
--- a/arch/arm/dts/imx6dl-nitrogen6x.dts
+++ b/arch/arm/dts/imx6dl-nitrogen6x.dts
@@ -12,8 +12,8 @@
  */
 
 /dts-v1/;
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-nitrogen6x.dtsi"
 
 / {
diff --git a/arch/arm/dts/imx6dl-phytec-pfla02.dtsi b/arch/arm/dts/imx6dl-phytec-pfla02.dtsi
index e0541e0..d951c0b 100644
--- a/arch/arm/dts/imx6dl-phytec-pfla02.dtsi
+++ b/arch/arm/dts/imx6dl-phytec-pfla02.dtsi
@@ -9,8 +9,8 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-phytec-pfla02.dtsi"
 
 / {
diff --git a/arch/arm/dts/imx6dl-sabrelite.dts b/arch/arm/dts/imx6dl-sabrelite.dts
index 907ed28..849bcdd 100644
--- a/arch/arm/dts/imx6dl-sabrelite.dts
+++ b/arch/arm/dts/imx6dl-sabrelite.dts
@@ -11,8 +11,8 @@
  */
 
 /dts-v1/;
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-sabrelite.dtsi"
 
 / {
diff --git a/arch/arm/dts/imx6dl-tqma6s.dtsi b/arch/arm/dts/imx6dl-tqma6s.dtsi
index 23081ed..63459ce 100644
--- a/arch/arm/dts/imx6dl-tqma6s.dtsi
+++ b/arch/arm/dts/imx6dl-tqma6s.dtsi
@@ -9,8 +9,8 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-tqma6x.dtsi"
 
 &iomuxc {
diff --git a/arch/arm/dts/imx6s-phytec-pfla02.dtsi b/arch/arm/dts/imx6s-phytec-pfla02.dtsi
index 25af12f..7ef27fb 100644
--- a/arch/arm/dts/imx6s-phytec-pfla02.dtsi
+++ b/arch/arm/dts/imx6s-phytec-pfla02.dtsi
@@ -9,8 +9,8 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-phytec-pfla02.dtsi"
 
 / {
diff --git a/arch/arm/dts/imx6s-riotboard.dts b/arch/arm/dts/imx6s-riotboard.dts
index e14363f..3d0a930 100644
--- a/arch/arm/dts/imx6s-riotboard.dts
+++ b/arch/arm/dts/imx6s-riotboard.dts
@@ -6,8 +6,8 @@
  */
 /dts-v1/;
 
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 
 / {
 	model = "RIoTboard Solo";
-- 
2.5.0


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[PATCH 02/16] clk-imx6: Call clk_enable on mmdc_ch0_axi_podf

[Andrey Smirnov]

Call clk_enable on mmdc_ch0_axi_podf in order to properly increase
reference counters for all of the nodes in this particular clock
path. Otherwise it becomes possible for peripherals, located on other
branches stemming from "periph", to shut down the whole clock tree (up
to "pll2_bus") when they try to manage their own local clocks.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/mach-imx/clk-imx6.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-imx/clk-imx6.c b/arch/arm/mach-imx/clk-imx6.c
index daa5801..a634580 100644
--- a/arch/arm/mach-imx/clk-imx6.c
+++ b/arch/arm/mach-imx/clk-imx6.c
@@ -507,6 +507,7 @@ static int imx6_ccm_probe(struct device_d *dev)
 	clk_data.clk_num = IMX6QDL_CLK_END;
 	of_clk_add_provider(dev->device_node, of_clk_src_onecell_get, &clk_data);
 
+	clk_enable(clks[IMX6QDL_CLK_MMDC_CH0_AXI_PODF]);
 	clk_enable(clks[IMX6QDL_CLK_PLL6_ENET]);
 	clk_enable(clks[IMX6QDL_CLK_SATA_REF_100M]);
 	clk_enable(clks[IMX6QDL_CLK_ENFC_PODF]);
-- 
2.5.0


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[PATCH 03/16] fec_imx: Deallocate clocks when probe fails

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/net/fec_imx.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c
index de31ec4..18a02e0 100644
--- a/drivers/net/fec_imx.c
+++ b/drivers/net/fec_imx.c
@@ -680,7 +680,9 @@ static int fec_probe(struct device_d *dev)
 		goto err_free;
 	}
 
-	clk_enable(fec->clk);
+	ret = clk_enable(fec->clk);
+	if (ret < 0)
+		goto put_clk;
 
 	iores = dev_request_mem_resource(dev, 0);
 	if (IS_ERR(iores))
@@ -693,11 +695,11 @@ static int fec_probe(struct device_d *dev)
 
 		ret = gpio_request(phy_reset, "phy-reset");
 		if (ret)
-			goto err_free;
+			goto disable_clk;
 
 		ret = gpio_direction_output(phy_reset, 0);
 		if (ret)
-			goto err_free;
+			goto disable_clk;
 
 		mdelay(msec);
 		gpio_set_value(phy_reset, 1);
@@ -737,7 +739,7 @@ static int fec_probe(struct device_d *dev)
 	}
 
 	if (ret)
-		goto err_free;
+		goto disable_clk;
 
 	fec_init(edev);
 
@@ -757,6 +759,10 @@ static int fec_probe(struct device_d *dev)
 
 	return 0;
 
+disable_clk:
+	clk_disable(fec->clk);
+put_clk:
+	clk_put(fec->clk);
 err_free:
 	free(fec);
 	return ret;
-- 
2.5.0


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[PATCH 04/16] fec_imx: Deallocate I/O resources if probe fails

[Andrey Smirnov]

Add a proper check for I/O memory resource allocation failure and
replace dev_request_mem_region with dev_request_mem_resource so it would
be possible to correctly deallocate device's I/O resources when probe
fails.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/net/fec_imx.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c
index 18a02e0..da4eb55 100644
--- a/drivers/net/fec_imx.c
+++ b/drivers/net/fec_imx.c
@@ -685,8 +685,10 @@ static int fec_probe(struct device_d *dev)
 		goto put_clk;
 
 	iores = dev_request_mem_resource(dev, 0);
-	if (IS_ERR(iores))
-		return PTR_ERR(iores);
+	if (IS_ERR(iores)) {
+		ret = PTR_ERR(iores);
+		goto disable_clk;
+	}
 	fec->regs = IOMEM(iores->start);
 
 	phy_reset = of_get_named_gpio(dev->device_node, "phy-reset-gpios", 0);
@@ -695,11 +697,11 @@ static int fec_probe(struct device_d *dev)
 
 		ret = gpio_request(phy_reset, "phy-reset");
 		if (ret)
-			goto disable_clk;
+			goto release_res;
 
 		ret = gpio_direction_output(phy_reset, 0);
 		if (ret)
-			goto disable_clk;
+			goto release_res;
 
 		mdelay(msec);
 		gpio_set_value(phy_reset, 1);
@@ -739,7 +741,7 @@ static int fec_probe(struct device_d *dev)
 	}
 
 	if (ret)
-		goto disable_clk;
+		goto release_res;
 
 	fec_init(edev);
 
@@ -759,6 +761,8 @@ static int fec_probe(struct device_d *dev)
 
 	return 0;
 
+release_res:
+	release_region(iores);
 disable_clk:
 	clk_disable(fec->clk);
 put_clk:
-- 
2.5.0


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[PATCH 05/16] fec_imx: Free phy_reset GPIO if when probe fails

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/net/fec_imx.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c
index da4eb55..e7dbc16 100644
--- a/drivers/net/fec_imx.c
+++ b/drivers/net/fec_imx.c
@@ -701,7 +701,7 @@ static int fec_probe(struct device_d *dev)
 
 		ret = gpio_direction_output(phy_reset, 0);
 		if (ret)
-			goto release_res;
+			goto free_gpio;
 
 		mdelay(msec);
 		gpio_set_value(phy_reset, 1);
@@ -741,7 +741,7 @@ static int fec_probe(struct device_d *dev)
 	}
 
 	if (ret)
-		goto release_res;
+		goto free_gpio;
 
 	fec_init(edev);
 
@@ -761,6 +761,9 @@ static int fec_probe(struct device_d *dev)
 
 	return 0;
 
+free_gpio:
+	if (gpio_is_valid(phy_reset))
+		gpio_free(phy_reset);
 release_res:
 	release_region(iores);
 disable_clk:
-- 
2.5.0


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[PATCH 06/16] fec_imx: Use FEC_ECNTRL_RESET instead of a magic number

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/net/fec_imx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c
index e7dbc16..601edba 100644
--- a/drivers/net/fec_imx.c
+++ b/drivers/net/fec_imx.c
@@ -709,7 +709,7 @@ static int fec_probe(struct device_d *dev)
 
 	/* Reset chip. */
 	writel(FEC_ECNTRL_RESET, fec->regs + FEC_ECNTRL);
-	while(readl(fec->regs + FEC_ECNTRL) & 1) {
+	while(readl(fec->regs + FEC_ECNTRL) & FEC_ECNTRL_RESET) {
 		udelay(10);
 	}
 
-- 
2.5.0


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[PATCH 07/16] fec_imx: Impelemnt reset timeout

[Andrey Smirnov]

Don't wait for more than one second for IP block to finish resetting. If
the block is dead it makes more sence to continue execution in hopes
that the rest of the processor is fine, rather than spin indefinetly
inside of the fec_probe function

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/net/fec_imx.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c
index 601edba..fc2c8e1 100644
--- a/drivers/net/fec_imx.c
+++ b/drivers/net/fec_imx.c
@@ -656,6 +656,7 @@ static int fec_probe(struct device_d *dev)
 	enum fec_type type;
 	int phy_reset;
 	u32 msec = 1;
+	u64 start;
 
 	ret = dev_get_drvdata(dev, (const void **)&type);
 	if (ret)
@@ -708,9 +709,13 @@ static int fec_probe(struct device_d *dev)
 	}
 
 	/* Reset chip. */
+	start = get_time_ns();
 	writel(FEC_ECNTRL_RESET, fec->regs + FEC_ECNTRL);
 	while(readl(fec->regs + FEC_ECNTRL) & FEC_ECNTRL_RESET) {
-		udelay(10);
+		if (is_timeout(start, SECOND)) {
+			ret = -ETIMEDOUT;
+			goto free_gpio;
+		}
 	}
 
 	/*
-- 
2.5.0


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[PATCH 08/16] fec_imx: Deallocate DMA buffers when probe fails

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/net/fec_imx.c | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c
index fc2c8e1..465dcf9 100644
--- a/drivers/net/fec_imx.c
+++ b/drivers/net/fec_imx.c
@@ -621,6 +621,12 @@ static int fec_alloc_receive_packets(struct fec_priv *fec, int count, int size)
 	return 0;
 }
 
+static void fec_free_receive_packets(struct fec_priv *fec, int count, int size)
+{
+	void *p = phys_to_virt(fec->rbd_base[0].data_pointer);
+	dma_free_coherent(p, 0, size * count);
+}
+
 #ifdef CONFIG_OFDEVICE
 static int fec_probe_dt(struct device_d *dev, struct fec_priv *fec)
 {
@@ -722,8 +728,9 @@ static int fec_probe(struct device_d *dev)
 	 * reserve memory for both buffer descriptor chains at once
 	 * Datasheet forces the startaddress of each chain is 16 byte aligned
 	 */
-	base = dma_alloc_coherent((2 + FEC_RBD_NUM) *
-			sizeof(struct buffer_descriptor), DMA_ADDRESS_BROKEN);
+#define FEC_XBD_SIZE ((2 + FEC_RBD_NUM) * sizeof(struct buffer_descriptor))
+
+	base = dma_alloc_coherent(FEC_XBD_SIZE, DMA_ADDRESS_BROKEN);
 	fec->rbd_base = base;
 	base += FEC_RBD_NUM * sizeof(struct buffer_descriptor);
 	fec->tbd_base = base;
@@ -731,7 +738,9 @@ static int fec_probe(struct device_d *dev)
 	writel(virt_to_phys(fec->tbd_base), fec->regs + FEC_ETDSR);
 	writel(virt_to_phys(fec->rbd_base), fec->regs + FEC_ERDSR);
 
-	fec_alloc_receive_packets(fec, FEC_RBD_NUM, FEC_MAX_PKT_SIZE);
+	ret = fec_alloc_receive_packets(fec, FEC_RBD_NUM, FEC_MAX_PKT_SIZE);
+	if (ret < 0)
+		goto free_xbd;
 
 	if (dev->device_node) {
 		ret = fec_probe_dt(dev, fec);
@@ -746,7 +755,7 @@ static int fec_probe(struct device_d *dev)
 	}
 
 	if (ret)
-		goto free_gpio;
+		goto free_receive_packets;
 
 	fec_init(edev);
 
@@ -766,6 +775,10 @@ static int fec_probe(struct device_d *dev)
 
 	return 0;
 
+free_receive_packets:
+	fec_free_receive_packets(fec, FEC_RBD_NUM, FEC_MAX_PKT_SIZE);
+free_xbd:
+	dma_free_coherent(fec->rbd_base, 0, FEC_XBD_SIZE);
 free_gpio:
 	if (gpio_is_valid(phy_reset))
 		gpio_free(phy_reset);
-- 
2.5.0


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[PATCH 09/16] fec_imx: Unregister MDIO when probe fails

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/net/fec_imx.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c
index 465dcf9..83fdec6 100644
--- a/drivers/net/fec_imx.c
+++ b/drivers/net/fec_imx.c
@@ -767,14 +767,16 @@ static int fec_probe(struct device_d *dev)
 
 	ret = mdiobus_register(&fec->miibus);
 	if (ret)
-		return ret;
+		goto free_receive_packets;
 
 	ret = eth_register(edev);
 	if (ret)
-		return ret;
+		goto unregister_mdio;
 
 	return 0;
 
+unregister_mdio:
+	mdiobus_unregister(&fec->miibus);
 free_receive_packets:
 	fec_free_receive_packets(fec, FEC_RBD_NUM, FEC_MAX_PKT_SIZE);
 free_xbd:
-- 
2.5.0


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[PATCH 10/16] i.MX: Add revision detection for i.MX6D/Q Plus

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/mach-imx/imx6.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 0fdd785..f80334d 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -123,7 +123,8 @@ int imx6_init(void)
 	imx6_boot_save_loc((void *)MX6_SRC_BASE_ADDR);
 
 	rev = readl(MX6_ANATOP_BASE_ADDR + SI_REV);
-	switch (rev & 0xff) {
+
+	switch (rev & 0xfff) {
 	case 0x00:
 		mx6_silicon_revision = IMX_CHIP_REV_1_0;
 		break;
@@ -148,16 +149,26 @@ int imx6_init(void)
 		mx6_silicon_revision = IMX_CHIP_REV_1_5;
 		break;
 
+	case 0x100:
+		mx6_silicon_revision = IMX_CHIP_REV_2_0;
+		break;
+
 	default:
 		mx6_silicon_revision = IMX_CHIP_REV_UNKNOWN;
 	}
 
 	switch (imx6_cpu_type()) {
 	case IMX6_CPUTYPE_IMX6Q:
-		cputypestr = "i.MX6 Quad";
+		if (mx6_silicon_revision >= IMX_CHIP_REV_2_0)
+			cputypestr = "i.MX6 Quad Plus";
+		else
+			cputypestr = "i.MX6 Quad";
 		break;
 	case IMX6_CPUTYPE_IMX6D:
-		cputypestr = "i.MX6 Dual";
+		if (mx6_silicon_revision >= IMX_CHIP_REV_2_0)
+			cputypestr = "i.MX6 Dual Plus";
+		else
+			cputypestr = "i.MX6 Dual";
 		break;
 	case IMX6_CPUTYPE_IMX6DL:
 		cputypestr = "i.MX6 DualLite";
-- 
2.5.0


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[PATCH 11/16] ARM: Add errata 845369 workaround

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/include/asm/errata.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/include/asm/errata.h b/arch/arm/include/asm/errata.h
index 9525823..98137b5 100644
--- a/arch/arm/include/asm/errata.h
+++ b/arch/arm/include/asm/errata.h
@@ -77,3 +77,12 @@ static inline void enable_arm_errata_794072_war(void)
 		"mcr	p15, 0, r0, c15, c0, 1\n"
 	);
 }
+
+static inline void enable_arm_errata_845369_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c15, c0, 1\n"
+		"orr	r0, r0, #1 << 22\n"
+		"mcr	p15, 0, r0, c15, c0, 1\n"
+	);
+}
-- 
2.5.0


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[PATCH 12/16] i.MX6: Apply errata 845369 workaround

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/mach-imx/cpu_init.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c
index 8b10e63..7603883 100644
--- a/arch/arm/mach-imx/cpu_init.c
+++ b/arch/arm/mach-imx/cpu_init.c
@@ -31,4 +31,5 @@ void imx6_cpu_lowlevel_init(void)
 	enable_arm_errata_751472_war();
 	enable_arm_errata_761320_war();
 	enable_arm_errata_794072_war();
+	enable_arm_errata_845369_war();
 }
-- 
2.5.0


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[PATCH 13/16] L2x0: i.MX6: Replace magic numbers with constants

[Andrey Smirnov]

Use constants instead of magic numbers for PL301 registers bits in
imx6_mmu_init()

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/include/asm/cache-l2x0.h | 8 ++++++++
 arch/arm/mach-imx/imx6.c          | 9 ++++++---
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/arch/arm/include/asm/cache-l2x0.h b/arch/arm/include/asm/cache-l2x0.h
index 963dd99..9bb245b 100644
--- a/arch/arm/include/asm/cache-l2x0.h
+++ b/arch/arm/include/asm/cache-l2x0.h
@@ -56,6 +56,14 @@
 #define L2X0_LINE_TAG			0xF30
 #define L2X0_DEBUG_CTRL			0xF40
 #define L2X0_PREFETCH_CTRL		0xF60
+#define   L2X0_DOUBLE_LINEFILL_EN			(1 << 30)
+#define   L2X0_INSTRUCTION_PREFETCH_EN			(1 << 29)
+#define   L2X0_DATA_PREFETCH_EN				(1 << 28)
+#define   L2X0_DOUBLE_LINEFILL_ON_WRAP_READ_DIS		(1 << 27)
+#define   L2X0_PREFETCH_DROP_EN				(1 << 24)
+#define   L2X0_INCR_DOUBLE_LINEFILL_EN			(1 << 23)
+#define   L2X0_ESCLUSIVE_SEQUENCE_EN			(1 << 21)
+
 #define L2X0_POWER_CTRL			0xF80
 #define   L2X0_DYNAMIC_CLK_GATING_EN	(1 << 1)
 #define   L2X0_STNDBY_MODE_EN		(1 << 0)
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index f80334d..db1530c 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -217,8 +217,10 @@ static int imx6_mmu_init(void)
 
 	/* configure the PREFETCH register */
 	val = readl(l2x0_base + L2X0_PREFETCH_CTRL);
-	val |= 0x70800000;
-
+	val |=  L2X0_DOUBLE_LINEFILL_EN |
+		L2X0_INSTRUCTION_PREFETCH_EN |
+		L2X0_DATA_PREFETCH_EN |
+		L2X0_INCR_DOUBLE_LINEFILL_EN;
 	/*
 	 * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0
 	 * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2
@@ -229,7 +231,8 @@ static int imx6_mmu_init(void)
 	 * double linefill feature. This is the default behavior.
 	 */
 	if (cpu_is_mx6q())
-		val &= ~(1 << 30 | 1 << 23);
+		val &= ~(L2X0_DOUBLE_LINEFILL_EN |
+			 L2X0_INCR_DOUBLE_LINEFILL_EN);
 
 	writel(val, l2x0_base + L2X0_PREFETCH_CTRL);
 
-- 
2.5.0


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[PATCH 14/16] i.MX6: Apply PL310 errata base on PL310's revision

[Andrey Smirnov]

I.MX6Q Plus parts have r3p2 revision of PL310 so double linefill
errata no longer applies for all of the i.MX6Q SoCs. Change the code to
use PL310's revision inforation to determine if workaround needs to be
applied.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/mach-imx/imx6.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index db1530c..0c7338d 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -210,11 +210,15 @@ int imx6_devices_init(void)
 static int imx6_mmu_init(void)
 {
 	void __iomem *l2x0_base = IOMEM(0x00a02000);
-	u32 val;
+	u32 val, cache_part, cache_rtl;
 
 	if (!cpu_is_mx6())
 		return 0;
 
+	val = readl(l2x0_base + L2X0_CACHE_ID);
+	cache_part = val & L2X0_CACHE_ID_PART_MASK;
+	cache_rtl  = val & L2X0_CACHE_ID_RTL_MASK;
+
 	/* configure the PREFETCH register */
 	val = readl(l2x0_base + L2X0_PREFETCH_CTRL);
 	val |=  L2X0_DOUBLE_LINEFILL_EN |
@@ -230,7 +234,8 @@ static int imx6_mmu_init(void)
 	 * Workaround: The only workaround to this erratum is to disable the
 	 * double linefill feature. This is the default behavior.
 	 */
-	if (cpu_is_mx6q())
+	if (cache_part == L2X0_CACHE_ID_PART_L310 &&
+	    cache_rtl < L2X0_CACHE_ID_RTL_R3P2)
 		val &= ~(L2X0_DOUBLE_LINEFILL_EN |
 			 L2X0_INCR_DOUBLE_LINEFILL_EN);
 
-- 
2.5.0


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[PATCH 15/16] i.MX6: PL310: Adjust settings for performance

[Andrey Smirnov]

According to commit f6b6f3c7b2bb7d6277801882afdced6f2b10fc17 from
git://git.freescale.com/imx/uboot-imx.git:

	Also set Prefetch offset to 15, since it improves
	memcpy performance by 35%. Don't enable Incr double
	Linefill enable since it adversely affects memcpy
	performance by about 32MB/s and reads by 90MB/s. Tested
	with 4K to 16MB sized src and dst aligned buffer.

This commit ports those chagnes from U-Boot.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/mach-imx/imx6.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 0c7338d..ba8fb89 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -223,8 +223,11 @@ static int imx6_mmu_init(void)
 	val = readl(l2x0_base + L2X0_PREFETCH_CTRL);
 	val |=  L2X0_DOUBLE_LINEFILL_EN |
 		L2X0_INSTRUCTION_PREFETCH_EN |
-		L2X0_DATA_PREFETCH_EN |
-		L2X0_INCR_DOUBLE_LINEFILL_EN;
+		L2X0_DATA_PREFETCH_EN;
+	/*
+	 * set prefetch offset to 15
+	 */
+	val |= 15;
 	/*
 	 * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0
 	 * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2
@@ -236,8 +239,7 @@ static int imx6_mmu_init(void)
 	 */
 	if (cache_part == L2X0_CACHE_ID_PART_L310 &&
 	    cache_rtl < L2X0_CACHE_ID_RTL_R3P2)
-		val &= ~(L2X0_DOUBLE_LINEFILL_EN |
-			 L2X0_INCR_DOUBLE_LINEFILL_EN);
+		val &= ~L2X0_DOUBLE_LINEFILL_EN;
 
 	writel(val, l2x0_base + L2X0_PREFETCH_CTRL);
 
-- 
2.5.0


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[PATCH 16/16] common: Add EPROBE_DEFER to strerror

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 common/misc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/common/misc.c b/common/misc.c
index 8b2417b..f0f0b80 100644
--- a/common/misc.c
+++ b/common/misc.c
@@ -65,6 +65,7 @@ const char *strerror(int errnum)
 	case	ENETUNREACH	: str = "Network is unreachable"; break;
 	case	ENETDOWN	: str = "Network is down"; break;
 	case	ETIMEDOUT	: str = "Connection timed out"; break;
+	case	EPROBE_DEFER	: str = "Requested probe deferral"; break;
 #if 0 /* These are probably not needed */
 	case	ENOTBLK		: str = "Block device required"; break;
 	case	EFBIG		: str = "File too large"; break;
-- 
2.5.0


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Re: [PATCH 07/16] fec_imx: Impelemnt reset timeout

[Antony Pavlov]

On Tue, 15 Mar 2016 20:33:42 -0700
Andrey Smirnov <andrew.smirnov@gmail.com> wrote:

> [PATCH 07/16] fec_imx: Impelemnt reset timeout
                         ^^^^^^^^^ Implement?

> Don't wait for more than one second for IP block to finish resetting. If
> the block is dead it makes more sence to continue execution in hopes
> that the rest of the processor is fine, rather than spin indefinetly
> inside of the fec_probe function
> 
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> ---
>  drivers/net/fec_imx.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c
> index 601edba..fc2c8e1 100644
> --- a/drivers/net/fec_imx.c
> +++ b/drivers/net/fec_imx.c
> @@ -656,6 +656,7 @@ static int fec_probe(struct device_d *dev)
>  	enum fec_type type;
>  	int phy_reset;
>  	u32 msec = 1;
> +	u64 start;
>  
>  	ret = dev_get_drvdata(dev, (const void **)&type);
>  	if (ret)
> @@ -708,9 +709,13 @@ static int fec_probe(struct device_d *dev)
>  	}
>  
>  	/* Reset chip. */
> +	start = get_time_ns();
>  	writel(FEC_ECNTRL_RESET, fec->regs + FEC_ECNTRL);
>  	while(readl(fec->regs + FEC_ECNTRL) & FEC_ECNTRL_RESET) {
> -		udelay(10);
> +		if (is_timeout(start, SECOND)) {
> +			ret = -ETIMEDOUT;
> +			goto free_gpio;
> +		}
>  	}
>  
>  	/*
> -- 
> 2.5.0
> 
> 
> _______________________________________________
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-- 
-- 
Best regards,
  Antony Pavlov

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Re: [PATCH 01/16] i.MX6: dts: Include local .dtsi's last

[Sascha Hauer]

On Tue, Mar 15, 2016 at 08:33:36PM -0700, Andrey Smirnov wrote:
> Make sure that Barebox specific .dtsi files are included after .dtsi
> files imported from Linux kernel. This way those local .dtsi files can
> reference phandles defined in Linux kernel files.
> 
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> ---

Looks all good, applied with the typo Antony mentioned fixed.

Sascha

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Re: [PATCH 12/16] i.MX6: Apply errata 845369 workaround

[Stefan Christ]

Hi,

> @@ -31,4 +31,5 @@ void imx6_cpu_lowlevel_init(void)
>  	enable_arm_errata_751472_war();
>  	enable_arm_errata_761320_war();
>  	enable_arm_errata_794072_war();
> +	enable_arm_errata_845369_war();

The errata 845369 seems to be a general errata for all ARM Cortex-A9 cores. Why
is this fix only apply for the i.MX6 SoC and not for other Cortex-A9 devices in
the barebox?

Mit freundlichen Grüßen / Kind regards,
	Stefan Christ

On Tue, Mar 15, 2016 at 08:33:47PM -0700, Andrey Smirnov wrote:
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> ---
>  arch/arm/mach-imx/cpu_init.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c
> index 8b10e63..7603883 100644
> --- a/arch/arm/mach-imx/cpu_init.c
> +++ b/arch/arm/mach-imx/cpu_init.c
> @@ -31,4 +31,5 @@ void imx6_cpu_lowlevel_init(void)
>  	enable_arm_errata_751472_war();
>  	enable_arm_errata_761320_war();
>  	enable_arm_errata_794072_war();
> +	enable_arm_errata_845369_war();
>  }
> -- 
> 2.5.0
> 
> 
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Re: [PATCH 12/16] i.MX6: Apply errata 845369 workaround

[Andrey Smirnov]

On Thu, Mar 17, 2016 at 12:31 AM, Stefan Christ <s.christ@phytec.de> wrote:
> Hi,
>
>> @@ -31,4 +31,5 @@ void imx6_cpu_lowlevel_init(void)
>>       enable_arm_errata_751472_war();
>>       enable_arm_errata_761320_war();
>>       enable_arm_errata_794072_war();
>> +     enable_arm_errata_845369_war();
>
> The errata 845369 seems to be a general errata for all ARM Cortex-A9 cores. Why
> is this fix only apply for the i.MX6 SoC and not for other Cortex-A9 devices in
> the barebox?

AFAIR, there's a bit of a caveat to that errata, since it applies only
to multi-core systems or systems with ACP, so some of the cores might
not need it and IMHO in order to properly apply that errata one would
have to consult individual SoC's reference manuals.

But the main reason why I applied it only there was that there didn't
seem to be a common place where those erratas are applied for all
platforms (I suspect it might have to do with the fact that it is
possible to build BB for multiple generations or ARM), but there was a
place where erratas were applied for i.MX6, so I followed the path of
least resistance.


>
> Mit freundlichen Grüßen / Kind regards,
>         Stefan Christ
>
> On Tue, Mar 15, 2016 at 08:33:47PM -0700, Andrey Smirnov wrote:
>> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
>> ---
>>  arch/arm/mach-imx/cpu_init.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c
>> index 8b10e63..7603883 100644
>> --- a/arch/arm/mach-imx/cpu_init.c
>> +++ b/arch/arm/mach-imx/cpu_init.c
>> @@ -31,4 +31,5 @@ void imx6_cpu_lowlevel_init(void)
>>       enable_arm_errata_751472_war();
>>       enable_arm_errata_761320_war();
>>       enable_arm_errata_794072_war();
>> +     enable_arm_errata_845369_war();
>>  }
>> --
>> 2.5.0
>>
>>
>> _______________________________________________
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>> barebox@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/barebox

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Re: [PATCH 12/16] i.MX6: Apply errata 845369 workaround

[Trent Piepho]

On Mon, 2016-03-21 at 09:08 -0700, Andrey Smirnov wrote:
> On Thu, Mar 17, 2016 at 12:31 AM, Stefan Christ <s.christ@phytec.de> wrote:
> > Hi,
> >
> >> @@ -31,4 +31,5 @@ void imx6_cpu_lowlevel_init(void)
> >>       enable_arm_errata_751472_war();
> >>       enable_arm_errata_761320_war();
> >>       enable_arm_errata_794072_war();
> >> +     enable_arm_errata_845369_war();
> >
> > The errata 845369 seems to be a general errata for all ARM Cortex-A9 cores. Why
> > is this fix only apply for the i.MX6 SoC and not for other Cortex-A9 devices in
> > the barebox?

Errata 761320 appears to also be fixed by the change for errata 845369.

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