[PATCH 0/9] i.MX6Q+ fixes plus number of latest Kernel changes

[PATCH 0/9] i.MX6Q+ fixes plus number of latest Kernel changes

[Andrey Smirnov]

Hello,

This patchset continains i.MX6Q+ reset sequence fix (similar
implementation was submitted to LKML) and besides that a number of
ported coomits from "pci/host-imx6" branch of:

git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git

Since some commits required a bit of massaging, I added my own
Signed-off-by and a comment in square brackets, however my authorship
of those commits is very minimal.

As for commit by Fabio Estevam, there I was able to apply
corresponding kernel patch by manually editing paths in the diff file,
so I left the commit message as it was.

Any feedback would be appreciated.

Thank you,
Andrey Smirnov

Andrey Smirnov (8):
  PCI: imx6: Simplify imx6_pcie_remove()
  OF: Port of_match_device() and of_device_get_match_data()
  PCI: imx6: Add proper i.MX6+ reset sequence
  PCI: imx6: Rename imx6_pcie_start_link() to imx6_pcie_establish_link()
  PCI: imx6: Move imx6_pcie_reset_phy() near other PHY handling
    functions
  PCI: imx6: Move PHY reset into imx6_pcie_establish_link()
  PCI: imx6: Remove broken Gen2 workaround
  PCI: imx6: Add DT bindings to configure PHY Tx driver settings

Fabio Estevam (1):
  PCI: imx6: Simplify a trivial if-return sequence

 drivers/of/Makefile            |   2 +-
 drivers/of/device.c            |  33 ++++++
 drivers/pci/pci-imx6.c         | 242 +++++++++++++++++++++++------------------
 include/mfd/imx6q-iomuxc-gpr.h |   1 +
 include/of_device.h            |  48 ++++++++
 5 files changed, 217 insertions(+), 109 deletions(-)
 create mode 100644 drivers/of/device.c
 create mode 100644 include/of_device.h

-- 
2.5.5


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[PATCH 1/9] PCI: imx6: Simplify imx6_pcie_remove()

[Andrey Smirnov]

Instead of manualy flipping the bits call imx6_pcie_assert_core_reset()
to give the code, executing after BB, a clean slate. This also makes the
function match similar code in Linux kernel driver.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/pci-imx6.c | 19 +------------------
 1 file changed, 1 insertion(+), 18 deletions(-)

diff --git a/drivers/pci/pci-imx6.c b/drivers/pci/pci-imx6.c
index 46483b4..241df3f 100644
--- a/drivers/pci/pci-imx6.c
+++ b/drivers/pci/pci-imx6.c
@@ -618,25 +618,8 @@ static int __init imx6_pcie_probe(struct device_d *dev)
 static void imx6_pcie_remove(struct device_d *dev)
 {
 	struct imx6_pcie *imx6_pcie = dev->priv;
-	u32 val;
-
-	val = readl(imx6_pcie->pp.dbi_base + PCIE_PL_PFLR);
-	val &= ~PCIE_PL_PFLR_LINK_STATE_MASK;
-	val |= PCIE_PL_PFLR_FORCE_LINK;
-	data_abort_mask();
-	writel(val, imx6_pcie->pp.dbi_base + PCIE_PL_PFLR);
-	data_abort_unmask();
-
-	val = readl(imx6_pcie->iomuxc_gpr + IOMUXC_GPR12);
-	val &= ~IMX6Q_GPR12_PCIE_CTL_2;
-	writel(val, imx6_pcie->iomuxc_gpr + IOMUXC_GPR12);
-
-	val = readl(imx6_pcie->iomuxc_gpr + IOMUXC_GPR1);
-	val |= IMX6Q_GPR1_PCIE_TEST_PD;
-	writel(val, imx6_pcie->iomuxc_gpr + IOMUXC_GPR1);
 
-	val &= ~IMX6Q_GPR1_PCIE_REF_CLK_EN;
-	writel(val, imx6_pcie->iomuxc_gpr + IOMUXC_GPR1);
+	imx6_pcie_assert_core_reset(&imx6_pcie->pp);
 }
 
 static struct of_device_id imx6_pcie_of_match[] = {
-- 
2.5.5


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[PATCH 2/9] OF: Port of_match_device() and of_device_get_match_data()

[Andrey Smirnov]

Port of_match_device() and of_device_get_match_data() from Linux kernel
code.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/of/Makefile |  2 +-
 drivers/of/device.c | 33 +++++++++++++++++++++++++++++++++
 include/of_device.h | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 82 insertions(+), 1 deletion(-)
 create mode 100644 drivers/of/device.c
 create mode 100644 include/of_device.h

diff --git a/drivers/of/Makefile b/drivers/of/Makefile
index 0dc2f8d..f31bb29 100644
--- a/drivers/of/Makefile
+++ b/drivers/of/Makefile
@@ -1,4 +1,4 @@
-obj-y += address.o base.o fdt.o platform.o
+obj-y += address.o base.o fdt.o platform.o device.o
 obj-$(CONFIG_OFTREE_MEM_GENERIC) += mem_generic.o
 obj-$(CONFIG_OF_GPIO) += of_gpio.o
 obj-$(CONFIG_OF_PCI) += of_pci.o
diff --git a/drivers/of/device.c b/drivers/of/device.c
new file mode 100644
index 0000000..e2c3c02
--- /dev/null
+++ b/drivers/of/device.c
@@ -0,0 +1,33 @@
+#include <common.h>
+#include <of.h>
+
+
+/**
+ * of_match_device - Tell if a struct device matches an of_device_id list
+ * @ids: array of of device match structures to search in
+ * @dev: the of device structure to match against
+ *
+ * Used by a driver to check whether an platform_device present in the
+ * system is in its list of supported devices.
+ */
+const struct of_device_id *of_match_device(const struct of_device_id *matches,
+					   const struct device_d *dev)
+{
+	if ((!matches) || (!dev->device_node))
+		return NULL;
+
+	return of_match_node(matches, dev->device_node);
+}
+EXPORT_SYMBOL(of_match_device);
+
+const void *of_device_get_match_data(const struct device_d *dev)
+{
+	const struct of_device_id *match;
+
+	match = of_match_device(dev->driver->of_compatible, dev);
+	if (!match)
+		return NULL;
+
+	return match->data;
+}
+EXPORT_SYMBOL(of_device_get_match_data);
diff --git a/include/of_device.h b/include/of_device.h
new file mode 100644
index 0000000..e84fc9c
--- /dev/null
+++ b/include/of_device.h
@@ -0,0 +1,48 @@
+#ifndef __OF_DEVICE_H
+#define __OF_DEVICE_H
+
+#include <driver.h>
+#include <of.h>
+
+
+#ifdef CONFIG_OFTREE
+extern const struct of_device_id *of_match_device(
+	const struct of_device_id *matches, const struct device_d *dev);
+
+/**
+ * of_driver_match_device - Tell if a driver's of_match_table matches a device.
+ * @drv: the device_driver structure to test
+ * @dev: the device structure to match against
+ */
+static inline int of_driver_match_device(struct device_d *dev,
+					 const struct driver_d *drv)
+{
+	return of_match_device(drv->of_compatible, dev) != NULL;
+}
+
+extern const void *of_device_get_match_data(const struct device_d *dev);
+
+#else /* CONFIG_OF */
+
+static inline int of_driver_match_device(struct device_d *dev,
+					 const struct device_d *drv)
+{
+	return 0;
+}
+
+static inline const void *of_device_get_match_data(const struct device_d *dev)
+{
+	return NULL;
+}
+
+static inline const struct of_device_id *__of_match_device(
+		const struct of_device_id *matches, const struct device_d *dev)
+{
+	return NULL;
+}
+#define of_match_device(matches, dev)	\
+	__of_match_device(of_match_ptr(matches), (dev))
+
+#endif /* CONFIG_OF */
+
+#endif /* _LINUX_OF_DEVICE_H */
-- 
2.5.5


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[PATCH 3/9] PCI: imx6: Add proper i.MX6+ reset sequence

[Andrey Smirnov]

I.MX6+ version of the silicon exposed PCIe core's reset signal as a bit
in one of the control registers. As a result using old, pre-i.MX6+,
reset sequence on i.MX6+ leads to Barebox hanging during startup. Using
exposed reset bit instead solves the problem.

This commit is based on portions of commit

c34068d48273e24d392d9a49a38be807954420ed

in http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/pci-imx6.c         | 94 +++++++++++++++++++++++++++++-------------
 include/mfd/imx6q-iomuxc-gpr.h |  1 +
 2 files changed, 66 insertions(+), 29 deletions(-)

diff --git a/drivers/pci/pci-imx6.c b/drivers/pci/pci-imx6.c
index 241df3f..13a8b22 100644
--- a/drivers/pci/pci-imx6.c
+++ b/drivers/pci/pci-imx6.c
@@ -20,6 +20,7 @@
 #include <gpio.h>
 #include <asm/mmu.h>
 #include <of_gpio.h>
+#include <of_device.h>
 #include <linux/clk.h>
 #include <linux/kernel.h>
 #include <of_address.h>
@@ -36,6 +37,11 @@
 
 #define to_imx6_pcie(x)	container_of(x, struct imx6_pcie, pp)
 
+enum imx6_pcie_variants {
+	IMX6Q,
+	IMX6QP,
+};
+
 struct imx6_pcie {
 	int			reset_gpio;
 	struct clk		*pcie_bus;
@@ -43,6 +49,7 @@ struct imx6_pcie {
 	struct clk		*pcie;
 	struct pcie_port	pp;
 	void __iomem		*iomuxc_gpr;
+	enum imx6_pcie_variants variant;
 	void __iomem		*mem_base;
 };
 
@@ -219,39 +226,48 @@ static int imx6_pcie_assert_core_reset(struct pcie_port *pp)
 	struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
 	u32 val, gpr1, gpr12;
 
-	/*
-	 * If the bootloader already enabled the link we need some special
-	 * handling to get the core back into a state where it is safe to
-	 * touch it for configuration.  As there is no dedicated reset signal
-	 * wired up for MX6QDL, we need to manually force LTSSM into "detect"
-	 * state before completely disabling LTSSM, which is a prerequisite
-	 * for core configuration.
-	 *
-	 * If both LTSSM_ENABLE and REF_SSP_ENABLE are active we have a strong
-	 * indication that the bootloader activated the link.
-	 */
-	gpr1 = readl(imx6_pcie->iomuxc_gpr + IOMUXC_GPR1);
-	gpr12 = readl(imx6_pcie->iomuxc_gpr + IOMUXC_GPR12);
+	switch (imx6_pcie->variant) {
+	case IMX6QP:
+		gpr1 = readl(imx6_pcie->iomuxc_gpr + IOMUXC_GPR1);
+		gpr1 |= IMX6Q_GPR1_PCIE_SW_RST;
+		writel(gpr1, imx6_pcie->iomuxc_gpr + IOMUXC_GPR1);
+		break;
+	case IMX6Q:
+		/*
+		 * If the bootloader already enabled the link we need some special
+		 * handling to get the core back into a state where it is safe to
+		 * touch it for configuration.  As there is no dedicated reset signal
+		 * wired up for MX6QDL, we need to manually force LTSSM into "detect"
+		 * state before completely disabling LTSSM, which is a prerequisite
+		 * for core configuration.
+		 *
+		 * If both LTSSM_ENABLE and REF_SSP_ENABLE are active we have a strong
+		 * indication that the bootloader activated the link.
+		 */
+		gpr1 = readl(imx6_pcie->iomuxc_gpr + IOMUXC_GPR1);
+		gpr12 = readl(imx6_pcie->iomuxc_gpr + IOMUXC_GPR12);
 
-	if ((gpr1 & IMX6Q_GPR1_PCIE_REF_CLK_EN) &&
-	    (gpr12 & IMX6Q_GPR12_PCIE_CTL_2)) {
-		val = readl(pp->dbi_base + PCIE_PL_PFLR);
-		val &= ~PCIE_PL_PFLR_LINK_STATE_MASK;
-		val |= PCIE_PL_PFLR_FORCE_LINK;
+		if ((gpr1 & IMX6Q_GPR1_PCIE_REF_CLK_EN) &&
+		    (gpr12 & IMX6Q_GPR12_PCIE_CTL_2)) {
+			val = readl(pp->dbi_base + PCIE_PL_PFLR);
+			val &= ~PCIE_PL_PFLR_LINK_STATE_MASK;
+			val |= PCIE_PL_PFLR_FORCE_LINK;
 
-		data_abort_mask();
-		writel(val, pp->dbi_base + PCIE_PL_PFLR);
-		data_abort_unmask();
+			data_abort_mask();
+			writel(val, pp->dbi_base + PCIE_PL_PFLR);
+			data_abort_unmask();
 
-		gpr12 &= ~IMX6Q_GPR12_PCIE_CTL_2;
-		writel(gpr12, imx6_pcie->iomuxc_gpr + IOMUXC_GPR12);
-	}
+			gpr12 &= ~IMX6Q_GPR12_PCIE_CTL_2;
+			writel(gpr12, imx6_pcie->iomuxc_gpr + IOMUXC_GPR12);
+		}
 
-	gpr1 |= IMX6Q_GPR1_PCIE_TEST_PD;
-	writel(gpr1, imx6_pcie->iomuxc_gpr + IOMUXC_GPR1);
+		gpr1 |= IMX6Q_GPR1_PCIE_TEST_PD;
+		writel(gpr1, imx6_pcie->iomuxc_gpr + IOMUXC_GPR1);
 
-	gpr1 &= ~IMX6Q_GPR1_PCIE_REF_CLK_EN;
-	writel(gpr1, imx6_pcie->iomuxc_gpr + IOMUXC_GPR1);
+		gpr1 &= ~IMX6Q_GPR1_PCIE_REF_CLK_EN;
+		writel(gpr1, imx6_pcie->iomuxc_gpr + IOMUXC_GPR1);
+		break;
+	}
 
 	return 0;
 }
@@ -298,6 +314,22 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
 		mdelay(100);
 		gpio_set_value(imx6_pcie->reset_gpio, 1);
 	}
+
+	/*
+	 * Release the PCIe PHY reset here
+	 */
+	switch (imx6_pcie->variant) {
+	case IMX6QP:
+		gpr1 = readl(imx6_pcie->iomuxc_gpr + IOMUXC_GPR1);
+		gpr1 &= ~IMX6Q_GPR1_PCIE_SW_RST;
+		writel(gpr1, imx6_pcie->iomuxc_gpr + IOMUXC_GPR1);
+
+		udelay(200);
+		break;
+	case IMX6Q:		/* Nothing to do */
+		break;
+	}
+
 	return 0;
 
 err_pcie:
@@ -568,6 +600,9 @@ static int __init imx6_pcie_probe(struct device_d *dev)
 	pp = &imx6_pcie->pp;
 	pp->dev = dev;
 
+	imx6_pcie->variant =
+		(enum imx6_pcie_variants)of_device_get_match_data(dev);
+
 	iores = dev_request_mem_resource(dev, 0);
 	if (IS_ERR(iores))
 		return PTR_ERR(iores);
@@ -623,7 +658,8 @@ static void imx6_pcie_remove(struct device_d *dev)
 }
 
 static struct of_device_id imx6_pcie_of_match[] = {
-	{ .compatible = "fsl,imx6q-pcie", },
+	{ .compatible = "fsl,imx6q-pcie",  .data = (void *)IMX6Q,  },
+	{ .compatible = "fsl,imx6qp-pcie", .data = (void *)IMX6QP, },
 	{},
 };
 
diff --git a/include/mfd/imx6q-iomuxc-gpr.h b/include/mfd/imx6q-iomuxc-gpr.h
index a7ef1c8..b2c9da6 100644
--- a/include/mfd/imx6q-iomuxc-gpr.h
+++ b/include/mfd/imx6q-iomuxc-gpr.h
@@ -95,6 +95,7 @@
 #define IMX6Q_GPR0_DMAREQ_MUX_SEL0_IOMUX	BIT(0)
 
 #define IMX6Q_GPR1_PCIE_REQ_MASK		(0x3 << 30)
+#define IMX6Q_GPR1_PCIE_SW_RST			BIT(29)
 #define IMX6Q_GPR1_PCIE_EXIT_L1			BIT(28)
 #define IMX6Q_GPR1_PCIE_RDY_L23			BIT(27)
 #define IMX6Q_GPR1_PCIE_ENTER_L1		BIT(26)
-- 
2.5.5


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[PATCH 4/9] PCI: imx6: Rename imx6_pcie_start_link() to imx6_pcie_establish_link()

[Andrey Smirnov]

Rename imx6_pcie_start_link() to imx6_pcie_establish_link() to follow the
convention of other DesignWare-based host drivers.  No functional change.

[Andrey Smirnov: port to BB codebase]
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
---
 drivers/pci/pci-imx6.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pci-imx6.c b/drivers/pci/pci-imx6.c
index 13a8b22..30bc4fe 100644
--- a/drivers/pci/pci-imx6.c
+++ b/drivers/pci/pci-imx6.c
@@ -415,7 +415,7 @@ static int imx6_pcie_wait_for_speed_change(struct pcie_port *pp)
 }
 
 
-static int imx6_pcie_start_link(struct pcie_port *pp)
+static int imx6_pcie_establish_link(struct pcie_port *pp)
 {
 	struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
 	uint32_t tmp;
@@ -483,7 +483,7 @@ static void imx6_pcie_host_init(struct pcie_port *pp)
 
 	dw_pcie_setup_rc(pp);
 
-	imx6_pcie_start_link(pp);
+	imx6_pcie_establish_link(pp);
 }
 
 static void imx6_pcie_reset_phy(struct pcie_port *pp)
-- 
2.5.5


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[PATCH 5/9] PCI: imx6: Simplify a trivial if-return sequence

[Andrey Smirnov]

From: Fabio Estevam <fabio.estevam@freescale.com>

Simplify a trivial if-return sequence by combining it with a preceding
function call.

The semantic patch that makes this change is available in
scripts/coccinelle/misc/simple_return.cocci.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/pci/pci-imx6.c | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/drivers/pci/pci-imx6.c b/drivers/pci/pci-imx6.c
index 30bc4fe..2ccf80a 100644
--- a/drivers/pci/pci-imx6.c
+++ b/drivers/pci/pci-imx6.c
@@ -129,11 +129,7 @@ static int pcie_phy_wait_ack(void __iomem *dbi_base, int addr)
 	val = addr << PCIE_PHY_CTRL_DATA_LOC;
 	writel(val, dbi_base + PCIE_PHY_CTRL);
 
-	ret = pcie_phy_poll_ack(dbi_base, 0);
-	if (ret)
-		return ret;
-
-	return 0;
+	return pcie_phy_poll_ack(dbi_base, 0);
 }
 
 /* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */
@@ -160,11 +156,7 @@ static int pcie_phy_read(void __iomem *dbi_base, int addr , int *data)
 	/* deassert Read signal */
 	writel(0x00, dbi_base + PCIE_PHY_CTRL);
 
-	ret = pcie_phy_poll_ack(dbi_base, 0);
-	if (ret)
-		return ret;
-
-	return 0;
+	return pcie_phy_poll_ack(dbi_base, 0);
 }
 
 static int pcie_phy_write(void __iomem *dbi_base, int addr, int data)
-- 
2.5.5


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[PATCH 6/9] PCI: imx6: Move imx6_pcie_reset_phy() near other PHY handling functions

[Andrey Smirnov]

Move imx6_pcie_reset_phy() near the other PHY related functions in the
file.  This is a cosmetic change, but also allows to do the following
changes without introducing needless forward declarations.

[Andrey Smirnov: port to Barebox codebase]

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/pci-imx6.c | 34 +++++++++++++++++-----------------
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/drivers/pci/pci-imx6.c b/drivers/pci/pci-imx6.c
index 2ccf80a..fd53d36 100644
--- a/drivers/pci/pci-imx6.c
+++ b/drivers/pci/pci-imx6.c
@@ -213,6 +213,23 @@ static int pcie_phy_write(void __iomem *dbi_base, int addr, int data)
 	return 0;
 }
 
+static void imx6_pcie_reset_phy(struct pcie_port *pp)
+{
+	uint32_t temp;
+
+	pcie_phy_read(pp->dbi_base, PHY_RX_OVRD_IN_LO, &temp);
+	temp |= (PHY_RX_OVRD_IN_LO_RX_DATA_EN |
+		 PHY_RX_OVRD_IN_LO_RX_PLL_EN);
+	pcie_phy_write(pp->dbi_base, PHY_RX_OVRD_IN_LO, temp);
+
+	udelay(2000);
+
+	pcie_phy_read(pp->dbi_base, PHY_RX_OVRD_IN_LO, &temp);
+	temp &= ~(PHY_RX_OVRD_IN_LO_RX_DATA_EN |
+		  PHY_RX_OVRD_IN_LO_RX_PLL_EN);
+	pcie_phy_write(pp->dbi_base, PHY_RX_OVRD_IN_LO, temp);
+}
+
 static int imx6_pcie_assert_core_reset(struct pcie_port *pp)
 {
 	struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
@@ -478,23 +495,6 @@ static void imx6_pcie_host_init(struct pcie_port *pp)
 	imx6_pcie_establish_link(pp);
 }
 
-static void imx6_pcie_reset_phy(struct pcie_port *pp)
-{
-	uint32_t temp;
-
-	pcie_phy_read(pp->dbi_base, PHY_RX_OVRD_IN_LO, &temp);
-	temp |= (PHY_RX_OVRD_IN_LO_RX_DATA_EN |
-		 PHY_RX_OVRD_IN_LO_RX_PLL_EN);
-	pcie_phy_write(pp->dbi_base, PHY_RX_OVRD_IN_LO, temp);
-
-	udelay(2000);
-
-	pcie_phy_read(pp->dbi_base, PHY_RX_OVRD_IN_LO, &temp);
-	temp &= ~(PHY_RX_OVRD_IN_LO_RX_DATA_EN |
-		  PHY_RX_OVRD_IN_LO_RX_PLL_EN);
-	pcie_phy_write(pp->dbi_base, PHY_RX_OVRD_IN_LO, temp);
-}
-
 static int imx6_pcie_link_up(struct pcie_port *pp)
 {
 	u32 rc, debug_r0, rx_valid;
-- 
2.5.5


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[PATCH 7/9] PCI: imx6: Move PHY reset into imx6_pcie_establish_link()

[Andrey Smirnov]

This adds the PHY reset into a common error path of
imx6_pcie_establish_link(), deduplicating some of the debug prints.  Also
reduce the severity of the "no-link" message in the one place where it is
expected to be hit when no peripheral is attached.

[Andrey Smirnov: port to Barebox codebase]

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/pci-imx6.c | 28 +++++++++++++++-------------
 1 file changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/pci/pci-imx6.c b/drivers/pci/pci-imx6.c
index fd53d36..c564a60 100644
--- a/drivers/pci/pci-imx6.c
+++ b/drivers/pci/pci-imx6.c
@@ -399,10 +399,6 @@ static int imx6_pcie_wait_for_link(struct pcie_port *pp)
 		if (!is_timeout(start, SECOND))
 			continue;
 
-		dev_err(pp->dev, "phy link never came up\n");
-		dev_dbg(pp->dev, "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n",
-			readl(pp->dbi_base + PCIE_PHY_DEBUG_R0),
-			readl(pp->dbi_base + PCIE_PHY_DEBUG_R1));
 		return -EINVAL;
 	}
 }
@@ -447,8 +443,10 @@ static int imx6_pcie_establish_link(struct pcie_port *pp)
 	writel(gpr12, imx6_pcie->iomuxc_gpr + IOMUXC_GPR12);
 
 	ret = imx6_pcie_wait_for_link(pp);
-	if (ret)
-		return ret;
+	if (ret) {
+		dev_info(pp->dev, "Link never came up\n");
+		goto err_reset_phy;
+	}
 
 	/* Allow Gen2 mode after the link is up. */
 	tmp = readl(pp->dbi_base + PCIE_RC_LCR);
@@ -467,19 +465,28 @@ static int imx6_pcie_establish_link(struct pcie_port *pp)
 	ret = imx6_pcie_wait_for_speed_change(pp);
 	if (ret) {
 		dev_err(pp->dev, "Failed to bring link up!\n");
-		return ret;
+		goto err_reset_phy;
 	}
 
 	/* Make sure link training is finished as well! */
 	ret = imx6_pcie_wait_for_link(pp);
 	if (ret) {
 		dev_err(pp->dev, "Failed to bring link up!\n");
-		return ret;
+		goto err_reset_phy;
 	}
 
 	tmp = readl(pp->dbi_base + PCIE_RC_LCSR);
 	dev_dbg(pp->dev, "Link up, Gen=%i\n", (tmp >> 16) & 0xf);
+	
 	return 0;
+
+err_reset_phy:
+       dev_dbg(pp->dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
+               readl(pp->dbi_base + PCIE_PHY_DEBUG_R0),
+               readl(pp->dbi_base + PCIE_PHY_DEBUG_R1));
+       imx6_pcie_reset_phy(pp);
+
+       return ret;
 }
 
 static void imx6_pcie_host_init(struct pcie_port *pp)
@@ -547,11 +554,6 @@ static int imx6_pcie_link_up(struct pcie_port *pp)
 	if ((debug_r0 & 0x3f) != 0x0d)
 		return 0;
 
-	dev_err(pp->dev, "transition to gen2 is stuck, reset PHY!\n");
-	dev_dbg(pp->dev, "debug_r0=%08x debug_r1=%08x\n", debug_r0, rc);
-
-	imx6_pcie_reset_phy(pp);
-
 	return 0;
 }
 
-- 
2.5.5


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[PATCH 8/9] PCI: imx6: Remove broken Gen2 workaround

[Andrey Smirnov]

Remove the remnants of the workaround for erratum ERR005184 which was never
completely implemented.  The checks alone don't carry any value as we don't
act properly on the result.

A workaround should be added to the lane speed change in establish_link
later.

[Andrey Smirnov: port to Barebox codebase]

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/pci-imx6.c | 17 +----------------
 1 file changed, 1 insertion(+), 16 deletions(-)

diff --git a/drivers/pci/pci-imx6.c b/drivers/pci/pci-imx6.c
index c564a60..ee1a0c5 100644
--- a/drivers/pci/pci-imx6.c
+++ b/drivers/pci/pci-imx6.c
@@ -504,7 +504,7 @@ static void imx6_pcie_host_init(struct pcie_port *pp)
 
 static int imx6_pcie_link_up(struct pcie_port *pp)
 {
-	u32 rc, debug_r0, rx_valid;
+	u32 rc;
 	int count = 5;
 
 	/*
@@ -538,21 +538,6 @@ static int imx6_pcie_link_up(struct pcie_port *pp)
 		 */
 		udelay(1000);
 	}
-	/*
-	 * From L0, initiate MAC entry to gen2 if EP/RC supports gen2.
-	 * Wait 2ms (LTSSM timeout is 24ms, PHY lock is ~5us in gen2).
-	 * If (MAC/LTSSM.state == Recovery.RcvrLock)
-	 * && (PHY/rx_valid==0) then pulse PHY/rx_reset. Transition
-	 * to gen2 is stuck
-	 */
-	pcie_phy_read(pp->dbi_base, PCIE_PHY_RX_ASIC_OUT, &rx_valid);
-	debug_r0 = readl(pp->dbi_base + PCIE_PHY_DEBUG_R0);
-
-	if (rx_valid & 0x01)
-		return 0;
-
-	if ((debug_r0 & 0x3f) != 0x0d)
-		return 0;
 
 	return 0;
 }
-- 
2.5.5


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[PATCH 9/9] PCI: imx6: Add DT bindings to configure PHY Tx driver settings

[Andrey Smirnov]

The settings in GPR8 are dependent upon the particular layout of the
hardware platform.  As such, they should be configurable via the device
tree.

Look up PHY Tx driver settings from the device tree.  Fall back to the
original hard-coded values if they are not specified in the device tree.

[Andrey Smirnov: port to Barebox codebase]

Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/pci-imx6.c | 34 +++++++++++++++++++++++++++++++---
 1 file changed, 31 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/pci-imx6.c b/drivers/pci/pci-imx6.c
index ee1a0c5..e25a956 100644
--- a/drivers/pci/pci-imx6.c
+++ b/drivers/pci/pci-imx6.c
@@ -51,6 +51,11 @@ struct imx6_pcie {
 	void __iomem		*iomuxc_gpr;
 	enum imx6_pcie_variants variant;
 	void __iomem		*mem_base;
+	u32                     tx_deemph_gen1;
+	u32                     tx_deemph_gen2_3p5db;
+	u32                     tx_deemph_gen2_6db;
+	u32                     tx_swing_full;
+	u32                     tx_swing_low;
 };
 
 /* PCIe Root Complex registers (memory-mapped) */
@@ -370,21 +375,23 @@ static void imx6_pcie_init_phy(struct pcie_port *pp)
 
 	gpr8 = readl(imx6_pcie->iomuxc_gpr + IOMUXC_GPR8);
 	gpr8 &= ~IMX6Q_GPR8_TX_DEEMPH_GEN1;
+	gpr8 |= imx6_pcie->tx_deemph_gen1 << 0;
 	writel(gpr8, imx6_pcie->iomuxc_gpr + IOMUXC_GPR8);
 
 	gpr8 &= ~IMX6Q_GPR8_TX_DEEMPH_GEN2_3P5DB;
+	gpr8 |= imx6_pcie->tx_deemph_gen2_3p5db << 6;
 	writel(gpr8, imx6_pcie->iomuxc_gpr + IOMUXC_GPR8);
 
 	gpr8 &= ~IMX6Q_GPR8_TX_DEEMPH_GEN2_6DB;
-	gpr8 |= 20 << 12;
+	gpr8 |= imx6_pcie->tx_deemph_gen2_6db << 12;
 	writel(gpr8, imx6_pcie->iomuxc_gpr + IOMUXC_GPR8);
 
 	gpr8 &= ~IMX6Q_GPR8_TX_SWING_FULL;
-	gpr8 |= 127 << 18;
+	gpr8 |= imx6_pcie->tx_swing_full << 18;
 	writel(gpr8, imx6_pcie->iomuxc_gpr + IOMUXC_GPR8);
 
 	gpr8 &= ~IMX6Q_GPR8_TX_SWING_LOW;
-	gpr8 |= 127 << 25;
+	gpr8 |= imx6_pcie->tx_swing_low << 25;
 	writel(gpr8, imx6_pcie->iomuxc_gpr + IOMUXC_GPR8);
 }
 
@@ -620,6 +627,27 @@ static int __init imx6_pcie_probe(struct device_d *dev)
 	/* Grab GPR config register range */
 	imx6_pcie->iomuxc_gpr = IOMEM(MX6_IOMUXC_BASE_ADDR);
 
+	/* Grab PCIe PHY Tx Settings */
+	if (of_property_read_u32(np, "fsl,tx-deemph-gen1",
+				 &imx6_pcie->tx_deemph_gen1))
+		imx6_pcie->tx_deemph_gen1 = 0;
+
+	if (of_property_read_u32(np, "fsl,tx-deemph-gen2-3p5db",
+				 &imx6_pcie->tx_deemph_gen2_3p5db))
+		imx6_pcie->tx_deemph_gen2_3p5db = 0;
+
+	if (of_property_read_u32(np, "fsl,tx-deemph-gen2-6db",
+				 &imx6_pcie->tx_deemph_gen2_6db))
+		imx6_pcie->tx_deemph_gen2_6db = 20;
+
+	if (of_property_read_u32(np, "fsl,tx-swing-full",
+				 &imx6_pcie->tx_swing_full))
+		imx6_pcie->tx_swing_full = 127;
+
+	if (of_property_read_u32(np, "fsl,tx-swing-low",
+				 &imx6_pcie->tx_swing_low))
+		imx6_pcie->tx_swing_low = 127;
+
 	ret = imx6_add_pcie_port(pp, dev);
 	if (ret < 0)
 		return ret;
-- 
2.5.5


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Re: [PATCH 0/9] i.MX6Q+ fixes plus number of latest Kernel changes

[Lucas Stach]

Am Montag, den 25.04.2016, 22:36 -0700 schrieb Andrey Smirnov:
> Hello,
> 
> This patchset continains i.MX6Q+ reset sequence fix (similar
> implementation was submitted to LKML) and besides that a number of
> ported coomits from "pci/host-imx6" branch of:
> 
> git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git
> 
> Since some commits required a bit of massaging, I added my own
> Signed-off-by and a comment in square brackets, however my authorship
> of those commits is very minimal.
> 
> As for commit by Fabio Estevam, there I was able to apply
> corresponding kernel patch by manually editing paths in the diff file,
> so I left the commit message as it was.
> 
> Any feedback would be appreciated.
> 
I haven't checked those commits line-by-line, but they look familiar
from the kernel commits I reviewed. I suppose you tested this series on
both MX6Q and MX6QP? In that case, for the whole series:

Acked-by: Lucas Stach <l.stach@pengutronix.de>

Regards,
Lucas



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Re: [PATCH 0/9] i.MX6Q+ fixes plus number of latest Kernel changes

[Sascha Hauer]

On Mon, Apr 25, 2016 at 10:36:58PM -0700, Andrey Smirnov wrote:
> Hello,
> 
> This patchset continains i.MX6Q+ reset sequence fix (similar
> implementation was submitted to LKML) and besides that a number of
> ported coomits from "pci/host-imx6" branch of:
> 
> git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git
> 
> Since some commits required a bit of massaging, I added my own
> Signed-off-by and a comment in square brackets, however my authorship
> of those commits is very minimal.
> 
> As for commit by Fabio Estevam, there I was able to apply
> corresponding kernel patch by manually editing paths in the diff file,
> so I left the commit message as it was.
> 
> Any feedback would be appreciated.

Applied, thanks

Sascha

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Re: [PATCH 4/9] PCI: imx6: Rename imx6_pcie_start_link() to imx6_pcie_establish_link()

[Bjorn Helgaas]

On Tue, Apr 26, 2016 at 12:37 AM, Andrey Smirnov
<andrew.smirnov@gmail.com> wrote:
> Rename imx6_pcie_start_link() to imx6_pcie_establish_link() to follow the
> convention of other DesignWare-based host drivers.  No functional change.
>
> [Andrey Smirnov: port to BB codebase]
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>

This is apparently intended for barebox (?), not for the Linux kernel,
so I'm going to ignore it.  I assume you're not looking for any action
from me.  If you are, note that I only act on things posted to
linux-pci@vger.kernel.org.

It would help me sort this out and maybe help future code
archaeologists if your changelog referenced the Linux commit more
explicitly, e.g.,

  port Linux kernel commit fd5da2081b07 ("PCI: imx6: Rename
imx6_pcie_start_link() to imx6_pcie_establish_link()") to barebox

It wouldn't hurt my feelings if you didn't copy me on patches like
this.  I don't really have anything to contribute to barebox, so it's
just something to look at and figure out whether I'm supposed to do
something with it.

Bjorn

> ---
>  drivers/pci/pci-imx6.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/pci-imx6.c b/drivers/pci/pci-imx6.c
> index 13a8b22..30bc4fe 100644
> --- a/drivers/pci/pci-imx6.c
> +++ b/drivers/pci/pci-imx6.c
> @@ -415,7 +415,7 @@ static int imx6_pcie_wait_for_speed_change(struct pcie_port *pp)
>  }
>
>
> -static int imx6_pcie_start_link(struct pcie_port *pp)
> +static int imx6_pcie_establish_link(struct pcie_port *pp)
>  {
>         struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
>         uint32_t tmp;
> @@ -483,7 +483,7 @@ static void imx6_pcie_host_init(struct pcie_port *pp)
>
>         dw_pcie_setup_rc(pp);
>
> -       imx6_pcie_start_link(pp);
> +       imx6_pcie_establish_link(pp);
>  }
>
>  static void imx6_pcie_reset_phy(struct pcie_port *pp)
> --
> 2.5.5
>

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