* [PATCH 1/3] MIPS: ath79: pbl: add pbl_ar9331_wmac_enable macro
@ 2016-06-27 10:34 yegorslists
2016-06-27 10:34 ` [PATCH 2/3] MIPS: black-swift: pbl: init WMAC yegorslists
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: yegorslists @ 2016-06-27 10:34 UTC (permalink / raw)
To: barebox; +Cc: linux
From: Yegor Yefremov <yegorslists@googlemail.com>
AR9331's WMAC module requires triple WMAC reset as also working RTC
subsystem.
The code is taken as is from upstream U-Boot repository.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
---
arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 14 ++++++
arch/mips/mach-ath79/include/mach/pbl_macros.h | 63 +++++++++++++++++++++++++
2 files changed, 77 insertions(+)
diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
index 4cbe94a..de96c56 100644
--- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
+++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
@@ -31,11 +31,25 @@
#define AR71XX_PLL_SIZE 0x100
#define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000)
#define AR71XX_RESET_SIZE 0x100
+#define AR71XX_RTC_BASE (AR71XX_APB_BASE + 0x00107000)
+#define AR71XX_RTC_SIZE 0x100
#define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000)
#define AR933X_UART_SIZE 0x14
/*
+ * RTC block
+ */
+#define AR933X_RTC_REG_RESET 0x40
+#define AR933X_RTC_REG_STATUS 0x44
+#define AR933X_RTC_REG_DERIVED 0x48
+#define AR933X_RTC_REG_FORCE_WAKE 0x4c
+#define AR933X_RTC_REG_INT_CAUSE 0x50
+#define AR933X_RTC_REG_CAUSE_CLR 0x50
+#define AR933X_RTC_REG_INT_ENABLE 0x54
+#define AR933X_RTC_REG_INT_MASKE 0x58
+
+/*
* DDR_CTRL block
*/
#define AR933X_DDR_CONFIG 0x00
diff --git a/arch/mips/mach-ath79/include/mach/pbl_macros.h b/arch/mips/mach-ath79/include/mach/pbl_macros.h
index 8f4d09a..680fcbb 100644
--- a/arch/mips/mach-ath79/include/mach/pbl_macros.h
+++ b/arch/mips/mach-ath79/include/mach/pbl_macros.h
@@ -274,4 +274,67 @@ normal_path:
.set pop
.endm
+.macro pbl_ar9331_wmac_enable
+ .set push
+ .set noreorder
+
+ /* These three WLAN_RESET will avoid original issue */
+ li t3, 0x03
+1:
+ li t0, CKSEG1ADDR(AR71XX_RESET_BASE)
+ lw t1, AR933X_RESET_REG_RESET_MODULE(t0)
+ ori t1, t1, 0x0800
+ sw t1, AR933X_RESET_REG_RESET_MODULE(t0)
+ nop
+ lw t1, AR933X_RESET_REG_RESET_MODULE(t0)
+ li t2, 0xfffff7ff
+ and t1, t1, t2
+ sw t1, AR933X_RESET_REG_RESET_MODULE(t0)
+ nop
+ addi t3, t3, -1
+ bnez t3, 1b
+ nop
+
+ li t2, 0x20
+2:
+ beqz t2, 1b
+ nop
+ addi t2, t2, -1
+ lw t5, AR933X_RESET_REG_BOOTSTRAP(t0)
+ andi t1, t5, 0x10
+ bnez t1, 2b
+ nop
+
+ li t1, 0x02110E
+ sw t1, AR933X_RESET_REG_BOOTSTRAP(t0)
+ nop
+
+ /* RTC Force Wake */
+ li t0, CKSEG1ADDR(AR71XX_RTC_BASE)
+ li t1, 0x03
+ sw t1, AR933X_RTC_REG_FORCE_WAKE(t0)
+ nop
+ nop
+
+ /* RTC Reset */
+ li t1, 0x00
+ sw t1, AR933X_RTC_REG_RESET(t0)
+ nop
+ nop
+
+ li t1, 0x01
+ sw t1, AR933X_RTC_REG_RESET(t0)
+ nop
+ nop
+
+ /* Wait for RTC in on state */
+1:
+ lw t1, AR933X_RTC_REG_STATUS(t0)
+ andi t1, t1, 0x02
+ beqz t1, 1b
+ nop
+
+ .set pop
+.endm
+
#endif /* __ASM_MACH_ATH79_PBL_MACROS_H */
--
2.1.4
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^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 2/3] MIPS: black-swift: pbl: init WMAC
2016-06-27 10:34 [PATCH 1/3] MIPS: ath79: pbl: add pbl_ar9331_wmac_enable macro yegorslists
@ 2016-06-27 10:34 ` yegorslists
2016-06-27 10:34 ` [PATCH 3/3] MIPS: tplink-mr3020: " yegorslists
2016-06-28 6:35 ` [PATCH 1/3] MIPS: ath79: pbl: add pbl_ar9331_wmac_enable macro Sascha Hauer
2 siblings, 0 replies; 4+ messages in thread
From: yegorslists @ 2016-06-27 10:34 UTC (permalink / raw)
To: barebox; +Cc: linux
From: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
---
arch/mips/boards/black-swift/include/board/board_pbl_start.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/boards/black-swift/include/board/board_pbl_start.h b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
index ee21a85..4c2ab2e 100644
--- a/arch/mips/boards/black-swift/include/board/board_pbl_start.h
+++ b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
@@ -26,6 +26,8 @@
mips_barebox_10h
+ pbl_ar9331_wmac_enable
+
hornet_mips24k_cp0_setup
pbl_blt 0xbf000000 skip_pll_ram_config t8
--
2.1.4
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^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 3/3] MIPS: tplink-mr3020: pbl: init WMAC
2016-06-27 10:34 [PATCH 1/3] MIPS: ath79: pbl: add pbl_ar9331_wmac_enable macro yegorslists
2016-06-27 10:34 ` [PATCH 2/3] MIPS: black-swift: pbl: init WMAC yegorslists
@ 2016-06-27 10:34 ` yegorslists
2016-06-28 6:35 ` [PATCH 1/3] MIPS: ath79: pbl: add pbl_ar9331_wmac_enable macro Sascha Hauer
2 siblings, 0 replies; 4+ messages in thread
From: yegorslists @ 2016-06-27 10:34 UTC (permalink / raw)
To: barebox; +Cc: linux
From: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
---
arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h b/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h
index ef0d36d..3a7b560 100644
--- a/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h
+++ b/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h
@@ -26,6 +26,8 @@
mips_barebox_10h
+ pbl_ar9331_wmac_enable
+
hornet_mips24k_cp0_setup
pbl_blt 0xbf000000 skip_pll_ram_config t8
--
2.1.4
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/3] MIPS: ath79: pbl: add pbl_ar9331_wmac_enable macro
2016-06-27 10:34 [PATCH 1/3] MIPS: ath79: pbl: add pbl_ar9331_wmac_enable macro yegorslists
2016-06-27 10:34 ` [PATCH 2/3] MIPS: black-swift: pbl: init WMAC yegorslists
2016-06-27 10:34 ` [PATCH 3/3] MIPS: tplink-mr3020: " yegorslists
@ 2016-06-28 6:35 ` Sascha Hauer
2 siblings, 0 replies; 4+ messages in thread
From: Sascha Hauer @ 2016-06-28 6:35 UTC (permalink / raw)
To: yegorslists; +Cc: barebox, linux
On Mon, Jun 27, 2016 at 12:34:43PM +0200, yegorslists@googlemail.com wrote:
> From: Yegor Yefremov <yegorslists@googlemail.com>
>
> AR9331's WMAC module requires triple WMAC reset as also working RTC
> subsystem.
>
> The code is taken as is from upstream U-Boot repository.
>
> Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Applied, thanks
Sascha
> ---
> arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 14 ++++++
> arch/mips/mach-ath79/include/mach/pbl_macros.h | 63 +++++++++++++++++++++++++
> 2 files changed, 77 insertions(+)
>
> diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
> index 4cbe94a..de96c56 100644
> --- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
> +++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
> @@ -31,11 +31,25 @@
> #define AR71XX_PLL_SIZE 0x100
> #define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000)
> #define AR71XX_RESET_SIZE 0x100
> +#define AR71XX_RTC_BASE (AR71XX_APB_BASE + 0x00107000)
> +#define AR71XX_RTC_SIZE 0x100
>
> #define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000)
> #define AR933X_UART_SIZE 0x14
>
> /*
> + * RTC block
> + */
> +#define AR933X_RTC_REG_RESET 0x40
> +#define AR933X_RTC_REG_STATUS 0x44
> +#define AR933X_RTC_REG_DERIVED 0x48
> +#define AR933X_RTC_REG_FORCE_WAKE 0x4c
> +#define AR933X_RTC_REG_INT_CAUSE 0x50
> +#define AR933X_RTC_REG_CAUSE_CLR 0x50
> +#define AR933X_RTC_REG_INT_ENABLE 0x54
> +#define AR933X_RTC_REG_INT_MASKE 0x58
> +
> +/*
> * DDR_CTRL block
> */
> #define AR933X_DDR_CONFIG 0x00
> diff --git a/arch/mips/mach-ath79/include/mach/pbl_macros.h b/arch/mips/mach-ath79/include/mach/pbl_macros.h
> index 8f4d09a..680fcbb 100644
> --- a/arch/mips/mach-ath79/include/mach/pbl_macros.h
> +++ b/arch/mips/mach-ath79/include/mach/pbl_macros.h
> @@ -274,4 +274,67 @@ normal_path:
> .set pop
> .endm
>
> +.macro pbl_ar9331_wmac_enable
> + .set push
> + .set noreorder
> +
> + /* These three WLAN_RESET will avoid original issue */
> + li t3, 0x03
> +1:
> + li t0, CKSEG1ADDR(AR71XX_RESET_BASE)
> + lw t1, AR933X_RESET_REG_RESET_MODULE(t0)
> + ori t1, t1, 0x0800
> + sw t1, AR933X_RESET_REG_RESET_MODULE(t0)
> + nop
> + lw t1, AR933X_RESET_REG_RESET_MODULE(t0)
> + li t2, 0xfffff7ff
> + and t1, t1, t2
> + sw t1, AR933X_RESET_REG_RESET_MODULE(t0)
> + nop
> + addi t3, t3, -1
> + bnez t3, 1b
> + nop
> +
> + li t2, 0x20
> +2:
> + beqz t2, 1b
> + nop
> + addi t2, t2, -1
> + lw t5, AR933X_RESET_REG_BOOTSTRAP(t0)
> + andi t1, t5, 0x10
> + bnez t1, 2b
> + nop
> +
> + li t1, 0x02110E
> + sw t1, AR933X_RESET_REG_BOOTSTRAP(t0)
> + nop
> +
> + /* RTC Force Wake */
> + li t0, CKSEG1ADDR(AR71XX_RTC_BASE)
> + li t1, 0x03
> + sw t1, AR933X_RTC_REG_FORCE_WAKE(t0)
> + nop
> + nop
> +
> + /* RTC Reset */
> + li t1, 0x00
> + sw t1, AR933X_RTC_REG_RESET(t0)
> + nop
> + nop
> +
> + li t1, 0x01
> + sw t1, AR933X_RTC_REG_RESET(t0)
> + nop
> + nop
> +
> + /* Wait for RTC in on state */
> +1:
> + lw t1, AR933X_RTC_REG_STATUS(t0)
> + andi t1, t1, 0x02
> + beqz t1, 1b
> + nop
> +
> + .set pop
> +.endm
> +
> #endif /* __ASM_MACH_ATH79_PBL_MACROS_H */
> --
> 2.1.4
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
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